{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,7]],"date-time":"2026-07-07T15:47:14Z","timestamp":1783439234825,"version":"3.54.6"},"reference-count":27,"publisher":"Springer Science and Business Media LLC","issue":"10","license":[{"start":{"date-parts":[[2021,4,6]],"date-time":"2021-04-06T00:00:00Z","timestamp":1617667200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,4,6]],"date-time":"2021-04-06T00:00:00Z","timestamp":1617667200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2021,10]]},"DOI":"10.1007\/s11227-021-03778-5","type":"journal-article","created":{"date-parts":[[2021,4,6]],"date-time":"2021-04-06T10:02:37Z","timestamp":1617703357000},"page":"12098-12120","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["An efficient branch predictor for improved accuracy of instruction level parallelism"],"prefix":"10.1007","volume":"77","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6741-5524","authenticated-orcid":false,"family":"Sweety","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Prachi","family":"Chaudhary","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2021,4,6]]},"reference":[{"issue":"1","key":"3778_CR1","doi-asserted-by":"publisher","first-page":"33","DOI":"10.12785\/ijcds\/080104","volume":"8","author":"S Abudalfa","year":"2019","unstructured":"Abudalfa S et al (2019) Comparative study on behavior-based dynamic branch prediction using machine learning. Int J Comput Digit Syst 8(1):33\u201341. https:\/\/doi.org\/10.12785\/ijcds\/080104","journal-title":"Int J Comput Digit Syst"},{"issue":"21","key":"3778_CR2","doi-asserted-by":"publisher","first-page":"22","DOI":"10.1109\/MICRO.1994.717404","volume":"7","author":"PY Chang","year":"1994","unstructured":"Chang PY, Hao E, Yeh TY, Patt Y (1994) Branch classification: a new mechanism for improving branch predictor performance. Prof Eng 7(21):22\u201331. https:\/\/doi.org\/10.1109\/MICRO.1994.717404","journal-title":"Prof Eng"},{"issue":"6","key":"3778_CR3","doi-asserted-by":"publisher","first-page":"11693","DOI":"10.15680\/IJIRCCE.2016","volume":"4","author":"A Changela","year":"2016","unstructured":"Changela A (2016) Hazard detection and data forwarding scheme for 5-stage pipeline structure of RISC processor. Int J Innov Res Comput Commun Eng 4(6):11693\u201321169. https:\/\/doi.org\/10.15680\/IJIRCCE.2016","journal-title":"Int J Innov Res Comput Commun Eng"},{"key":"3778_CR4","unstructured":"Deibel N, Sikorski K (2003) Exploring perceptrons in branch prediction. pp. 1\u201311. Retrieved from https:\/\/scholar.googleusercontent.com\/scholar"},{"issue":"5","key":"3778_CR5","doi-asserted-by":"publisher","first-page":"27","DOI":"10.5815\/ijmecs.2017.05.04","volume":"9","author":"S Goyal","year":"2017","unstructured":"Goyal S, Singh J (2017) Two-level alloyed branch predictor based on genetic algorithm for deep pipelining processors. Int J Mod Educ Comput Sci 9(5):27\u201333","journal-title":"Int J Mod Educ Comput Sci"},{"key":"3778_CR6","doi-asserted-by":"publisher","unstructured":"Habibizad Navin A, Lahouti E, Lotfi Anhar M, Mirnia MK (2010) A new method to prevent control hazard in pipeline processor by using an auxiliary processing unit. 2010 2nd International Conference on Advanced Computer Control, pp 596\u2013599. https:\/\/doi.org\/https:\/\/doi.org\/10.1109\/ICACC.2010.5487130","DOI":"10.1109\/ICACC.2010.5487130"},{"key":"3778_CR7","doi-asserted-by":"crossref","unstructured":"Heil TH, Smith Z, Smith, JE (1999) Improving branch predictors by correlating on data values. Proceedings of the 32nd Annual ACM\/IEEE International Symposium on Microarchitecture, pp 28\u201337","DOI":"10.1109\/MICRO.1999.809440"},{"key":"3778_CR8","doi-asserted-by":"crossref","unstructured":"Ho CY, Chong KF, Yau CH, Fong ASS (2007) A study of dynamic branch predictors: counter versus perceptron. Fourth International Conference on Information Technology (ITNG\u201907), pp 528\u2013536","DOI":"10.1109\/ITNG.2007.22"},{"key":"3778_CR9","doi-asserted-by":"publisher","first-page":"651","DOI":"10.1109\/CLUSTER.2017.29","volume":"3","author":"B Kalla","year":"2017","unstructured":"Kalla B, Santhi N, Badawy AHA, Chennupati G, Eidenbenz S (2017) A probabilistic monte carlo framework for branch prediction. 2017 IEEE Int Conf Clust Comput (CLUSTER) 3:651\u2013652. https:\/\/doi.org\/10.1109\/CLUSTER.2017.29","journal-title":"2017 IEEE Int Conf Clust Comput (CLUSTER)"},{"key":"3778_CR10","unstructured":"Kulkarni KN, Mekala VR (2016) A review of branch prediction schemes and a study of branch predictors in modern microprocessors."},{"key":"3778_CR11","doi-asserted-by":"publisher","unstructured":"Loh GH, Henry DS (2002) Predicting conditional branches with fusion-based hybrid predictors. Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, Jan 2002, pp 165\u2013176. https:\/\/doi.org\/https:\/\/doi.org\/10.1109\/PACT.2002.1106015","DOI":"10.1109\/PACT.2002.1106015"},{"key":"3778_CR12","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1109\/access.2020.3017196","volume":"8","author":"Y Mao","year":"2020","unstructured":"Mao Y, Zhou H, Gui X, Shen J (2020) Exploring convolution neural network for branch prediction. IEEE Access 8:1\u20131. https:\/\/doi.org\/10.1109\/access.2020.3017196","journal-title":"IEEE Access"},{"key":"3778_CR13","doi-asserted-by":"publisher","unstructured":"Mittal, S. (2018). A survey of techniques for dynamic branch prediction. pp 1\u201337. https:\/\/doi.org\/https:\/\/doi.org\/10.1145\/2893356","DOI":"10.1145\/2893356"},{"key":"3778_CR14","first-page":"1","volume":"2","author":"A Pandey","year":"2016","unstructured":"Pandey A (2016) Study of data hazard and control hazard resolution techniques in a simulated five stage pipelined RISC processor. Int Conf Invent Comput Technol (ICICT) 2:1\u20134","journal-title":"Int Conf Invent Comput Technol (ICICT)"},{"issue":"16","key":"3778_CR15","first-page":"6","volume":"128","author":"N Panwar","year":"2015","unstructured":"Panwar N, Kaur M, Singh G (2015) Performance analysis of branch prediction unit for pipelined processors. Int J Comput Appl 128(16):6\u201312","journal-title":"Int J Comput Appl"},{"issue":"4","key":"3778_CR16","doi-asserted-by":"publisher","first-page":"304","DOI":"10.5958\/2321-581X.2018.00041.7","volume":"9","author":"R Patel","year":"2018","unstructured":"Patel R, Kumar S (2018) A study of various existing techniques to deal with pipeline hazards. Res J Eng Technol 9(4):304\u2013306. https:\/\/doi.org\/10.5958\/2321-581X.2018.00041.7","journal-title":"Res J Eng Technol"},{"key":"3778_CR17","doi-asserted-by":"publisher","unstructured":"Porter L, Tullsen DM (2009) Creating artificial global history to improve branch prediction accuracy. Proceedings of the 23rd International Conference on Supercomputing. pp 266\u2013275. https:\/\/doi.org\/https:\/\/doi.org\/10.1145\/1542275.1542315","DOI":"10.1145\/1542275.1542315"},{"issue":"5","key":"3778_CR18","first-page":"1","volume":"3","author":"S Rao","year":"2018","unstructured":"Rao S, Sudhakar PK (2018) An analysis to improve branch prediction accuracy by using neural branch prediction. Int J Mod Trends Sci Technol 3(5):1\u20137","journal-title":"Int J Mod Trends Sci Technol"},{"key":"3778_CR19","unstructured":"Seznec A, Jourdan S, Sainrat P, Michaud P, Seznec A, Jourdan S, Sainrat P, Michaud P, Branch MA (2006) Multiple-block ahead branch predictors"},{"issue":"8","key":"3778_CR20","first-page":"1135","volume":"3","author":"PZ Shah","year":"2014","unstructured":"Shah PZ, Prabhu SU (2014) Hybrid learning-based branch predictor. Int J Eng Res Technol 3(8):1135\u20131139","journal-title":"Int J Eng Res Technol"},{"key":"3778_CR21","doi-asserted-by":"crossref","unstructured":"Skadron K, Martonosi M, Clark DW (2000) A taxonomy of branch mispredictions, and alloyed prediction as a robust solution to wrong-history mispredictions. Proceedings International Conference on Parallel Architectures and Compilation Techniques. pp 1\u20138","DOI":"10.1109\/PACT.2000.888344"},{"key":"3778_CR22","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1016\/j.micpro.2016.11.017","volume":"49","author":"RA Starke","year":"2017","unstructured":"Starke RA, Carminati A, de Oliveira RS (2017) Evaluation of a low overhead predication system for a deterministic VLIW architecture targeting real-time applications. Microprocess Microsyst 49:1\u20138. https:\/\/doi.org\/10.1016\/j.micpro.2016.11.017","journal-title":"Microprocess Microsyst"},{"key":"3778_CR23","doi-asserted-by":"publisher","unstructured":"Su X, Wu H, Yang Q (2016) An efficient wcet-aware hybrid global branch prediction approach. Proceedings-2016 IEEE 22nd International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2016. pp 195\u2013201. https:\/\/doi.org\/https:\/\/doi.org\/10.1109\/RTCSA.2016.46","DOI":"10.1109\/RTCSA.2016.46"},{"key":"3778_CR24","unstructured":"Sweety N, Chaudhary P (2021) Towards the improving branch instructions identification in high-performance processors issues, challenges and techniques. Recent advances in computer science and communications. https:\/\/www.eurekaselect.com\/node\/191298\/article\/towards-the-improving-branch-instructions-identification-in-high-performance-processors-issues-challenges-and-techniques"},{"issue":"15","key":"3778_CR25","first-page":"2843","volume":"119","author":"N Sweety","year":"2018","unstructured":"Sweety N, Chaudhary P (2018) Branch prediction techniques used in pipeline processors: a review. Int J Pure Appl Math 119(15):2843\u20132851","journal-title":"Int J Pure Appl Math"},{"key":"3778_CR26","unstructured":"Tripathy AK, Mishra P (2011) A novel approach for branch prediction using SVM. Int J Adv Res Comput Sci 2(1)"},{"key":"3778_CR27","doi-asserted-by":"publisher","first-page":"86230","DOI":"10.1109\/ACCESS.2020.2992643","volume":"8","author":"L Zhang","year":"2020","unstructured":"Zhang L, Wu N, Ge F, Zhou F, Yahya MR (2020) A dynamic branch predictor based on parallel structure of SRNN. IEEE Access 8:86230\u201386237. https:\/\/doi.org\/10.1109\/ACCESS.2020.2992643","journal-title":"IEEE Access"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-021-03778-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s11227-021-03778-5\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-021-03778-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,9,8]],"date-time":"2021-09-08T09:30:24Z","timestamp":1631093424000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s11227-021-03778-5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,4,6]]},"references-count":27,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2021,10]]}},"alternative-id":["3778"],"URL":"https:\/\/doi.org\/10.1007\/s11227-021-03778-5","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,4,6]]},"assertion":[{"value":"25 March 2021","order":1,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"6 April 2021","order":2,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}