{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T07:38:54Z","timestamp":1740123534199,"version":"3.37.3"},"reference-count":26,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[2021,7,26]],"date-time":"2021-07-26T00:00:00Z","timestamp":1627257600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,7,26]],"date-time":"2021-07-26T00:00:00Z","timestamp":1627257600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2022,2]]},"DOI":"10.1007\/s11227-021-03999-8","type":"journal-article","created":{"date-parts":[[2021,7,26]],"date-time":"2021-07-26T20:03:28Z","timestamp":1627329808000},"page":"3425-3447","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Performance-aware cache management for energy-harvesting nonvolatile processors"],"prefix":"10.1007","volume":"78","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9462-3983","authenticated-orcid":false,"given":"Yan","family":"Wang","sequence":"first","affiliation":[]},{"given":"Kenli","family":"Li","sequence":"additional","affiliation":[]},{"given":"Xia","family":"Deng","sequence":"additional","affiliation":[]},{"given":"Keqin","family":"Li","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2021,7,26]]},"reference":[{"key":"3999_CR1","unstructured":"Embench: a modern embedded benchmark suite: [online]. https:\/\/lists.librecores.org\/listinfo\/embench"},{"key":"3999_CR2","unstructured":"Mibench: [online]. http:\/\/www.eecs.umich.edu\/mibench\/"},{"key":"3999_CR3","unstructured":"Measurement and instrumentation data center (MIDC) [online] (2020). http:\/\/www.nrel.gov\/midc\/"},{"key":"3999_CR4","doi-asserted-by":"crossref","unstructured":"Albaseer A, Abdallah MM, Al-Fuqaha A, Erbad A (2021) Fine-grained data selection for improved energy efficiency of federated edge learning, Hamad Bin Khlifa University. arXiv:2106.12561","DOI":"10.1109\/TNSE.2021.3100805"},{"issue":"2","key":"3999_CR5","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/2024716.2024718","volume":"39","author":"N Binkert","year":"2011","unstructured":"Binkert N, Beckmann B, Black G, Reinhardt SK, Saidi A, Basu A, Hestness J, Hower DR, Krishna T, Sardashti S et al (2011) The gem5 simulator. ACM SIGARCH Comput Arch News 39(2):1\u20137","journal-title":"ACM SIGARCH Comput Arch News"},{"key":"3999_CR6","doi-asserted-by":"crossref","unstructured":"Cronin P, Yang C, Zhou D, Qiu K, Shi X, Liu Y (2017) \u2018The danger of sleeping\u2019, an exploration of security in non-volatile processors.\u00a0In: 2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) 2017, pp 121\u2013126","DOI":"10.1109\/AsianHOST.2017.8354006"},{"key":"3999_CR7","doi-asserted-by":"crossref","unstructured":"Fan W, Zhang Y, Song W, Zhao M, Shen Z, Jia Z (2020) Q-learning based backup for energy harvesting powered embedded systems. In: 2020 design, automation and test in Europe conference and exhibition (DATE). IEEE, pp 1247\u20131252","DOI":"10.23919\/DATE48585.2020.9116561"},{"issue":"4","key":"3999_CR8","doi-asserted-by":"publisher","first-page":"29","DOI":"10.1109\/MCAS.2017.2757081","volume":"17","author":"M Habibzadeh","year":"2017","unstructured":"Habibzadeh M, Hassanalieragh M, Ishikawa A, Soyata T, Sharma G (2017) Hybrid solar-wind energy harvesting for embedded applications: supercapacitor-based system architectures and design tradeoffs. IEEE Circuits Syst Mag 17(4):29\u201363","journal-title":"IEEE Circuits Syst Mag"},{"issue":"7","key":"3999_CR9","doi-asserted-by":"publisher","first-page":"1132","DOI":"10.1109\/TC.2016.2642180","volume":"66","author":"M Jalili","year":"2016","unstructured":"Jalili M, Sarbazi-Azad H (2016) Endurance-aware security enhancement in non-volatile memories using compression and selective encryption. IEEE Trans Comput 66(7):1132\u20131144","journal-title":"IEEE Trans Comput"},{"key":"3999_CR10","doi-asserted-by":"crossref","unstructured":"Jog A, Mishra AK, Xu C, Xie Y, Narayanan V, Iyer R, Das CR (2012) Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPS. In: DAC Design Automation Conference 2012. IEEE, pp 243\u2013252","DOI":"10.1145\/2228360.2228406"},{"issue":"9","key":"3999_CR11","doi-asserted-by":"publisher","first-page":"1671","DOI":"10.1109\/TVLSI.2018.2825605","volume":"26","author":"J Li","year":"2018","unstructured":"Li J, Liu Y, Li H, Yuan Z, Fu C, Yue J, Feng X, Xue CJ, Hu J, Yang H (2018) Path: performance-aware task scheduling for energy-harvesting nonvolatile processors. IEEE Trans Very Large Scale Integr Syst 26(9):1671\u20131684","journal-title":"IEEE Trans Very Large Scale Integr Syst"},{"key":"3999_CR12","doi-asserted-by":"crossref","unstructured":"Li Q, Zhao M, Hu J, Liu Y, He Y, Xue CJ (2015) Compiler directed automatic stack trimming for efficient non-volatile processors. In: 2015 52nd ACM\/EDAC\/IEEE Design Automation Conference (DAC). IEEE, pp 1\u20136","DOI":"10.1145\/2744769.2744809"},{"issue":"7","key":"3999_CR13","doi-asserted-by":"publisher","first-page":"3037","DOI":"10.1109\/TED.2017.2707664","volume":"64","author":"X Li","year":"2017","unstructured":"Li X, Ma K, George S, Khwa W-S, Sampson J, Gupta S, Liu Y, Chang M-F, Datta S, Narayanan V (2017) Design of nonvolatile SRAM with ferroelectric FETs for energy-efficient backup and restore. IEEE Trans Electron Dev 64(7):3037\u20133040","journal-title":"IEEE Trans Electron Dev"},{"key":"3999_CR14","doi-asserted-by":"crossref","unstructured":"Liang X, Canal R, Wei G-Y, Brooks D (2007) Process variation tolerant 3t1d-based cache architectures. In: 40th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO 2007). IEEE, pp 15\u201326","DOI":"10.1109\/MICRO.2007.40"},{"issue":"3","key":"3999_CR15","doi-asserted-by":"publisher","first-page":"60","DOI":"10.1145\/2508148.2485928","volume":"41","author":"J Liu","year":"2013","unstructured":"Liu J, Jaiyen B, Kim Y, Wilkerson C, Mutlu O (2013) An experimental study of data retention behavior in modern dram devices: Implications for retention time profiling mechanisms. ACM SIGARCH Comput Arch News 41(3):60\u201371","journal-title":"ACM SIGARCH Comput Arch News"},{"issue":"10","key":"3999_CR16","doi-asserted-by":"publisher","first-page":"1660","DOI":"10.1109\/TCAD.2017.2648841","volume":"36","author":"Y Liu","year":"2017","unstructured":"Liu Y, Yue J, Li H, Zhao Q, Zhao M, Xue CJ, Sun G, Chang M-F, Yang H (2017) Data backup optimization for nonvolatile SRAM in energy harvesting sensor nodes. IEEE Trans Comput Aided Des Integr Circuits Syst 36(10):1660\u20131673","journal-title":"IEEE Trans Comput Aided Des Integr Circuits Syst"},{"issue":"4","key":"3999_CR17","doi-asserted-by":"publisher","first-page":"498","DOI":"10.1109\/TC.2018.2879103","volume":"68","author":"W Song","year":"2018","unstructured":"Song W, Zhou Y, Zhao M, Ju L, Xue CJ, Jia Z (2018) EMC: energy-aware morphable cache design for non-volatile processors. IEEE Trans Comput 68(4):498\u2013509","journal-title":"IEEE Trans Comput"},{"issue":"3","key":"3999_CR18","doi-asserted-by":"publisher","first-page":"443","DOI":"10.1109\/SURV.2011.060710.00094","volume":"13","author":"S Sudevalayam","year":"2010","unstructured":"Sudevalayam S, Kulkarni P (2010) Energy harvesting sensor nodes: survey and implications. IEEE Commun Surv Tutor 13(3):443\u2013461","journal-title":"IEEE Commun Surv Tutor"},{"key":"3999_CR19","doi-asserted-by":"crossref","unstructured":"Wang Y, Jia H, Liu Y, Xue CJ, Yang H, et\u00a0al (2014) Register allocation for hybrid register architecture in nonvolatile processors. In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, pp 1050\u20131053","DOI":"10.1109\/ISCAS.2014.6865319"},{"key":"3999_CR20","doi-asserted-by":"crossref","unstructured":"Wang Y, Liu J, Hu J (2020) Communication-aware task scheduling for energy-harvesting nonvolatile processors.\u00a0IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020, 28(8):1796-1806","DOI":"10.1109\/TVLSI.2020.2978543"},{"issue":"11","key":"3999_CR21","doi-asserted-by":"publisher","first-page":"1804","DOI":"10.1109\/TCAD.2017.2666606","volume":"36","author":"M Zhao","year":"2017","unstructured":"Zhao M, Fu C, Li Z, Li Q, Xie M, Liu Y, Hu J, Jia Z, Xue CJ (2017) Stack-size sensitive on-chip memory backup for self-powered nonvolatile processors. IEEE Trans Comput Aided Des Integr Circuits Syst 36(11):1804\u20131816","journal-title":"IEEE Trans Comput Aided Des Integr Circuits Syst"},{"key":"3999_CR22","doi-asserted-by":"crossref","unstructured":"Zhao M, Li Q, Xie M, Liu Y, Hu J, Xue CJ (2015) Software assisted non-volatile register reduction for energy harvesting based cyber-physical system. In: 2015 Design, Automation and Test in Europe Conference and Exhibition (DATE). IEEE, pp 567\u2013572","DOI":"10.7873\/DATE.2015.0619"},{"key":"3999_CR23","doi-asserted-by":"crossref","unstructured":"Zhao M, Qiu K, Xie Y, Hu J, Xue CJ (2016) Redesigning software and systems for non-volatile processors on self-powered devices. In: 2016 IFIP\/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). IEEE, pp 1\u20136","DOI":"10.1109\/VLSI-SoC.2016.7753544"},{"key":"3999_CR24","doi-asserted-by":"crossref","unstructured":"Zhou D, Qiu K, Xu Y, Shi X, Liu Y (2018) A dual-threshold scheme along with security reinforcement for energy efficient nonvolatile processors. In: 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, pp 70\u201375","DOI":"10.1109\/ISVLSI.2018.00023"},{"key":"3999_CR25","doi-asserted-by":"crossref","unstructured":"Zhou Y, Zhao M, Ju L, Xue CJ, Li X, Jia Z (2017) Energy-aware morphable cache management for self-powered non-volatile processors. In: 2017 IEEE 23rd International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA). IEEE, pp 1\u20137","DOI":"10.1109\/RTCSA.2017.8046327"},{"issue":"2","key":"3999_CR26","doi-asserted-by":"publisher","first-page":"404","DOI":"10.1109\/TCSS.2020.2967749","volume":"7","author":"M Zhu","year":"2020","unstructured":"Zhu M, Pham H (2020) An empirical study of factor identification in smart health-monitoring wearable device. IEEE Trans Comput Soc Syst 7(2):404\u2013416","journal-title":"IEEE Trans Comput Soc Syst"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-021-03999-8.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s11227-021-03999-8\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-021-03999-8.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,2,7]],"date-time":"2022-02-07T13:16:01Z","timestamp":1644239761000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s11227-021-03999-8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,7,26]]},"references-count":26,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2022,2]]}},"alternative-id":["3999"],"URL":"https:\/\/doi.org\/10.1007\/s11227-021-03999-8","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"type":"print","value":"0920-8542"},{"type":"electronic","value":"1573-0484"}],"subject":[],"published":{"date-parts":[[2021,7,26]]},"assertion":[{"value":"12 July 2021","order":1,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"26 July 2021","order":2,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}