{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,10]],"date-time":"2025-10-10T00:37:50Z","timestamp":1760056670981,"version":"build-2065373602"},"reference-count":21,"publisher":"Springer Science and Business Media LLC","issue":"15","license":[{"start":{"date-parts":[[2025,10,9]],"date-time":"2025-10-09T00:00:00Z","timestamp":1759968000000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2025,10,9]],"date-time":"2025-10-09T00:00:00Z","timestamp":1759968000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"DOI":"10.1007\/s11227-025-07918-z","type":"journal-article","created":{"date-parts":[[2025,10,9]],"date-time":"2025-10-09T13:00:45Z","timestamp":1760014845000},"update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["CA-DDP: congestion-aware dynamic dimension prioritization for power-efficient routing algorithm in 3D Network-on-Chip"],"prefix":"10.1007","volume":"81","author":[{"given":"Jiao","family":"Li","sequence":"first","affiliation":[]},{"given":"Junyu","family":"Lu","sequence":"additional","affiliation":[]},{"given":"Feng","family":"Ran","sequence":"additional","affiliation":[]},{"given":"Aiying","family":"Guo","sequence":"additional","affiliation":[]},{"given":"Xuecheng","family":"Sun","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2025,10,9]]},"reference":[{"issue":"3","key":"7918_CR1","doi-asserted-by":"publisher","first-page":"718","DOI":"10.1109\/TC.2012.255","volume":"63","author":"M Ebrahimi","year":"2012","unstructured":"Ebrahimi M, Daneshtalab M, Liljeberg P et al (2012) Path-based partitioning methods for 3D networks-on-chip with minimal adaptive routing. IEEE Trans Comput 63(3):718\u2013733. https:\/\/doi.org\/10.1109\/TC.2012.255","journal-title":"IEEE Trans Comput"},{"issue":"10","key":"7918_CR2","doi-asserted-by":"publisher","first-page":"1676","DOI":"10.1109\/TC.2017.2698456","volume":"66","author":"X Wang","year":"2017","unstructured":"Wang X, Jiang Y, Yang M et al (2017) HRC: a 3D NoC architecture with genuine support for runtime thermal-aware task management. IEEE Trans Comput 66(10):1676\u20131688. https:\/\/doi.org\/10.1109\/TC.2017.2698456","journal-title":"IEEE Trans Comput"},{"issue":"1","key":"7918_CR3","doi-asserted-by":"publisher","first-page":"177","DOI":"10.1007\/s10586-017-0979-0","volume":"21","author":"A Karthikeyan","year":"2018","unstructured":"Karthikeyan A, Kumar PS (2018) GALS implementation of randomly prioritized buffer-less routing architecture for 3D NoC. Cluster Comput 21(1):177\u2013187. https:\/\/doi.org\/10.1007\/s10586-017-0979-0","journal-title":"Cluster Comput"},{"issue":"12","key":"7918_CR4","doi-asserted-by":"publisher","first-page":"2122","DOI":"10.1109\/TCPMT.2018.2842102","volume":"8","author":"R Dash","year":"2018","unstructured":"Dash R, Majumdar A, Pangracious V et al (2018) Atar: an adaptive thermal-aware routing algorithm for 3-D network-on-chip systems. IEEE Trans Compon Packag Manuf Technol 8(12):2122\u20132129. https:\/\/doi.org\/10.1109\/TCPMT.2018.2842102","journal-title":"IEEE Trans Compon Packag Manuf Technol"},{"key":"7918_CR5","doi-asserted-by":"publisher","unstructured":"Safari M, Rohbani N, Soleimani MA et al (2023) OCRA: an oblivious congested region avoiding routing algorithm for 3D NoCs. In: Proceedings of the 16th International Workshop on Network on Chip Architectures, pp 40\u201345. https:\/\/doi.org\/10.1145\/3610396.3618092","DOI":"10.1145\/3610396.3618092"},{"issue":"3","key":"7918_CR6","doi-asserted-by":"publisher","first-page":"389","DOI":"10.1145\/2024723.2000111","volume":"39","author":"AK Mishra","year":"2011","unstructured":"Mishra AK, Vijaykrishnan N, Das CR (2011) A case for heterogeneous on-chip interconnects for CMPs. ACM SIGARCH Comput Archit News 39(3):389\u2013400. https:\/\/doi.org\/10.1145\/2024723.2000111","journal-title":"ACM SIGARCH Comput Archit News"},{"key":"7918_CR7","doi-asserted-by":"publisher","unstructured":"Jheng KY, Chao CH, Wang HY et al (2010) Traffic-thermal mutual-coupling co-simulation platform for three-dimensional network-on-chip. In: Proceedings of 2010 International Symposium on VLSI Design, Automation and Test. IEEE, pp 135\u2013138. https:\/\/doi.org\/10.1109\/VDAT.2010.5496709","DOI":"10.1109\/VDAT.2010.5496709"},{"key":"7918_CR8","doi-asserted-by":"publisher","unstructured":"Ebrahimi M, Chang X, Daneshtalab M et al (2013) DyXYZ: fully adaptive routing algorithm for 3D NoCs. In: 2013 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing. IEEE, pp 499\u2013503. https:\/\/doi.org\/10.1109\/PDP.2013.80","DOI":"10.1109\/PDP.2013.80"},{"key":"7918_CR9","doi-asserted-by":"publisher","unstructured":"Su J, Chai C, Lei X et al (2016) Vertical-mesh-conscious-dynamic routing algorithm for fault-tolerant 3D NoC. In: 2016 2nd IEEE International Conference on Computer and Communications (ICCC). IEEE, pp 2004\u20132008. https:\/\/doi.org\/10.1109\/CompComm.2016.7925052","DOI":"10.1109\/CompComm.2016.7925052"},{"issue":"8","key":"7918_CR10","doi-asserted-by":"publisher","first-page":"8677","DOI":"10.1109\/TITS.2022.3203791","volume":"24","author":"Z Qu","year":"2022","unstructured":"Qu Z, Liu X, Zheng M (2022) Temporal-spatial quantum graph convolutional neural network based on Schr\u00f6dinger approach for traffic congestion prediction. IEEE Trans Intell Transp Syst 24(8):8677\u20138686. https:\/\/doi.org\/10.1109\/TITS.2022.3203791","journal-title":"IEEE Trans Intell Transp Syst"},{"issue":"2","key":"7918_CR11","doi-asserted-by":"publisher","first-page":"136","DOI":"10.3897\/jucs.123539","volume":"31","author":"KA Kiran","year":"2025","unstructured":"Kiran KA, Jacob J (2025) Power-aware application mapping onto 3D mesh-based network-on-chip using heuristic mapping algorithms. J Univ Comput Sci 31(2):136. https:\/\/doi.org\/10.3897\/jucs.123539","journal-title":"J Univ Comput Sci"},{"key":"7918_CR12","doi-asserted-by":"publisher","unstructured":"Kao SC, Yang CHH, Chen PY et al (2019) Reinforcement learning based interconnection routing for adaptive traffic optimization. In: Proceedings of the 13th IEEE\/ACM International Symposium on Metworks-on-Chip, pp 1\u20132. https:\/\/doi.org\/10.1145\/3313231.3352369","DOI":"10.1145\/3313231.3352369"},{"key":"7918_CR13","doi-asserted-by":"publisher","unstructured":"Chen KC, Kuo CC, Hung HS et al (2013) Traffic-and thermal-aware adaptive beltway routing for three-dimensional network-on-chip systems. In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, pp 1660\u20131663. https:\/\/doi.org\/10.1109\/ISCAS.2013.6572182","DOI":"10.1109\/ISCAS.2013.6572182"},{"issue":"1","key":"7918_CR14","doi-asserted-by":"publisher","first-page":"5","DOI":"10.1109\/LCA.2023.3339646","volume":"23","author":"A Gheibi-Fetrat","year":"2023","unstructured":"Gheibi-Fetrat A, Akbarzadeh N, Hessabi S et al (2023) Tulip: turn-free low-power network-on-chip. IEEE Comput Archit Lett 23(1):5\u20138. https:\/\/doi.org\/10.1109\/LCA.2023.3339646","journal-title":"IEEE Comput Archit Lett"},{"key":"7918_CR15","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2023.105989","volume":"142","author":"J Li","year":"2023","unstructured":"Li J, Qin C, Sun X (2023) An efficient adaptive routing algorithm for the co-optimization of fault tolerance and congestion awareness based on 3D NoC. Microelectron J 142:105989. https:\/\/doi.org\/10.1016\/j.mejo.2023.105989","journal-title":"Microelectron J"},{"key":"7918_CR16","doi-asserted-by":"publisher","DOI":"10.1016\/j.comnet.2024.110419","volume":"246","author":"S Wang","year":"2024","unstructured":"Wang S, Zhang X, Wang C et al (2024) DRLAR: a deep reinforcement learning-based adaptive routing framework for network-on-chips. Comput Netw 246:110419. https:\/\/doi.org\/10.1016\/j.comnet.2024.110419","journal-title":"Comput Netw"},{"issue":"23","key":"7918_CR17","doi-asserted-by":"publisher","DOI":"10.3390\/electronics12234867","volume":"12","author":"J Jiao","year":"2023","unstructured":"Jiao J, Shen R, Chen L et al (2023) RLARA: a TSV-aware reinforcement learning assisted fault-tolerant routing algorithm for 3D network-on-chip. Electronics 12(23):4867. https:\/\/doi.org\/10.3390\/electronics12234867","journal-title":"Electronics"},{"key":"7918_CR18","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2023.05.007","volume":"93","author":"A Gogoi","year":"2023","unstructured":"Gogoi A, Ghoshal B, Manna K (2023) Fault-aware routing approach for mesh-based network-on-chip architecture. Integration 93:102043. https:\/\/doi.org\/10.1016\/j.vlsi.2023.05.007","journal-title":"Integration"},{"issue":"4","key":"7918_CR19","doi-asserted-by":"publisher","DOI":"10.1002\/ett.4964","volume":"35","author":"Y Wang","year":"2024","unstructured":"Wang Y, Zhao H, Wang Y et al (2024) PKCA: a priori-knowledge and congestion-awareness method for adaptive routing algorithms in mesh architectures. Trans Emerg Telecommun Technol 35(4):e4964. https:\/\/doi.org\/10.1002\/ett.4964","journal-title":"Trans Emerg Telecommun Technol"},{"issue":"1","key":"7918_CR20","doi-asserted-by":"publisher","first-page":"523","DOI":"10.1007\/s11227-021-03906-1","volume":"78","author":"E Khodadadi","year":"2022","unstructured":"Khodadadi E, Barekatain B, Yaghoubi E et al (2022) FT-PDC: an enhanced hybrid congestion-aware fault-tolerant routing technique based on path diversity for 3D NoC. J Supercomput 78(1):523\u2013558. https:\/\/doi.org\/10.1007\/s11227-021-03906-1","journal-title":"J Supercomput"},{"issue":"5","key":"7918_CR21","doi-asserted-by":"publisher","first-page":"547","DOI":"10.1109\/TC.1987.1676939","volume":"100","author":"S Dally","year":"1987","unstructured":"Dally S (1987) Deadlock-free message routing in multiprocessor interconnection networks. IEEE Trans Comput 100(5):547\u2013553. https:\/\/doi.org\/10.1109\/TC.1987.1676939","journal-title":"IEEE Trans Comput"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-025-07918-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s11227-025-07918-z\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-025-07918-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,9]],"date-time":"2025-10-09T13:00:46Z","timestamp":1760014846000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s11227-025-07918-z"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10,9]]},"references-count":21,"journal-issue":{"issue":"15","published-online":{"date-parts":[[2025,10]]}},"alternative-id":["7918"],"URL":"https:\/\/doi.org\/10.1007\/s11227-025-07918-z","relation":{},"ISSN":["1573-0484"],"issn-type":[{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,10,9]]},"assertion":[{"value":"9 June 2025","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"24 September 2025","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"9 October 2025","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"The authors declare no competing interests.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Competing interests"}}],"article-number":"1429"}}