{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T03:11:18Z","timestamp":1761621078943},"reference-count":20,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2011,10,21]],"date-time":"2011-10-21T00:00:00Z","timestamp":1319155200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Real-Time Syst"],"published-print":{"date-parts":[[2012,3]]},"DOI":"10.1007\/s11241-011-9139-4","type":"journal-article","created":{"date-parts":[[2011,10,20]],"date-time":"2011-10-20T17:21:36Z","timestamp":1319131296000},"page":"166-197","source":"Crossref","is-referenced-by-count":20,"title":["Instruction cache locking for multi-task real-time embedded systems"],"prefix":"10.1007","volume":"48","author":[{"given":"Tiantian","family":"Liu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Minming","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chun Jason","family":"Xue","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2011,10,21]]},"reference":[{"key":"9139_CR1","volume-title":"The 14th international conference on real-time and network systems","author":"A Arnaud","year":"2006","unstructured":"Arnaud A, Puaut I (2006) Dynamic instruction cache locking in hard real-time systems. In: The 14th international conference on real-time and network systems"},{"key":"9139_CR2","doi-asserted-by":"crossref","first-page":"342","DOI":"10.1109\/IIT.2007.4430406","volume-title":"Innovations in information technology 2007","author":"A Asaduzzaman","year":"2007","unstructured":"Asaduzzaman A, Limbachiya N, Mahgoub I, Sibai FN (2007) Evaluation of I-Cache locking technique for real-time embedded systems. In: Innovations in information technology 2007, pp\u00a0342\u2013346"},{"key":"9139_CR3","volume-title":"IEEE real-time embedded system workshop","author":"AM Campoy","year":"2001","unstructured":"Campoy AM, Ivars AP, Busquets-Mataix JV (2001b) Static use of locking caches in multitask, preemptive real-time systems. In: IEEE real-time embedded system workshop"},{"key":"9139_CR4","first-page":"271","volume-title":"The international symposium on applied informatics","author":"AM Campoy","year":"2001","unstructured":"Campoy AM, Ivars AP, Busquets-Mataix JV (2001a) Using genetic algorithms in content selection for locking-caches. In: The international symposium on applied informatics, pp\u00a0271\u2013276"},{"key":"9139_CR5","first-page":"1283","volume-title":"IEEE Canadian conference on electrical and computer engineering","author":"AM Campoy","year":"2003","unstructured":"Campoy AM, Ivars AP, Rodriguez F, Busquets-Mataix JV (2003) Static use of locking caches vs dynamic use of locking caches for real-time systems. In: IEEE Canadian conference on electrical and computer engineering, pp\u00a01283\u20131286"},{"key":"9139_CR6","doi-asserted-by":"crossref","first-page":"49","DOI":"10.1109\/ECRTS.2005.34","volume-title":"The 17th Euromicro conference on real-time systems","author":"AM Campoy","year":"2005","unstructured":"Campoy AM, Puaut I, Ivars AP, Busquets-Mataix JV (2005) Cache contents selection for statically-locked instruction caches: an algorithm comparison. In: The 17th Euromicro conference on real-time systems, pp\u00a049\u201356"},{"key":"9139_CR7","volume-title":"The 15th world congress of the international federation of automatic control","author":"AM Campoy","year":"2007","unstructured":"Campoy AM, Ivars AP, Busquets-Mataix JV (2007) Dynamic use of locking caches in multitask, preemptive real-time systems. In: The 15th world congress of the international federation of automatic control"},{"key":"9139_CR8","doi-asserted-by":"crossref","first-page":"52","DOI":"10.1007\/s11241-008-9062-5","volume":"41","author":"S Chakraborty","year":"2009","unstructured":"Chakraborty S, Mitra T, Roychoudhury A, Thiele L (2009) Cache-aware timing analysis of streaming applications. Real-Time Syst 41:52\u201385","journal-title":"Real-Time Syst"},{"key":"9139_CR9","first-page":"143","volume-title":"The 5th IEEE\/ACM international conference on CODES+ISSS07","author":"H Falk","year":"2007","unstructured":"Falk H, Plazar S, Theiling H (2007) Compile-time decided instruction cache locking using worst-case execution paths. In: The 5th IEEE\/ACM international conference on CODES+ISSS07, pp\u00a0143\u2013148"},{"key":"9139_CR10","doi-asserted-by":"crossref","first-page":"416","DOI":"10.1145\/1057661.1057760","volume-title":"The 15th ACM Great Lakes symposium on VLSI","author":"A Gordon-Ross","year":"2005","unstructured":"Gordon-Ross A, Vahid F, Dutt N (2005) A\u00a0first look at the interplay of code reordering and configurable caches. In: The 15th ACM Great Lakes symposium on VLSI, pp\u00a0416\u2013421"},{"issue":"4","key":"9139_CR11","first-page":"437","volume":"1","author":"C Guillon","year":"2004","unstructured":"Guillon C, Rastello F, Bidault T, Bouchez F (2004) Procedure placement using temporal-ordering information: dealing with code size expansion. J\u00a0Embed Comput 1(4):437\u2013459","journal-title":"J\u00a0Embed Comput"},{"key":"9139_CR12","first-page":"690","volume-title":"DAC01","author":"M Kandemir","year":"2001","unstructured":"Kandemir M, Ramanujam J, Irwin MJ, Vijaykrishnan N, Kadayil I, Parikh A (2001) Dynamic management of scratchpad memory space. IN: DAC01, pp\u00a0690\u2013695"},{"issue":"9","key":"9139_CR13","doi-asserted-by":"crossref","first-page":"805","DOI":"10.1109\/32.950317","volume":"27","author":"C-G Lee","year":"2001","unstructured":"Lee C-G et al. (2001) Bounding cache-related preemption delay for real-time systems. IEEE Transactions on Software Engineering 27(9):805\u2013826","journal-title":"IEEE Transactions on Software Engineering"},{"key":"9139_CR14","first-page":"40","volume-title":"Real-time systems","author":"JWS Liu","year":"2000","unstructured":"Liu JWS (2000) Real-time systems. Prentice-Hall, New York, pp\u00a040\u201341"},{"key":"9139_CR15","doi-asserted-by":"crossref","unstructured":"Liu T, Li M, Xue CJ (2009a) Instruction cache locking for real-time embedded systems with multi-tasks. In: RTCSA09, pp\u00a0494\u2013499","DOI":"10.1109\/RTCSA.2009.59"},{"key":"9139_CR16","first-page":"35","volume-title":"RTAS09","author":"T Liu","year":"2009","unstructured":"Liu T, Li M, Xue CJ (2009b) Minimizing WCET for real-time embedded systems via static instruction cache locking. In: RTAS09, pp\u00a035\u201344"},{"key":"9139_CR17","first-page":"114","volume-title":"RTSS02","author":"I Puaut","year":"2002","unstructured":"Puaut I, Decotigny D (2002) Low-complexity algorithms for static cache locking in multitasking hard real-time systems. In: RTSS02, pp\u00a0114\u2013123"},{"key":"9139_CR18","first-page":"1484","volume-title":"DATE07","author":"I Puaut","year":"2007","unstructured":"Puaut I, Pais C (2007) Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison. In: DATE07, pp\u00a01484\u20131489"},{"key":"9139_CR19","doi-asserted-by":"crossref","first-page":"276","DOI":"10.1145\/951710.951747","volume-title":"The international conference on compilers, architectures and synthesis for embedded systems","author":"S Udayakumaran","year":"2003","unstructured":"Udayakumaran S, Barua R (2003) Compiler-decided dynamic memory allocation for scratch-pad based embedded systems. In: The international conference on compilers, architectures and synthesis for embedded systems, pp\u00a0276\u2013286"},{"issue":"4","key":"9139_CR20","doi-asserted-by":"crossref","first-page":"335","DOI":"10.1145\/1113841.1113842","volume":"2","author":"W Zhao","year":"2005","unstructured":"Zhao W, Whalley D, Healy C, Mueller F (2005) Improving WCET by applying a WC code-positioning optimization. ACM Trans Archit Code Optim 2(4):335\u2013365","journal-title":"ACM Trans Archit Code Optim"}],"container-title":["Real-Time Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11241-011-9139-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11241-011-9139-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11241-011-9139-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,18]],"date-time":"2019-06-18T06:39:02Z","timestamp":1560839942000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11241-011-9139-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,10,21]]},"references-count":20,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2012,3]]}},"alternative-id":["9139"],"URL":"https:\/\/doi.org\/10.1007\/s11241-011-9139-4","relation":{},"ISSN":["0922-6443","1573-1383"],"issn-type":[{"value":"0922-6443","type":"print"},{"value":"1573-1383","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,10,21]]}}}