{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,3]],"date-time":"2025-01-03T05:18:31Z","timestamp":1735881511098,"version":"3.32.0"},"reference-count":26,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2005,9,1]],"date-time":"2005-09-01T00:00:00Z","timestamp":1125532800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J VLSI Sign Process Syst Sign Image Video Technol"],"published-print":{"date-parts":[[2005,9]]},"DOI":"10.1007\/s11265-005-6646-3","type":"journal-article","created":{"date-parts":[[2005,7,8]],"date-time":"2005-07-08T13:28:43Z","timestamp":1120829323000},"page":"139-151","source":"Crossref","is-referenced-by-count":6,"title":["A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications"],"prefix":"10.1007","volume":"41","author":[{"given":"Hans-Joachim","family":"Stolberg","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mladen","family":"Berekovi\u0107","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peter","family":"Pirsch","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2005,9,1]]},"reference":[{"key":"6646_CR1","doi-asserted-by":"crossref","unstructured":"A. Peleg and U. Weiser, \u201cMMX Technology Extension to the Intel Architecture,\u201d IEEE Micro, Aug. 1996, pp. 42\u201350.","DOI":"10.1109\/40.526924"},{"issue":"4","key":"6646_CR2","doi-asserted-by":"crossref","first-page":"51","DOI":"10.1109\/40.526925","volume":"16","author":"R.B. Lee","year":"1996","unstructured":"R.B Lee, \u201cSubword Parallelism with MAX-2,\u201d IEEE Micro, vol. 16, no. 4, Aug. 1996, pp. 51\u201359.","journal-title":"IEEE Micro"},{"key":"6646_CR3","unstructured":"M. Phillip, et al., \u201cAltiVec Technology: Accelerating Media Processing Across the Spectrum,\u201d in Proc. Hot Chips 10, Aug. 1998."},{"issue":"6","key":"6646_CR4","doi-asserted-by":"crossref","first-page":"1203","DOI":"10.1109\/5.687835","volume":"86","author":"I. Kuroda","year":"1998","unstructured":"I. Kuroda and T. Nishitani, \u201cMultimedia processors,\u201d in Proc. IEEE, vol. 86, no. 6, 1998, pp. 1203\u20131221.","journal-title":"Proc. IEEE"},{"key":"6646_CR5","doi-asserted-by":"crossref","unstructured":"P.M. Kuhn and W. Stechele, \u201cComplexity Analysis of the Emerging MPEG-4 Standard as a Basis for VLSI Implementation,\u201d Vol. SPIE 3309 Visual Communication and Image Processing, San Jose, Jan. 1998, pp. 498\u2013509.","DOI":"10.1117\/12.298362"},{"key":"6646_CR6","unstructured":"MPEG, \u201cStreaming Video Profiles,\u201d Final Draft Amendment, Doc. ISO\/MPEG N3904, Pisa MPEG Meeting, Jan. 2001."},{"key":"6646_CR7","unstructured":"MPEG, \u201cCoding of Audio-Visual Objects\u2014Part 2: Visual, Amendment 1: Visual Extensions,\u201d Doc. ISO\/MPEG 14496-2:1999\/Amd.1:2000, Maui, Dec. 1999."},{"issue":"2","key":"6646_CR8","doi-asserted-by":"crossref","first-page":"175","DOI":"10.1109\/92.238417","volume":"1","author":"A. Sharma","year":"1993","unstructured":"A. Sharma and R. Jain, \u201cEstimating Architectural Resources and Performance for High-Level Synthesis Applications,\u201d IEEE Trans. Very Large Scale Integration (VLSI) Systems, vol. 1, no. 2, June 1993, pp. 175\u2013190.","journal-title":"IEEE Trans. Very Large Scale Integration (VLSI) Systems"},{"issue":"1","key":"6646_CR9","doi-asserted-by":"crossref","first-page":"669","DOI":"10.1109\/43.285240","volume":"13","author":"J.M. Rabaey","year":"1994","unstructured":"J.M. Rabaey and M. Potkonjak, \u201cEstimating Implementation Bounds for Real-Time DSP Application Specific Circuits,\u201d IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 13, no. 1, June 1994, pp. 669\u2013683.","journal-title":"IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems"},{"key":"6646_CR10","doi-asserted-by":"crossref","unstructured":"J. Gong, D.D. Gajski, and S. Narayan, \u201cSoftware Estimation Using a Generic-Processor Model,\u201d in Proc. European Design and Test Conference, March 1995, pp. 498\u2013502.","DOI":"10.1109\/EDTC.1995.470355"},{"key":"6646_CR11","unstructured":"F. Auguin, C. Belleudy, G. Gognat, and C. Kieffer, \u201cSoftware Performance Estimation of DSPs for HW\/SW Partitioning,\u201d in Proc. IFIP Workshop on Logic and Architecture Synthesis, Dec. 1995."},{"key":"6646_CR12","doi-asserted-by":"crossref","unstructured":"K. Suzuki and A. Sangiovanni-Vincentelli, \u201cEfficient Software Performance Estimation Methods for Hardware\/Software Codesign,\u201d in Proc. Design Automation Conference, 1996, pp. 605\u2013610.","DOI":"10.1145\/240518.240633"},{"key":"6646_CR13","doi-asserted-by":"crossref","unstructured":"J.R. Bammi, W. Kruijtzer, L. Lavagno, E. Harcourt, and M. T. Lazarescu, \u201cSoftware Performance Estimation Strategies in a System-Level Design Tool,\u201d in Proc. 8th International Workshop on Hardware\/Software Codesign, Dec. 2000, pp. 82\u201386.","DOI":"10.1145\/334012.334028"},{"key":"6646_CR14","doi-asserted-by":"crossref","unstructured":"P. Giusto, G. Martin, and E. Harcourt, \u201cReliable Estimation of Execution Time of Embedded Software,\u201d in Proc. Design, Automation and Test in Europe (DATE\u201901), March 2001, pp. 580\u2013589.","DOI":"10.1109\/DATE.2001.915082"},{"key":"6646_CR15","doi-asserted-by":"crossref","unstructured":"G. Bontempi and W. Kruijtzer, \u201cA Data Analysis Method for Software Performance Prediction,\u201d in Proc. 2002 Design, Automation and Test in Europe Conference (DATE\u201902), Mar. 2002, pp. 971\u2013976.","DOI":"10.1109\/DATE.2002.998417"},{"key":"6646_CR16","doi-asserted-by":"crossref","unstructured":"P. Lapsley and G. Blalock, \u201cHow to Estimate DSP Processor Performance,\u201d IEEE Spectrum, July 1996, pp. 74\u201378.","DOI":"10.1109\/6.526871"},{"issue":"1","key":"6646_CR17","doi-asserted-by":"crossref","first-page":"6","DOI":"10.1109\/7384.928306","volume":"1","author":"L. Benini","year":"2001","unstructured":"L. Benini, G. de Micheli, and E. Macii, \u201cDesigning Low-Power Circuits: Practical Recipes,\u201d IEEE Circuits and Systems Magazine, vol. 1, no. 1, March 2001, pp. 6\u201325.","journal-title":"IEEE Circuits and Systems Magazine"},{"key":"6646_CR18","unstructured":"T. Lan, Y. Chen, and Z. Zhong, \u201cMPEG2 Decoding Complexity Regulation for a Media Processor,\u201d in Proc. 2001 Workshop on Multimedia Signal Processing, Oct. 2001, pp. 193\u2013198."},{"key":"6646_CR19","unstructured":"MPEG, \u201cMPEG-4 Video Verification Model Version 15.0,\u201d Doc. ISO\/MPEG N3093, Maui, Dec. 1999."},{"key":"6646_CR20","unstructured":"MPEG, \u201cMoMuSys Implementation of the VM (VM-991029),\u201d Doc. ISO\/MPEG N2918, Melbourne, Oct. 1999."},{"key":"6646_CR21","doi-asserted-by":"crossref","unstructured":"G. Hovden and N. Ling, \u201cOn Speed Optimization of MPEG-4 Decoder for Real-Time Multimedia Applications,\u201d in Proc. 3rd Int. Conf. Computational Intelligence and Multimedia Applications, New Delhi, Sep. 1999, pp. 399\u2013402.","DOI":"10.1109\/ICCIMA.1999.798563"},{"key":"6646_CR22","doi-asserted-by":"crossref","unstructured":"H.-J. Stolberg, M. Berekovi\u0107, P. Pirsch, and H. Runge, \u201cThe MPEG-4 Advanced Simple Profile\u2014A Complexity Study,\u201d in Proc. IEEE 2nd Workshop and Exhibition on MPEG-4, 2001, pp. 33\u201336.","DOI":"10.1109\/MPEG.2001.996441"},{"issue":"1","key":"6646_CR23","doi-asserted-by":"crossref","first-page":"27","DOI":"10.1023\/A:1008188618930","volume":"23","author":"M. Berekovi\u0107","year":"1999","unstructured":"M. Berekovi\u0107, H.-J. Stolberg, M. B. Kulaczewski, P. Pirsch, H. M\u00f6ller, H. Runge, J. Kneip, and B. Stabernack, \u201cInstruction Set Extensions for MPEG-4 Video,\u201d Journal of VLSI Signal Processing Systems, vol. 23, no. 1, Oct. 1999, pp. 27\u201350.","journal-title":"Journal of VLSI Signal Processing Systems"},{"key":"6646_CR24","doi-asserted-by":"crossref","unstructured":"H.-J. Stolberg, M. Berekovi\u0107, P. Pirsch, H. Runge, H. M\u00f6ller, and J. Kneip, \u201cThe M-PIRE MPEG-4 CODEC DSP and its Macroblock Engine,\u201d in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), May 2000, pp. II 192\u2013195.","DOI":"10.1109\/ISCAS.2000.856291"},{"key":"6646_CR25","unstructured":"ARM Limited, \u201cARM9E-S Technical Reference Manual (Rev. 1),\u201d ARM DDI 0165B, Sep. 2000."},{"key":"6646_CR26","unstructured":"ARM Limited, \u201cADS 1.1 Debuggers Guide,\u201d ARM DUI 0066C, Nov. 2000."}],"container-title":["Journal of VLSI signal processing systems for signal, image and video technology"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-005-6646-3.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-005-6646-3\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-005-6646-3","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,2]],"date-time":"2025-01-02T12:32:49Z","timestamp":1735821169000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-005-6646-3"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,9]]},"references-count":26,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2005,9]]}},"alternative-id":["6646"],"URL":"https:\/\/doi.org\/10.1007\/s11265-005-6646-3","relation":{},"ISSN":["0922-5773"],"issn-type":[{"type":"print","value":"0922-5773"}],"subject":[],"published":{"date-parts":[[2005,9]]}}}