{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T15:58:03Z","timestamp":1761580683694},"reference-count":24,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2009,4,24]],"date-time":"2009-04-24T00:00:00Z","timestamp":1240531200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst Sign Image Video Technol"],"published-print":{"date-parts":[[2010,2]]},"DOI":"10.1007\/s11265-009-0362-3","type":"journal-article","created":{"date-parts":[[2009,4,23]],"date-time":"2009-04-23T14:35:04Z","timestamp":1240497304000},"page":"247-265","source":"Crossref","is-referenced-by-count":98,"title":["Variable Partitioning and Scheduling for MPSoC with Virtually Shared Scratch Pad Memory"],"prefix":"10.1007","volume":"58","author":[{"given":"Lei","family":"Zhang","sequence":"first","affiliation":[]},{"given":"Meikang","family":"Qiu","sequence":"additional","affiliation":[]},{"given":"Wei-Che","family":"Tseng","sequence":"additional","affiliation":[]},{"given":"Edwin H.-M.","family":"Sha","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2009,4,24]]},"reference":[{"key":"362_CR1","unstructured":"Banakar, R., Steinke, S., Lee, B.-S., Balakrishnan, M., & Marwedel, P. (2002). Scratchpad memory: A design alternative for cache on-chip memory in embedded systems. CODES \u201902: Proceedings of the tenth international symposium on Hardware\/software codesign (pp. 73\u201378)."},{"key":"362_CR2","unstructured":"Motorola Corporation (1998). Mmc2001 reference manual. http:\/\/www.motorola.com\/SPS\/MCORE\/info_documentation.htm ."},{"key":"362_CR3","unstructured":"Texas Instruments (1997). Tms370cx7x 8-bit microcontroller. http:\/\/www-s.ti.com\/sc\/psheets\/spns034c\/spns034c.pdf ."},{"key":"362_CR4","unstructured":"Motorola Corporation (2000). Cpu12 reference manual. http:\/\/e-www.motorola.com\/brdata\/PDFDB\/MICROCONTROLLERS\/16BIT\/68HC12FAMILY\/REFMAT\/CPU12RM.pdf ."},{"key":"362_CR5","doi-asserted-by":"crossref","unstructured":"Kandemir, M., Ramanujam, J., Irwin, J., Vijaykrishnan, N., Kadayif, I., & Parikh, A. (2001). Dynamic management of scratch-pad memory space. In DAC \u201901: Proceedings of the 38th conference on Design automation (pp. 690\u2013695).","DOI":"10.1145\/378239.379049"},{"key":"362_CR6","unstructured":"Xue, C., Shao, Z., Liu, M., Qiu, M., & Sha E. H.\u00a0M. (2006). Loop scheduling with complete memory latency hiding on multi-core architecture. In ICPADS \u201906: Proceedings of the 12th international conference on parallel and distributed systems (pp. 375\u2013382)."},{"key":"362_CR7","unstructured":"Chen, T.-F., & Baer, J.-L. (1998). A performance study of software and hardware data prefetching schemes. International Symposium on Computer Architecture, 223\u2013232."},{"issue":"6","key":"362_CR8","doi-asserted-by":"crossref","first-page":"604","DOI":"10.1109\/71.862210","volume":"11","author":"F Chen","year":"2000","unstructured":"Chen, F., ONeil, T.\u00a0W., & Sha, E. H.-M. (2000). Optimizing overall loop schedules using prefetching and partitioning. IEEE Transactions on Parallel and Distributed Systems, 11(6), 604\u2013614.","journal-title":"IEEE Transactions on Parallel and Distributed Systems"},{"key":"362_CR9","doi-asserted-by":"crossref","first-page":"926","DOI":"10.1155\/S1110865702205041","volume":"9","author":"Z Wang","year":"2002","unstructured":"Wang, Z., Sha, E. H.-M., & Wang, Y. (2002). Partitioning and scheduling dsp applications with maximal memory access hiding. EURASIP Journal on Applied Signal Processing, 9, 926\u2013935.","journal-title":"EURASIP Journal on Applied Signal Processing"},{"key":"362_CR10","doi-asserted-by":"crossref","unstructured":"Kandemir, M., Ramanujam, J., & Choudhury, A. (2002). Exploring shared scratch pad memory space in embedded multiprocessor system. In DAC \u201902: Proceedings of the 39th conference on design automation (pp. 219\u2013224).","DOI":"10.1145\/513918.513974"},{"key":"362_CR11","doi-asserted-by":"crossref","unstructured":"Terechko, A.,\u00a0Le Th\u00e9naff, E., & Corporaal, H. (2003). Cluster assignment of global values for clustered vliw processors. In CASES \u201903: Proceedings of the 2003 international conference on compilers, architecture and synthesis for embedded systems (pp. 32\u201340).","DOI":"10.1145\/951710.951717"},{"key":"362_CR12","doi-asserted-by":"crossref","unstructured":"Suhendra, V., Raghavan, C., & Mitra, T. (2006). Integrated scratchpad memory optimization and task scheduling for mpsoc architectures. In CASES \u201906: Proceedings of the 2006 international conference on compilers, architecture and synthesis for embedded systems (pp. 401\u2013410).","DOI":"10.1145\/1176760.1176809"},{"key":"362_CR13","unstructured":"Ozturk, O., Chen, G., Kandemir, M., & Karakoy, M. (2006). An integer linear programming based approach to simultaneous memory space partitioning and data allocation for chip multiprocessors. In ISVLSI \u201906: Proceedings of the IEEE computer society annual symposium on emerging VLSI technologies and architectures (p.\u00a050)."},{"key":"362_CR14","doi-asserted-by":"crossref","unstructured":"Vallerio, K.\u00a0S., & Jha, N.\u00a0K. (2003). Task graph extraction for embedded system synthesis. In VLSID \u201903: Proceedings of the 16th international conference on VLSI design (p. 480).","DOI":"10.1109\/ICVD.2003.1183180"},{"issue":"3","key":"362_CR15","doi-asserted-by":"crossref","first-page":"229","DOI":"10.1109\/43.594829","volume":"16","author":"L-F Chao","year":"1997","unstructured":"Chao, L.-F., LaPaugh, A.\u00a0S., & Sha, E.\u00a0H.-M. (1997). Rotation scheduling: A loop pipelining algorithm. IEEE Transactins on Computer-Aided Design, 16(3), 229\u2013239.","journal-title":"IEEE Transactins on Computer-Aided Design"},{"key":"362_CR16","doi-asserted-by":"crossref","unstructured":"Aiken, A., & Nicolau, A. (1988). Optimal loop parallelization. SIGPLAN Notices, 23(7).","DOI":"10.1145\/960116.54021"},{"issue":"12","key":"362_CR17","doi-asserted-by":"crossref","first-page":"1259","DOI":"10.1109\/71.640018","volume":"8","author":"L-F Chao","year":"1997","unstructured":"Chao, L.-F., & Sha, E.\u00a0H.-M. (1997). Scheduling data-flow graphs via retiming and unfolding. IEEE Transactions on Parallel and Distributed Systems, 8(12), 1259\u20131267.","journal-title":"IEEE Transactions on Parallel and Distributed Systems"},{"key":"362_CR18","unstructured":"Ozturk, O., Kandemir, M., Chen, G., Irwin, M.\u00a0J., & Karakoy, M. (2005). Customized on-chip memories for embedded chip multiprocessors. In ASP-DAC \u201905: Proceedings of the 2005 conference on Asia South Pacific design automation (pp. 743\u2013748)."},{"key":"362_CR19","doi-asserted-by":"crossref","unstructured":"Meftali, S., Gharsalli, F., Rousseau, F., & Jerraya, A.\u00a0A. (2001). An optimal memory allocation for application-specific multiprocessor system-on-chip. In ISSS \u201901: Proceedings of the 14th international symposium on systems synthesis (pp. 19\u201324).","DOI":"10.1145\/500001.500006"},{"issue":"3","key":"362_CR20","doi-asserted-by":"crossref","first-page":"682","DOI":"10.1145\/348019.348570","volume":"5","author":"PR Panda","year":"2000","unstructured":"Panda, P.\u00a0R., Dutt, N.\u00a0D., & Nicolau, A. (2000). On-chip vs. off-chip memory: The data partitioning problem in embedded processor-based systems. ACM Transactions on Design Automation of Electronic Systems, 5(3), 682\u2013704.","journal-title":"ACM Transactions on Design Automation of Electronic Systems"},{"issue":"4\/5","key":"362_CR21","doi-asserted-by":"crossref","first-page":"589","DOI":"10.1147\/rd.494.0589","volume":"49","author":"JA Kahle","year":"2005","unstructured":"Kahle, J.\u00a0A., Day, M.\u00a0N., Hofstee, H.\u00a0P., Johns, C.\u00a0R., Maeurer, T.\u00a0R., & Shippy, D. (2005). Introduction to the cell multiprocessor. IBM Journal of Research and Development, 49(4\/5), 589\u2013604.","journal-title":"IBM Journal of Research and Development"},{"key":"362_CR22","doi-asserted-by":"crossref","unstructured":"Guthaus, M.\u00a0R., Ringenberg, J.\u00a0S., Ernst, D., Austin, T.\u00a0M., Mudge, T., & Brown R.\u00a0B. (2001). Mibench: A free, commercially representative embedded benchmark suite. In WWC \u201901: Proceedings of the workload characterization, 2001. WWC-4. 2001 IEEE international workshop (pp.\u00a03\u201314).","DOI":"10.1109\/WWC.2001.990739"},{"key":"362_CR23","unstructured":"Valgrind (2009). Valgrind homepage. http:\/\/www.valgrind.org ."},{"key":"362_CR24","unstructured":"Chen G., Ozturk, O., Kandemir, M., & Irwin, M.\u00a0J. (2006). Multi-level on-chip memory hierachy design for embedded chip multiprocessor. In ICPADS \u201906: Proceedings of the 12th international conference on parallel and distributed system (pp.\u00a0383\u2013390)."}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-009-0362-3.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-009-0362-3\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-009-0362-3","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T08:19:31Z","timestamp":1559377171000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-009-0362-3"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,4,24]]},"references-count":24,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2010,2]]}},"alternative-id":["362"],"URL":"https:\/\/doi.org\/10.1007\/s11265-009-0362-3","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2009,4,24]]}}}