{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T07:39:50Z","timestamp":1648539590011},"reference-count":19,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[2010,12,15]],"date-time":"2010-12-15T00:00:00Z","timestamp":1292371200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2012,6]]},"DOI":"10.1007\/s11265-010-0568-4","type":"journal-article","created":{"date-parts":[[2010,12,15]],"date-time":"2010-12-15T19:02:33Z","timestamp":1292439753000},"page":"317-330","source":"Crossref","is-referenced-by-count":2,"title":["Design a Low-Power H.264\/AVC Baseline Decoder at All Abstraction Levels\u2014A Showcase"],"prefix":"10.1007","volume":"67","author":[{"given":"Ke","family":"Xu","sequence":"first","affiliation":[]},{"given":"Min","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Chiu Sing","family":"Choy","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2010,12,15]]},"reference":[{"key":"568_CR1","unstructured":"Team, J. V. (2003). Advanced video coding for generic audiovisual services, ITU-T Recommendation H.264 and ISO\/IEC 14496-10 AVC, May 2003."},{"issue":"7","key":"568_CR2","doi-asserted-by":"crossref","first-page":"560","DOI":"10.1109\/TCSVT.2003.815165","volume":"13","author":"T Wiegand","year":"2003","unstructured":"Wiegand, T., Sullivan, G. J., Bjontegaard, G., & Luthra, A. (2003). Overview of the H.264\/AVC video coding standard. IEEE Transactions on Circuits and Systems for Video Technology, 13(7), 560\u2013576.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"key":"568_CR3","unstructured":"Park, S., Cho, H. J., Jung, H., & Lee, D. D. (2005). An implemented of H.264 video decoder using hardware and software. IEEE Custom Integrated Circuits Conference, pp. 271\u2013275."},{"key":"568_CR4","unstructured":"Wu, D., Gao, W., Hu, M. Z., & Ji, Z. Z. (2003). A VLSI architecture design of CAVLC decoder. The 5th International Conference on ASIC, Oct. 2003, pp. 962\u2013965."},{"key":"568_CR5","doi-asserted-by":"crossref","unstructured":"Xu, K., Choy, C. S., Chan, C. F., & Pun, K. P. Priority-based heading one detector in H.264\/AVC decoding. EURASIP Journal on Embedded Systems, vol. 2007, Article ID 60834.","DOI":"10.1155\/2007\/60834"},{"key":"568_CR6","doi-asserted-by":"crossref","unstructured":"Xu, K., Choy, C. S., Chan, C. F., & Pun, K. P. (2006). A low-power bitstream controller for H.264\/AVC baseline decoding. 32nd European Solid-State Circuits Conference, pp. 162\u2013165, Sep 2006.","DOI":"10.1109\/ESSCIR.2006.307556"},{"key":"568_CR7","unstructured":"Wang, T. C., Huang, Y. W., Fang, H. C., & Chen, L. G. (2003). Parallel 4x4 2D transform and inverse transform architecture for MPEG-4 AVC\/H.264. IEEE International Symposium on Circuits and Systems, May 2003, pp. 800\u2013803."},{"key":"568_CR8","unstructured":"Kuo, Y. T., Lin, T. J., Liu, C. W., & Jen, C. W. (2005). Architecture for area-efficient 2-D transform in H.264\/AVC. IEEE International Conference on Multimedia and Expo, July 2005."},{"key":"568_CR9","unstructured":"Micron Semiconductor, SDRAM Power Caculator [Online]. Available: download.micron.com\/downloads\/misc\/SDRAM_Power_Calc_10.xls"},{"key":"568_CR10","unstructured":"Virtual Silicon Technology, \u201cHigh density single port SRAM product datasheet\u201d, 2006."},{"key":"568_CR11","unstructured":"Virtual Silicon Technology, \u201c0.18um I\/O Library\u201d, 2006."},{"key":"568_CR12","doi-asserted-by":"crossref","first-page":"378","DOI":"10.1109\/TCSVT.2004.842620","volume":"15","author":"YW Huang","year":"2005","unstructured":"Huang, Y. W., Hsieh, B. Y., Chen, T. C., & Chen, L. G. (2005). Analysis, fast algorithm, and VLSI architecture design for H.264\/AVC intra frame coder. IEEE Transaction on Circuits and Systems for Video Technology, 15, 378\u2013401.","journal-title":"IEEE Transaction on Circuits and Systems for Video Technology"},{"key":"568_CR13","unstructured":"Joint Video Team (JVT) reference software JM9.4 [Online]. Available: http:\/\/iphome.hhi.de\/suehring\/tml\/download\/"},{"key":"568_CR14","first-page":"2140","volume":"3","author":"TM Liu","year":"2005","unstructured":"Liu, T. M., Lee, W. P., Lin, T. A., & Lee, C. Y. (2005). A memory-efficient deblocking filter for H.264\/AVC video coding. IEEE International Symposium on Circuits and Systems, 3, 2140\u20132143.","journal-title":"IEEE International Symposium on Circuits and Systems"},{"key":"568_CR15","unstructured":"Kang, H. Y., Jeong, K. A., Bae, J. Y., Lee, Y. S., & Lee, S. H. (2004). MPEG4 AVC\/H.264 decoder with scalable bus architecture and dual memory controller. IEEE International Symposium on Circuits and Systems, May 2004, pp. 145\u2013148."},{"issue":"1","key":"568_CR16","doi-asserted-by":"crossref","first-page":"170","DOI":"10.1109\/JSSC.2006.886537","volume":"42","author":"CC Lin","year":"2007","unstructured":"Lin, C. C., et al. (2007). A 160kGate\/4.5\u00a0KB SRAM H.264 video decoder for HDTV applications. IEEE Journal of Solid-State Circuits, 42(1), 170\u2013182.","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"568_CR17","doi-asserted-by":"crossref","unstructured":"Chen, T. C., Lian, C. J., & Chen, L. G. (2006). Hardware architecture design of an H.264\/AVC video codec. Asia and South Pacific Conference on Design Automation, Jan 2006, pp. 750\u2013757.","DOI":"10.1145\/1118299.1118473"},{"key":"568_CR18","doi-asserted-by":"crossref","unstructured":"Hu, Y., Simpson, A., McAdoo, K., & Cush, J. (2004). A high definition H.264\/AVC hardware video decoder core for multimedia SoC\u2019s. IEEE International Symposium on Consumer Electronics, Sep. 2004, pp. 385\u2013389.","DOI":"10.1109\/ISCE.2004.1375974"},{"key":"568_CR19","doi-asserted-by":"crossref","unstructured":"Lin, T. A., Liu, T. M., & Lee, C. Y. (2005). A low-power H.264\/AVC decoder. IEEE International Symposium on VLSI Design, Automation and Test, April 2005, pp. 283\u2013286.","DOI":"10.1109\/VDAT.2005.1500076"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-010-0568-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-010-0568-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-010-0568-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,7]],"date-time":"2019-06-07T03:34:53Z","timestamp":1559878493000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-010-0568-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,12,15]]},"references-count":19,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2012,6]]}},"alternative-id":["568"],"URL":"https:\/\/doi.org\/10.1007\/s11265-010-0568-4","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,12,15]]}}}