{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T07:47:06Z","timestamp":1759132026232},"reference-count":41,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2012,10,6]],"date-time":"2012-10-06T00:00:00Z","timestamp":1349481600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2013,1]]},"DOI":"10.1007\/s11265-012-0694-2","type":"journal-article","created":{"date-parts":[[2012,10,5]],"date-time":"2012-10-05T04:14:00Z","timestamp":1349410440000},"page":"1-19","source":"Crossref","is-referenced-by-count":9,"title":["Survey of Low-Energy Techniques for Instruction Memory Organisations in Embedded Systems"],"prefix":"10.1007","volume":"70","author":[{"given":"Antonio","family":"Artes","sequence":"first","affiliation":[]},{"given":"Jose L.","family":"Ayala","sequence":"additional","affiliation":[]},{"given":"Jos","family":"Huisken","sequence":"additional","affiliation":[]},{"given":"Francky","family":"Catthoor","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2012,10,6]]},"reference":[{"key":"694_CR1","unstructured":"Van der Aa, T., Jayapala, M., Barat, F., Corporaal, H., Catthoor, F., Deconinck G. (2003). Software transformations to reduce instruction memory power consumption using a loop buffer. In Proceedings of code generation and optimization (pp. 1\u20133)."},{"key":"694_CR2","unstructured":"Acevedo, O. (2002). A Survey of software optimization techniques for low-power consumption. In Proceedings of computing research conference. University of Puerto Rico."},{"issue":"4","key":"694_CR3","doi-asserted-by":"crossref","first-page":"417","DOI":"10.1109\/92.645068","volume":"5","author":"RS Bajwa","year":"1997","unstructured":"Bajwa, R.S., Hiraki, M., Kojima, H., Gorny, D.J., Nitta, K., Shridhar, A., et al. (1997). Instruction buffering to reduce power in processors for signal processing. Journal of IEEE Transactions on VLSI Systems, 5(4), 417\u2013424.","journal-title":"Journal of IEEE Transactions on VLSI Systems"},{"key":"694_CR4","doi-asserted-by":"crossref","unstructured":"Bellas, N., Hajj, I., Polychronopoulos, C., Stamoulis, G. (1999). Energy and performance improvements in microprocessor design using a loop cache. In Proceedings of international conference on computer design (pp. 378\u2013383).","DOI":"10.1109\/ICCD.1999.808570"},{"issue":"1","key":"694_CR5","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1145\/605459.605461","volume":"2","author":"L Benini","year":"2003","unstructured":"Benini, L., Macii, A., Poncino, M. (2003). Energy-aware design of embedded memories: a survey of technologies, architectures, and optimization techniques. Journal of ACM Transactions of Embedded Computing System, 2(1), 5\u201332.","journal-title":"Journal of ACM Transactions of Embedded Computing System"},{"key":"694_CR6","doi-asserted-by":"crossref","unstructured":"Black-Schaffer, D., Balfour, J., Dally, W., Parikh, V., Park. J. (2008). Hierarchical instruction register organization. In Proceedings of the computer architecture letters (pp. 41\u201344).","DOI":"10.1109\/L-CA.2008.7"},{"key":"694_CR7","doi-asserted-by":"crossref","DOI":"10.1007\/978-90-481-9528-2","volume-title":"Ultra-low energy domain-specific instruction-set processors","author":"F Catthoor","year":"2010","unstructured":"Catthoor, F., Raghavan, P., Lambrechts, A., Jayapala, M., Kritikakou, A., Absar, J. (2010). Ultra-low energy domain-specific instruction-set processors. Berlin: Springer."},{"key":"694_CR8","unstructured":"Chalasani, S., & Conrad, J.M. (2008). A survey of energy harvesting sources for embedded systems. In Proceedings of IEEE southeast conference (pp. 442\u2013447)."},{"key":"694_CR9","volume-title":"Survey on power management techniques for energy efficient computer systems. CSU-ECE-TR-02-01","author":"W Chedid","year":"2002","unstructured":"Chedid, W., & Yu, C. (2002). Survey on power management techniques for energy efficient computer systems. CSU-ECE-TR-02-01. Cleveland: Cleveland State University."},{"key":"694_CR10","doi-asserted-by":"crossref","unstructured":"De Angel, E., & Swartzlander, E.E. (1997). Survey of low power techniques for ROMs. In Proceedings of international symposium on low power electronics and design (pp. 7\u201311).","DOI":"10.1145\/263272.263274"},{"key":"694_CR11","first-page":"1","volume":"1","author":"Z Ge","year":"2004","unstructured":"Ge, Z., Lim, H.B., Wong, W.F. (2004). Memory hierarchy hardware-software co-design in embedded systems. Journal of Computer Science, 1, 1\u20139.","journal-title":"Journal of Computer Science"},{"key":"694_CR12","doi-asserted-by":"crossref","unstructured":"Gomez, J.I., Marchal, P., Verdoorlaege, S., Pinuel, L., Catthoor, F. (2004). Optimizing the memory bandwidth with loop morphing. In Proceedings of the 15th IEEE international conference on application-specific systems, architectures, and processors (pp. 213\u2013223).","DOI":"10.1109\/ASAP.2004.1342472"},{"key":"694_CR13","unstructured":"Hennessy, J.L., & Patterson, D.A. (2007). Computer architecture\u2014A quantitative approach. In Denise E. M. Penrose. Morgan Kaufmann."},{"key":"694_CR14","unstructured":"Inoue, K., Moshnyaga, V.G., Murakarni, K. (2002). A history-based I-cache for low-energy multimedia applications. In Proceedings of international symposium on low power electronics and design (pp. 148\u2013153)."},{"key":"694_CR15","unstructured":"Intel Website (2012). http:\/\/www.intel.eu\/content\/www\/eu\/en\/homepage.html . Accessed 18 Sept 2012."},{"key":"694_CR16","doi-asserted-by":"crossref","unstructured":"Ishihara, T., & Yasuura, H. (2000). A power reduction technique with object code merging for application specific embedded processors. In Proceedings of the conference on design, automation and test in Europe (pp. 617\u2013623).","DOI":"10.1145\/343647.343871"},{"key":"694_CR17","unstructured":"Jayapala, M., Barat, F., Op De Beeck, P., Lauwereins, R., Catthoor, F., Deconinck G. (2001). Low energy clustered instruction fetch and split loop cache architecture for long instruction word processors. In Proceedings of the workshop on compilers and operating systems for low power (pp. 1\u20138)."},{"key":"694_CR18","doi-asserted-by":"crossref","unstructured":"Jouppi, N.P. (1990). Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers. In Proceedings of international symposium on computer architecture (pp. 364\u2013373).","DOI":"10.1145\/325096.325162"},{"key":"694_CR19","doi-asserted-by":"crossref","unstructured":"Kin, J., Gupta M., Mangione-Smith, W.H. (1997). The filter cache: an energy efficient memory structure. In Proceedings of international symposium on microarchitecture (pp. 184\u2013193).","DOI":"10.1109\/MICRO.1997.645809"},{"key":"694_CR20","doi-asserted-by":"crossref","unstructured":"Liveris, N., Zervas, N., Soudris, D., Goutis, C. (2002). A code transformation-based methodology for improving I-cache performance of DSP applications. In Proceedings of the conference on design, automation and test in Europe (pp. 977\u2013983).","DOI":"10.1109\/DATE.2002.998418"},{"key":"694_CR21","unstructured":"Marculescu, D. (2000). Profile-driven code execution for low power dissipation. In Proceedings of the international symposium on low power electronics and design (pp. 253\u2013255)."},{"key":"694_CR22","first-page":"44","volume":"8","author":"I Marin","year":"2005","unstructured":"Marin, I., Arceredillo, E., Zuloaga, A., Arias, J. (2005). Wireless sensor networks: a survey on ultra-low power-aware design. Journal of Transactions on Engineering, Computing and Technology, 8, 44\u201349.","journal-title":"Journal of Transactions on Engineering, Computing and Technology"},{"issue":"2","key":"694_CR23","doi-asserted-by":"crossref","first-page":"149","DOI":"10.1145\/375977.375978","volume":"6","author":"PR Panda","year":"2001","unstructured":"Panda, P.R., Catthoor, F., Dutt, N.D., Danckaert, K., Brockmeyer, E., Kulkarni, C., et al. (2001). Data and memory optimization techniques for embedded systems. Journal of ACM Transactions on Design, Automotation of Electronics Systems, 6(2), 149\u2013206.","journal-title":"Journal of ACM Transactions on Design, Automotation of Electronics Systems"},{"issue":"15","key":"694_CR24","doi-asserted-by":"crossref","first-page":"221","DOI":"10.1023\/A:1007907110303","volume":"3","author":"M Pedram","year":"1997","unstructured":"Pedram, M., & Vaishnav, H. (1997). Power optimization in VLSI layout: a survey. Journal of VLSI Signal Processing Systems, 3(15), 221\u2013232.","journal-title":"Journal of VLSI Signal Processing Systems"},{"issue":"6","key":"694_CR25","doi-asserted-by":"crossref","first-page":"16","DOI":"10.1145\/93548.93550","volume":"25","author":"K Pettis","year":"1990","unstructured":"Pettis, K., & Hansen, R.C. (1990). Profile guided code positioning. Journal of SIGPLAN Notices, 25(6), 16\u201327.","journal-title":"Journal of SIGPLAN Notices"},{"key":"694_CR26","doi-asserted-by":"crossref","unstructured":"Raghavan, P., Lambrechts, A., Jayapala, M., Catthoor, F., Verkest, D. (2006). Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors. In Proceedings of the design, automation, and test in Europe (pp. 1\u20136).","DOI":"10.1109\/DATE.2006.243733"},{"key":"694_CR27","doi-asserted-by":"crossref","unstructured":"Salhieh, A., Weinmann, J., Kochhal, M., Schwiebert, L. (2001). Power efficient topologies for wireless sensor networks. In Proceedings of parallel processing (pp. 156\u2013163).","DOI":"10.1109\/ICPP.2001.952059"},{"issue":"12","key":"694_CR28","doi-asserted-by":"crossref","first-page":"42","DOI":"10.1109\/MC.2002.1106178","volume":"35","author":"JP Scheible","year":"2002","unstructured":"Scheible, J.P. (2002). A survey of storage options. Journal of Computer, 35(12), 42\u201346.","journal-title":"Journal of Computer"},{"key":"694_CR29","doi-asserted-by":"crossref","unstructured":"Schwiebert, L., Gupta, S.K.S., Weinmann, J. (2001). Research challenges in wireless networks of biomedical sensors. In Proceedings of the international conference on mobile computing and networking (pp. 151\u2013165).","DOI":"10.1145\/381677.381692"},{"key":"694_CR30","unstructured":"Tang, W., Gupta, R., Nicolau, A. (2002). Power savings in embedded processors through decode filter cache. In Proceedings of the design, automation and test in Europe (pp. 443\u2013448)."},{"key":"694_CR31","volume-title":"Advanced memory optimization techniques for low-power embedded processors","author":"M Verma","year":"2007","unstructured":"Verma, M,. & Marwedel, P. (2007). Advanced memory optimization techniques for low-power embedded processors. Berlin: Springer."},{"key":"694_CR32","volume-title":"A study on the loop behavior of embedded programs. UCR-CSE-01-03","author":"J Villarreal","year":"2001","unstructured":"Villarreal, J., Lysecky, R., Cotterell, S., Vahid, F. (2001). A study on the loop behavior of embedded programs. UCR-CSE-01-03. Riverside: University of California."},{"key":"694_CR33","unstructured":"Virage Memories in Synopsys Website (2012). http:\/\/www.synopsys.com\/IP\/Pages\/default.aspx . Accessed 18 Sept 2012."},{"key":"694_CR34","doi-asserted-by":"crossref","unstructured":"Vivekanandarajah, K., Srikanthan, T., Bhattacharyya, S. (2004). Dynamic filter cache for low power instruction memory hierarchy. In Proceedings of the Euromicro symposium on digital system design (pp. 607\u2013610).","DOI":"10.1109\/DSD.2004.1333333"},{"issue":"1","key":"694_CR35","doi-asserted-by":"crossref","first-page":"44","DOI":"10.1109\/2.895117","volume":"34","author":"B Warneke","year":"2001","unstructured":"Warneke, B., Last, M., Liebowitz, B., Pister, K.S.J. (2001). Smart dust: communicating with a cubic-millimeter computer. Journal of Computer, 34(1), 44\u201351.","journal-title":"Journal of Computer"},{"issue":"4","key":"694_CR36","doi-asserted-by":"crossref","first-page":"47","DOI":"10.1145\/219282.219293","volume":"29","author":"GF Welch","year":"1995","unstructured":"Welch, G.F. (1995). A survey of power management techniques in mobile computing operating systems. Journal of SIGOPS Operating Systems Review, 29(4), 47\u201356.","journal-title":"Journal of SIGOPS Operating Systems Review"},{"issue":"1","key":"694_CR37","doi-asserted-by":"crossref","first-page":"165","DOI":"10.1109\/JPROC.2002.805823","volume":"91","author":"W Wolf","year":"2003","unstructured":"Wolf, W., & Kandemir, M. (2003). Memory system optimization of embedded software. Proceedings of the IEEE, 91(1), 165\u2013182.","journal-title":"Proceedings of the IEEE"},{"key":"694_CR38","doi-asserted-by":"crossref","unstructured":"Yassin, Y.H., Kjeldsberg, P.G., Hulzink, J., Romero, I., Huisken, J. (2009). Ultra low power application specific instruction-set processor design for a cardiac beat detector algorithm. In Proceedings of the NORCHIP (pp. 1\u20134).","DOI":"10.1109\/NORCHP.2009.5397828"},{"key":"694_CR39","doi-asserted-by":"crossref","unstructured":"Zhong, H., Fan, K., Mahlke, S., Schlansker, M. (2005). A distributed control path architecture for VLIW processors. In Proceedings of the international conference on parallel architectures and compilation techniques (pp. 197\u2013206).","DOI":"10.1109\/PACT.2005.5"},{"key":"694_CR40","doi-asserted-by":"crossref","unstructured":"Zhong, H., Lieberman, S.A., Mahlke, S.A. (2007). Extending multicore architectures to exploit hybrid parallelism in single-thread applications. In Proceedings of the international symposium on high performance computer architecture (pp. 25\u201336).","DOI":"10.1109\/HPCA.2007.346182"},{"key":"694_CR41","doi-asserted-by":"crossref","unstructured":"Zhou, Q., Xiong, H., Lin, H. (2007). Real-time performance analysis for wireless sensor networks. In Proceedings of network and parallel computing (pp. 337\u2013342).","DOI":"10.1109\/NPC.2007.80"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-012-0694-2.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-012-0694-2\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-012-0694-2","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,4]],"date-time":"2019-07-04T12:14:43Z","timestamp":1562242483000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-012-0694-2"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10,6]]},"references-count":41,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2013,1]]}},"alternative-id":["694"],"URL":"https:\/\/doi.org\/10.1007\/s11265-012-0694-2","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,10,6]]}}}