{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,6,22]],"date-time":"2024-06-22T01:34:59Z","timestamp":1719020099974},"reference-count":20,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2013,3,14]],"date-time":"2013-03-14T00:00:00Z","timestamp":1363219200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2013,11]]},"DOI":"10.1007\/s11265-013-0736-4","type":"journal-article","created":{"date-parts":[[2013,3,12]],"date-time":"2013-03-12T21:37:44Z","timestamp":1363124264000},"page":"123-136","source":"Crossref","is-referenced-by-count":14,"title":["Priority Based Error Correction Code (ECC) for the Embedded SRAM Memories in H.264 System"],"prefix":"10.1007","volume":"73","author":[{"given":"Insoo","family":"Lee","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jinmo","family":"Kwon","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jangwon","family":"Park","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jongsun","family":"Park","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2013,3,14]]},"reference":[{"key":"736_CR1","unstructured":"Chen, T.-C., Lian, C.-J., Chen, L.-G. (2006). Hardware architecture design of an H.264\/AVC Video Codec. In Proc. of IEEE international symposium on asia and south pacific design automation conference (pp. 750\u2013757)."},{"issue":"4","key":"736_CR2","doi-asserted-by":"crossref","first-page":"473","DOI":"10.1109\/4.126534","volume":"27","author":"AP Chandrakasan","year":"1992","unstructured":"Chandrakasan, A.P., Sheng, S., Brodersen, R.W. (1992). Low-power digital CMOS design. IEEE Journal of Solid-State Circuits, 27(4), 473\u2013484.","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"5","key":"736_CR3","doi-asserted-by":"crossref","first-page":"748","DOI":"10.1109\/JSSC.1987.1052809","volume":"sc-22","author":"E Seevinck","year":"1987","unstructured":"Seevinck, E., List, F.J., Lohstroh, J. (1987). Static-noise margin analysis of MOS SRAM cells. IEEE J. Solid-State Circuits, sc-22(5), 748.","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"4","key":"736_CR4","doi-asserted-by":"crossref","first-page":"956","DOI":"10.1109\/JSSC.2007.917509","volume":"44","author":"L Chang","year":"2008","unstructured":"Chang, L., Montoye, R.K., Nakamura, Y., Batson, K.A., Eickemeyer, R.J., Dennard, R.H., Haensch, W., Jamsek, D. (2008). An 8T-SRAM for variability tolerance and low-voltage operation in high-performance caches. IEEE J. Solid-State Circuits, 44(4), 956\u2013963.","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"3","key":"736_CR5","doi-asserted-by":"crossref","first-page":"680","DOI":"10.1109\/JSSC.2006.891726","volume":"42","author":"BH Calhoun","year":"2007","unstructured":"Calhoun, B.H., & Chandrakasan, A.P. (2007). A 256-kb 65-nm sub-threshold SRAM design for ultra-low-voltage operation. IEEE Journal of Solid-State Circuits, 42(3), 680\u2013688.","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"736_CR6","doi-asserted-by":"crossref","unstructured":"Qin, H., Kumar, A., Ramchandran, K., Rabaey, J., Ishwar, P. (2008). Error-tolerant SRAM design for ultra-low power standby operation. In Proc. IEEE int. symp. quality electron. Design (pp. 30\u201334).","DOI":"10.1109\/ISQED.2008.4479693"},{"key":"736_CR7","doi-asserted-by":"crossref","unstructured":"Kumar, A., Qin, H., Ishwar, P., Rabaey, J., Ramchandran, K. (2007). Fundamental redundancy versus power trade-off in standby SRAM. In Proc. IEEE Int. conf. acoust., speech signal process (pp. 85\u201388).","DOI":"10.1109\/ICASSP.2007.366178"},{"key":"736_CR8","unstructured":"Chang, L., Kang, K., Mukhopadhyay, S., Kim, C., Roy, K. (2005). Fast and accyrate estimation of nano-scaled sram read failure probability using critical point sampling. In IEEE Custom integrated circuits conference (Vol. 3, pp. 439\u2013442)."},{"key":"736_CR9","doi-asserted-by":"crossref","unstructured":"Chien, C., Lin, C., Shih, Y., Chen, H., Huang, C., Yu, C., Chen, C., Cheng, C., Guo, J. (2007). A 252kgate\/71mW multi-standard multi-channel video decoder for high definition video applications. In IEEE Int. solid-state circuits conf (Vol. 2, pp. 5\u20137).","DOI":"10.1109\/ISSCC.2007.373404"},{"key":"736_CR10","doi-asserted-by":"crossref","first-page":"180","DOI":"10.1109\/JSSC.2007.907998","volume":"43","author":"K Nii","year":"2008","unstructured":"Nii, K., Yabuuchi, M., Tsukamoto, Y., Ohbayashi, S., Imaoka, S., Makino, H., Yamagami, Y., Ishikura, S., Terano, T., Oashi, T., Hashimoto, K., Sebe, A., Okazaki, G., Satomi, K., Akamatsu, H., Shinohara, H. (2008). A 45-nm bulk CMOS embedded SRAM with improved immunity against process and temperature variations. IEEE Journal of Solid-State Circuits, 43, 180\u2013191.","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"6","key":"736_CR11","doi-asserted-by":"crossref","first-page":"673","DOI":"10.1109\/TCSVT.2006.873163","volume":"16","author":"T Chen","year":"2006","unstructured":"Chen, T., Chien, S., Huang, Y., Tsai, C., Chen, C., Chen, T., Chen, L. (2006). Analysis and architecture design of an HDTV720p 30 frames\/s H.264\/AVC encoder. IEEE Transactions on Circuits Systems & Video Technology, 16(6), 673\u2013688.","journal-title":"IEEE Transactions on Circuits Systems & Video Technology"},{"key":"736_CR12","unstructured":"Sullivan, G.J., Topiwala, P., Luthra, A. (2004). The H.264\/AVC advanced video coding standard: overview and introduction to the fidelity range extensions. In SPIE Annual conf. apps. of digital image processing XXVII, special session on advances in the new emerging standard H.264\/AVC (Vol. 74, p. 454)."},{"key":"736_CR13","unstructured":"Available online: ftp:\/\/ftp.tnt.uni-hannover.de\/pub\/svc\/testsequences\/ ."},{"issue":"3","key":"736_CR14","doi-asserted-by":"crossref","first-page":"397","DOI":"10.1109\/TDMR.2005.856487","volume":"5","author":"CW Slayman","year":"2005","unstructured":"Slayman, C.W. (2005). Cache and memory error detection, correction, and reduction techniques for terrestrial servers and workstations. IEEE Transactions on Development Matematicas Religion, 5(3), 397\u2013404.","journal-title":"IEEE Transactions on Development Matematicas Religion"},{"key":"736_CR15","doi-asserted-by":"crossref","DOI":"10.1002\/0471739219","volume-title":"Error correction codes: Mathematical methods and algorithms","author":"TK Moon","year":"2005","unstructured":"Moon, T.K. (2005). Error correction codes: Mathematical methods and algorithms. Hoboken, NJ: Wiley."},{"key":"736_CR16","doi-asserted-by":"crossref","first-page":"1412","DOI":"10.1109\/18.133259","volume":"37","author":"VK Wei","year":"1991","unstructured":"Wei, V.K. (1991). Generalized hamming weights for linear codes. IEEE Transactions on Information Theory, 37, 1412\u20131418.","journal-title":"IEEE Transactions on Information Theory"},{"key":"736_CR17","unstructured":"Thoziyoor, S., Muralimanohar, N., Ahn, J.H., Jouppi, N.P. (2008). CACTI 5.1, Tech. Rep. HPL-2008-20, HP Laboratories."},{"key":"736_CR18","doi-asserted-by":"crossref","first-page":"786","DOI":"10.1109\/18.382026","volume":"41","author":"I Krasikov","year":"1995","unstructured":"Krasikov, I., & Litsyn, S. (1995). On spectra of BCH codes. IEEE Transactions on Information Theory, 41, 786\u2013788.","journal-title":"IEEE Transactions on Information Theory"},{"key":"736_CR19","unstructured":"Joint Video Team (JVT). H.264\/AVC Reference software JM 16.0 [Online]. Available: http:\/\/iphome.hhi.de\/suehring\/tml\/ , 2011."},{"key":"736_CR20","unstructured":"Astro\u2122 User Guide (2007). Version Z-2007. Synopsys, Mountain View, CA, [Online]. Available: http:\/\/www.synopsys.com , 2011."}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-013-0736-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-013-0736-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-013-0736-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,10]],"date-time":"2019-07-10T18:54:40Z","timestamp":1562784880000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-013-0736-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,3,14]]},"references-count":20,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2013,11]]}},"alternative-id":["736"],"URL":"https:\/\/doi.org\/10.1007\/s11265-013-0736-4","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,3,14]]}}}