{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T21:58:21Z","timestamp":1648591101589},"reference-count":36,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2013,4,24]],"date-time":"2013-04-24T00:00:00Z","timestamp":1366761600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2013,11]]},"DOI":"10.1007\/s11265-013-0740-8","type":"journal-article","created":{"date-parts":[[2013,4,23]],"date-time":"2013-04-23T07:14:17Z","timestamp":1366701257000},"page":"161-179","source":"Crossref","is-referenced-by-count":2,"title":["An Adaptive Motion Estimation Architecture for H.264\/AVC"],"prefix":"10.1007","volume":"73","author":[{"given":"Yang","family":"Song","sequence":"first","affiliation":[]},{"given":"Ali","family":"Akoglu","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2013,4,24]]},"reference":[{"key":"740_CR1","volume-title":"Techniques and standards for image, video, and audio coding","author":"KR Rao","year":"1996","unstructured":"Rao, K.R., & Hwang, J.J. (1996). Techniques and standards for image, video, and audio coding. Upper Saddle River: Prentice Hall."},{"issue":"7","key":"740_CR2","doi-asserted-by":"crossref","first-page":"560","DOI":"10.1109\/TCSVT.2003.815165","volume":"13","author":"T Wiegand","year":"2003","unstructured":"Wiegand, T., Sullivan, G.J., Bjontegaard, G., Luthra, A. (2003). Overview of the H.264\/AVC video coding standard. IEEE Transactions On Circuits and Systems for Video Technology, 13(7), 560\u2013576.","journal-title":"IEEE Transactions On Circuits and Systems for Video Technology"},{"issue":"6","key":"740_CR3","doi-asserted-by":"crossref","first-page":"673","DOI":"10.1109\/TCSVT.2006.873163","volume":"16","author":"TC Chen","year":"2006","unstructured":"Chen, T.C., Chien, S.Y., Huang, Y.W., Tsai, C.H., Chen, C.Y., Chen, T.W., Chen, L.G. (2006). Analysis and architecture design of an HDTV720p 30 frames\/s H.264\/AVC encoder. IEEE Transactions on Circuits and Systems for Video Technology, 16(6), 673\u2013688.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"key":"740_CR4","unstructured":"Koga, T., Iinuma, K., Hirano, A., Iijima, Y., Ishiguro, T. (1981). Motion compensated interframe coding for video conferencing. In Proceedings national telecommunications conference (pp. G5.3.1\u2013G5.3). New Orleans, LA."},{"issue":"6","key":"740_CR5","first-page":"313","volume":"6","author":"LM Po","year":"1996","unstructured":"Po, L.M., & Ma, W.C. (1996). A novel four-step search algorithm for fast block motion estimation. IEEE Transactions on Circuits and Systems for Video Technology, 6(6), 313\u2013317.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"issue":"8","key":"740_CR6","first-page":"419","volume":"6","author":"LK Liu","year":"1996","unstructured":"Liu, L.K., & Peig, E. (1996). A block-based gradient descent search algorithm for block motion estimation in video coding. IEEE Transactions on Circuits and Systems for Video Technology, 6(8), 419\u2013423.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"issue":"2","key":"740_CR7","doi-asserted-by":"crossref","first-page":"287","DOI":"10.1109\/83.821744","volume":"9","author":"S Zhu","year":"2000","unstructured":"Zhu, S., & Ma, K.K. (2000). A new diamond search algorithm for fast block matching motion estimation. IEEE Transactions Image Processing, 9(2), 287\u2013290.","journal-title":"IEEE Transactions Image Processing"},{"issue":"5","key":"740_CR8","doi-asserted-by":"crossref","first-page":"349","DOI":"10.1109\/TCSVT.2002.1003474","volume":"12","author":"C Zhu","year":"2002","unstructured":"Zhu, C., Lin, X., Chau, L.P. (2002). Hexagon-based search pattern for fast block motion estimation. IEEE Transactions on Circuits and Systems for Video Technology, 12(5), 349\u2013355.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"key":"740_CR9","unstructured":"Tourapis, A.M., Au, O.C., Liou, M.L. (2001). Predictive motion vector field adaptive search technique (PMVFAST): Enhancing block-based motion estimation. In Proceedings of visual communications and image processing (VCIP \u201901), of Proceedings of SPIE (Vol. 4310, pp. 883\u2013892). San Jose, USA."},{"issue":"2","key":"740_CR10","doi-asserted-by":"crossref","first-page":"264","DOI":"10.1016\/j.jvcir.2004.12.002","volume":"17","author":"Z Chen","year":"2006","unstructured":"Chen, Z., Xu, J., He, Y., Zheng, J. (2006). Fast integer-pel and fractional-pel motion estimation for H.264\/AVC. Journal of Visual Communication and Image Representation, 17(2), 264\u2013290.","journal-title":"Journal of Visual Communication and Image Representation"},{"key":"740_CR11","doi-asserted-by":"crossref","unstructured":"Tourapis, A.M. (2002). Enhanced predictive zonal search for single and multiple frame motion estimation. In Proceedings of Viual Communications and Image Processing (VCIP \u201802), of Proceedings of SPIE (Vol. 4671, pp. 1069\u20131079). San Jose, USA.","DOI":"10.1117\/12.453031"},{"key":"740_CR12","unstructured":"CCITT Study Group XV, Working Party XV\/4, Specialists group on coding for visual telephony (1989). Description of Reference Model 8 (RM8), Doc. 525."},{"key":"740_CR13","unstructured":"ISO\/IEC CD 11172-2 (MPEG-1 Video) (1993). Information technology-coding of moving pictures and associated audio for digital storage media at up to about 1.5 Mbits\/s: Video."},{"key":"740_CR14","doi-asserted-by":"crossref","unstructured":"Song, Y., & Akoglu, A. (2011). Bit-by-Bit pipelined and hybrid-grained 2D architecture for motion estimation of H.264\/AVC. Journal of Signal Processing Systems, online first doi: 10.1007\/s11265-010-0575-5 .","DOI":"10.1007\/s11265-010-0575-5"},{"issue":"7","key":"740_CR15","doi-asserted-by":"crossref","first-page":"384","DOI":"10.1109\/TCSII.2004.829555","volume":"51","author":"SY Yap","year":"2004","unstructured":"Yap, S.Y., & McCanny, J.V. (2004). A VLSI architecture for variable block size video motion estimation. IEEE Transactions on Circuits and Systems for Video Technology II: Express Briefs, 51(7), 384\u2013389.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology II: Express Briefs"},{"issue":"3","key":"740_CR16","doi-asserted-by":"crossref","first-page":"1625","DOI":"10.1109\/TCE.2010.5606306","volume":"56","author":"A Celebi","year":"2010","unstructured":"Celebi, A., & Erturk, S. (2010). Bit plane matching based variable block size motion estimation method and its hardware architecture. IEEE Transactions on Consumer Electronics, 56(3), 1625\u20131633.","journal-title":"IEEE Transactions on Consumer Electronics"},{"issue":"2","key":"740_CR17","doi-asserted-by":"crossref","first-page":"749","DOI":"10.1109\/TCE.2007.381755","volume":"53","author":"L Zhang","year":"2007","unstructured":"Zhang, L., & Wen, G. (2007). Reusable architecture and complexity-controllable algorithm for the integer\/fractional motion estimation of H.264. IEEE Transactions on Consumer Electronics, 53(2), 749\u2013756.","journal-title":"IEEE Transactions on Consumer Electronics"},{"issue":"2","key":"740_CR18","doi-asserted-by":"crossref","first-page":"191","DOI":"10.1109\/TCSVT.2005.857780","volume":"16","author":"J Lee","year":"2006","unstructured":"Lee, J., Vijaykrishnan, N., Irwin, M.J., Wolf, W. (2006). An efficient architecture for motion estimation and compensation in the transform domain. IEEE Transactions on Circuits and Systems for Video Technology, 16(2), 191\u2013201.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"issue":"10","key":"740_CR19","doi-asserted-by":"crossref","first-page":"631","DOI":"10.1109\/TCSII.2005.850771","volume":"52","author":"HW Cheng","year":"2005","unstructured":"Cheng, H.W., & Dung, L.R. (2005). A content-based methodology for power-aware motion estimation architecture. IEEE Transactions on Circuits and Systems for Video Technology II: Express Briefs, 52(10), 631\u2013635.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology II: Express Briefs"},{"issue":"1","key":"740_CR20","doi-asserted-by":"crossref","first-page":"61","DOI":"10.1109\/76.981846","volume":"12","author":"JC Tuan","year":"2002","unstructured":"Tuan, J.C., Chang, T.S., Jen, C.W. (2002). On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture. IEEE Transactions on Circuits and Systems for Video Technology, 12(1), 61\u201372.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"issue":"4","key":"740_CR21","doi-asserted-by":"crossref","first-page":"1291","DOI":"10.1109\/TCE.2005.1561858","volume":"51","author":"C-M Ou","year":"2005","unstructured":"Ou, C.-M., Le, C.-F., Hwang, W.-J. (2005). An efficient VLSI architecture for H.264 variable block size motion estimation. IEEE Transaction on Consumer Electronics, 51(4), 1291\u20131299.","journal-title":"IEEE Transaction on Consumer Electronics"},{"key":"740_CR22","doi-asserted-by":"crossref","unstructured":"Kim, M., Hwang, I., Chae, S.I. (2005). A fast VLSI architecture for full-search variable block size motion estimation in MPEG-4 AVC\/H.264. In Proceedings of design automation conference (DAC), Asia and South Pacific (ASP) (Vol. 1, pp. 631\u2013634).","DOI":"10.1145\/1120725.1120980"},{"key":"740_CR23","doi-asserted-by":"crossref","unstructured":"Etoh, M., & Yoshimura, T. (2005). Advances in wireless video delivery. In Proceedings IEEE (Vol. 93, no. 1, pp. 111\u2013122).","DOI":"10.1109\/JPROC.2004.839605"},{"key":"740_CR24","unstructured":"Su, C.-L., & Jen, C.-W. (2000). Motion estimation using on-line arithmetic. In IEEE international symposium on circuits and systems (Vol. 1). Switzerland."},{"issue":"5","key":"740_CR25","doi-asserted-by":"crossref","first-page":"250","DOI":"10.1016\/j.micpro.2005.12.006","volume":"30","author":"J Olivares","year":"2006","unstructured":"Olivares, J., Hormigo, J., Villalba, J., Benavides, I., Zapata, E.L. (2006). SAD computation based on online arithmetic for motion estimation. Microprocessors and Microsystems, 30(5), 250\u2013258.","journal-title":"Microprocessors and Microsystems"},{"issue":"1","key":"740_CR26","first-page":"77","volume":"51","author":"BMH Li","year":"2008","unstructured":"Li, B.M.H., & Leong, P.H.W. (2008). Serial and parallel FPGA-based variable block size motion estimation processors. Journal of VLSI Signal Processing, 51(1), 77\u201398.","journal-title":"Journal of VLSI Signal Processing"},{"issue":"4","key":"740_CR27","doi-asserted-by":"crossref","first-page":"466","DOI":"10.1109\/TCSVT.2009.2014012","volume":"19","author":"J Vanne","year":"2009","unstructured":"Vanne, J., Aho, E., Kuusilinna, K., Hamalainen, T.D. (2009). A configurable motion estimation architecture for block-matching algorithms. IEEE Transactions on Circuits and Systems for Video Technology, 19(4), 466\u2013476.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"issue":"2","key":"740_CR28","doi-asserted-by":"crossref","first-page":"674","DOI":"10.1109\/TCE.2004.1309447","volume":"50","author":"ST Jung","year":"2004","unstructured":"Jung, S.T., & Lee, S.S. (2004). A 4-way pipelined processing architecture for three-step search block-matching motion estimation. IEEE Transactions on Consumer Electronics, 50(2), 674\u2013681.","journal-title":"IEEE Transactions on Consumer Electronics"},{"issue":"4","key":"740_CR29","doi-asserted-by":"crossref","first-page":"407","DOI":"10.1109\/76.313135","volume":"4","author":"HM Jong","year":"1994","unstructured":"Jong, H.M., Chen, L.G., Chiueh, T.D. (1994). Parallel architectures for 3-step hierarchical search block-matching algorithm. IEEE Transactions on Circuits and Systems for Video Technology, 4(4), 407\u2013416.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"issue":"8","key":"740_CR30","doi-asserted-by":"crossref","first-page":"1253","DOI":"10.1109\/4.705365","volume":"33","author":"TH Chen","year":"1998","unstructured":"Chen, T.H. (1998). A cost-effective three-step hierarchical search block-matching chip for motion estimation. IEEE Journal of Solid-State Circuits, 33(8), 1253\u20131258.","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"740_CR31","unstructured":"Zhang, X.D., & Tsui, C.Y. (1997). An efficient and reconfigurable Vlsi architecture for different block matching motion estimation algorithms. In IEEE international conference on acoustics, speech, and signal processing (ICASSP) (Vol. 1, pp. 603\u2013606). Munich, Germany."},{"issue":"5","key":"740_CR32","doi-asserted-by":"crossref","first-page":"568","DOI":"10.1109\/TCSVT.2007.894044","volume":"17","author":"TC Chen","year":"2007","unstructured":"Chen, T.C., Chen, Y.H., Tsai, S.F., Chien, S.Y., Chen, L.G. (2007). Fast algorithm and architecture design of low-power integer motion estimation for H.264\/AVC. IEEE Transactions on Circuits and Systems for Video Technology, 17(5), 568\u2013577.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"issue":"1","key":"740_CR33","doi-asserted-by":"crossref","first-page":"51","DOI":"10.1049\/ip-cdt:20030858","volume":"151","author":"S Saponara","year":"2004","unstructured":"Saponara, S., & Fanucci, L. (2004). Data-adaptive motion estimation algorithm and VLSI architecture design for low-power video systems. IEE Proceedings Computers and Digital Techniques, 151(1), 51\u201359.","journal-title":"IEE Proceedings Computers and Digital Techniques"},{"key":"740_CR34","unstructured":"Chao, W.M., Hsu, C.W., Chang, Y.C., Chen, L.G. (2002). A novel hybrid motion estimator supporting diamond search and fast full search. In Proceedings IEEE international symposium on circuits and systems (Vol. 2, pp. 492\u2013495). Phoenix-Scottsdale, AZ."},{"issue":"9","key":"740_CR35","doi-asserted-by":"crossref","first-page":"389","DOI":"10.1109\/TEC.1961.5219227","volume":"EC-10","author":"A Avizienis","year":"1961","unstructured":"Avizienis, A. (1961). Signed-digit number representations for fast parallel arithmetic. IRE Transactions Electornic Computers, EC-10(9), 389\u2013400.","journal-title":"IRE Transactions Electornic Computers"},{"issue":"4","key":"740_CR36","doi-asserted-by":"crossref","first-page":"52","DOI":"10.1109\/2.917539","volume":"34","author":"T Mudge","year":"2001","unstructured":"Mudge, T. (2001). Power: a first-class architectural design constraint. Computer, 34(4), 52\u201358.","journal-title":"Computer"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-013-0740-8.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-013-0740-8\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-013-0740-8","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,12]],"date-time":"2019-07-12T23:21:46Z","timestamp":1562973706000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-013-0740-8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,4,24]]},"references-count":36,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2013,11]]}},"alternative-id":["740"],"URL":"https:\/\/doi.org\/10.1007\/s11265-013-0740-8","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,4,24]]}}}