{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T12:11:41Z","timestamp":1649074301138},"reference-count":31,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2015,3,6]],"date-time":"2015-03-06T00:00:00Z","timestamp":1425600000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2016,7]]},"DOI":"10.1007\/s11265-015-0984-6","type":"journal-article","created":{"date-parts":[[2015,3,5]],"date-time":"2015-03-05T00:17:31Z","timestamp":1425514651000},"page":"123-137","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":4,"title":["Properties of Self-Timed Ring Architectures for Deadlock-Free and Consistent Configuration Reaching Maximum Throughput"],"prefix":"10.1007","volume":"84","author":[{"given":"Weiwen","family":"Jiang","sequence":"first","affiliation":[]},{"given":"Qingfeng","family":"Zhuge","sequence":"additional","affiliation":[]},{"given":"Xianzhang","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Lei","family":"Yang","sequence":"additional","affiliation":[]},{"given":"Juan","family":"Yi","sequence":"additional","affiliation":[]},{"given":"Edwin H.-M.","family":"Sha","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2015,3,6]]},"reference":[{"key":"984_CR1","doi-asserted-by":"crossref","unstructured":"Beerel, P.A., Lines, A., Davies, M., & Kim, N.H. (2006). Slack matching asynchronous designs. In Asynchronous Circuits and Systems, 2006. 12th IEEE International Symposium on, IEEE, pp. 11\u2013pp.","DOI":"10.1109\/ASYNC.2006.26"},{"key":"984_CR2","doi-asserted-by":"crossref","unstructured":"Bhattacharyya, S., Bambha, N., Khandelia, M., & Kianzad, V. (2001). Mapping dsp applications onto self-timed multiprocessors. In Signals, Systems and Computers, 2001. Conference Record of the Thirty-Fifth Asilomar Conference on, IEEE, (Vol. 1. pp. 441\u2013448).","DOI":"10.1109\/ACSSC.2001.986965"},{"issue":"3","key":"984_CR3","doi-asserted-by":"crossref","first-page":"13","DOI":"10.1145\/268806.268810","volume":"25","author":"D Burger","year":"1997","unstructured":"Burger, D., & Austin, T.M. (1997). The simplescalar tool set, version 2.0. ACM SIGARCH Computer Architecture News, 25(3), 13\u201325.","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"984_CR4","doi-asserted-by":"crossref","unstructured":"Chao, L.F., & Sha, E.M. (1992). Unfolding and retiming data-flow dsp programs for risc multiprocessor scheduling. In Acoustics, Speech, and Signal Processing, 1992. ICASSP-92., 1992 IEEE International Conference on, IEEE, (Vol. 5. pp. 565\u2013568).","DOI":"10.1109\/ICASSP.1992.226557"},{"key":"984_CR5","doi-asserted-by":"crossref","unstructured":"Chao, L.F., & Sha, E.M. (1993). Rate-optimal static scheduling for dsp data-flow programs. In VLSI, 1993.\u2019Design Automation of High Performance VLSI Systems\u2019, Proceedings., Third Great Lakes Symposium on, IEEE (pp. 80\u201384).","DOI":"10.1109\/GLSV.1993.224475"},{"issue":"12","key":"984_CR6","first-page":"1259","volume":"8","author":"LF Chao","year":"1997","unstructured":"Chao, L. F., & Sha, E.M. (1997). Scheduling data-flow graphs via retiming and unfolding. Parallel and Distributed Systems. IEEE Transactions on, 8(12), 1259\u20131267.","journal-title":"IEEE Transactions on"},{"key":"984_CR7","doi-asserted-by":"crossref","unstructured":"Gill, G., Hansen, J., & Singh, M. (2006). Loop pipelining for high-throughput stream computation using self-timed rings. In Proceedings of the 2006 IEEE\/ACM international conference on Computer-aided design, ACM (pp. 289\u2013296).","DOI":"10.1109\/ICCAD.2006.320135"},{"key":"984_CR8","unstructured":"Greenstreet M.R. (1993). Stari: A technique for high-bandwidth communication. PhD thesis. NJ, USA: Princeton. uMI Order No. GAX93-11221."},{"issue":"3","key":"984_CR9","doi-asserted-by":"crossref","first-page":"139","DOI":"10.1007\/BF00935211","volume":"2","author":"MR Greenstreet","year":"1990","unstructured":"Greenstreet, M.R., & Steiglitz, K. (1990). Bubbles can make self-timed pipelines fast. Journal of VLSI signal processing systems for signal, image and video technology, 2(3), 139\u2013148.","journal-title":"Journal of VLSI signal processing systems for signal, image and video technology"},{"key":"984_CR10","doi-asserted-by":"crossref","unstructured":"Guthaus, M.R., Ringenberg, J.S., Ernst, D., Austin, T.M., Mudge, T, & Brown, R.B. (2001). Mibench: A free, commercially representative embedded benchmark suite. In Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop on, IEEE (pp. 3\u201314).","DOI":"10.1109\/WWC.2001.990739"},{"key":"984_CR11","doi-asserted-by":"crossref","unstructured":"Liljeberg, P., Plosila, J., & Isoaho, J. (2003). Self-timed ring architecture for soc applications. In SOC Conference, 2003 Proceedings. IEEE International [Systems-on-Chip], IEEE (pp. 359\u2013362).","DOI":"10.1109\/SOC.2003.1241543"},{"key":"984_CR12","doi-asserted-by":"crossref","unstructured":"Liljeberg, P., Tuominen, J., Tuuna, S., Plosila, J., & Isoaho, J. (2005). Self-timed approach for noise reduction in noc reduction in noc. Interconnect-centric design for advanced SoC and NoC, 285\u2013313.","DOI":"10.1007\/1-4020-7836-6_11"},{"issue":"8","key":"984_CR13","doi-asserted-by":"crossref","first-page":"2101","DOI":"10.1109\/TPDS.2013.312","volume":"25","author":"J Liu","year":"2014","unstructured":"Liu, J., Zhuge, Q., Gu, S., Hu, J., Zhu, G., & Sha, E.M. (2014). Minimizing system cost with efficient task assignment on heterogeneous multicore processors considering time constraint. Parallel and Distributed Systems IEEE Transactions on, 25(8), 2101\u2013 2113.","journal-title":"Parallel and Distributed Systems IEEE Transactions on"},{"issue":"4","key":"984_CR14","doi-asserted-by":"crossref","first-page":"541","DOI":"10.1109\/5.24143","volume":"77","author":"T Murata","year":"1989","unstructured":"Murata, T. (1989). Petri nets: Properties, analysis and applications. Proceedings of the IEEE, 77(4), 541\u2013580.","journal-title":"Proceedings of the IEEE"},{"key":"984_CR15","doi-asserted-by":"crossref","unstructured":"Pang, P.B., & Greenstreet, M.R. (1997). Self-timed meshes are faster than synchronous. In Advanced Research in Asynchronous Circuits and Systems, 1997, Proceedings., Third International Symposium on, IEEE (pp. 30\u201339).","DOI":"10.1109\/ASYNC.1997.587143"},{"key":"984_CR16","doi-asserted-by":"crossref","unstructured":"Payne R. (1995). Self-timed fpga systems. In Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications (pp. 21\u201335). New York: Springer-Verlag.","DOI":"10.1007\/3-540-60294-1_95"},{"key":"984_CR17","doi-asserted-by":"crossref","unstructured":"Sannomiya, S., Omori, Y., & Iwata, M. (2003). A macroscopic behavior model for self-timed pipeline systems. In Parallel and Distributed Simulation, 2003.(PADS 2003). Proceedings. Seventeenth Workshop on, IEEE (pp. 133\u2013140).","DOI":"10.1109\/PADS.2003.1207429"},{"issue":"6","key":"984_CR18","doi-asserted-by":"crossref","first-page":"516","DOI":"10.1109\/TPDS.2005.71","volume":"16","author":"Z Shao","year":"2005","unstructured":"Shao, Z., Zhuge, Q., Xue, C., & Sha, E.H.M. (2005). Efficient assignment and scheduling for heterogeneous dsp systems. Parallel and Distributed Systems IEEE Transactions on, 16(6), 516\u2013525.","journal-title":"Parallel and Distributed Systems IEEE Transactions on"},{"key":"984_CR19","unstructured":"Stuijk, S., Geilen, M., & Basten, T. (2006). Sdf3: Sdf for free. In ACSD, (Vol. 6. pp. 276\u2013278)."},{"issue":"10","key":"984_CR20","doi-asserted-by":"crossref","first-page":"1331","DOI":"10.1109\/TC.2008.58","volume":"57","author":"S Stuijk","year":"2008","unstructured":"Stuijk, S., Geilen, M., & Basten, T. (2008). Throughput-buffering trade-off exploration for cyclo-static and synchronous dataflow graphs. Computers, IEEE Transactions on, 57(10), 1331\u20131345.","journal-title":"Computers, IEEE Transactions on"},{"key":"984_CR21","doi-asserted-by":"crossref","unstructured":"Sun, Q., Zhuge, Q., Hu, J., Yi J, & Sha, E.H.M. (2014), Efficient grouping-based mapping and scheduling on heterogeneous cluster architectures. Computers & Electrical Engineering.","DOI":"10.1016\/j.compeleceng.2014.03.009"},{"issue":"6","key":"984_CR22","doi-asserted-by":"crossref","first-page":"720","DOI":"10.1145\/63526.63532","volume":"32","author":"IE Sutherland","year":"1989","unstructured":"Sutherland, I.E. (1989). Micropipelines. Communications of the ACM, 32(6), 720\u2013738.","journal-title":"Communications of the ACM"},{"issue":"2","key":"984_CR23","doi-asserted-by":"crossref","first-page":"282","DOI":"10.1109\/5.740021","volume":"87","author":"H Terada","year":"1999","unstructured":"Terada, H., Miyata, S., & Iwata, M. (1999). Ddmps: self-timed super-pipelined data-driven multimedia processors. Proceedings of the IEEE, 87(2), 282\u2013295.","journal-title":"Proceedings of the IEEE"},{"issue":"2","key":"984_CR24","doi-asserted-by":"crossref","first-page":"223","DOI":"10.1109\/5.740016","volume":"87","author":"C Van Berkel","year":"1999","unstructured":"Van Berkel, C., Josephs, M.B., & Nowick, S.M. (1999). Applications of asynchronous circuits. Proceedings of the IEEE, 87(2), 223\u2013233.","journal-title":"Proceedings of the IEEE"},{"key":"984_CR25","unstructured":"Williams T.E. (1991). Self-timed rings and their application to division. PhD thesis, Stanford, CA, USA, uMI Order No. GAX92-05744."},{"key":"984_CR26","doi-asserted-by":"crossref","unstructured":"Winstanley, A.J. (2001). Temporal properties of self-timed rings. PhD thesis, The University of British Columbia.","DOI":"10.1007\/3-540-44798-9_12"},{"key":"984_CR27","doi-asserted-by":"crossref","unstructured":"Yang, Km., Lei, Kf., & Chiu, Jc. (2010). Design of an asynchronous ring bus architecture for multi-core systems. In Computer Symposium (ICS), 2010 International, IEEE (pp. 682\u2013687).","DOI":"10.1109\/COMPSYM.2010.5685427"},{"issue":"6","key":"984_CR28","doi-asserted-by":"crossref","first-page":"831","DOI":"10.1109\/TCAD.2011.2182352","volume":"31","author":"XY Zhu","year":"2012","unstructured":"Zhu, X.Y., Basten, T., Geilen, M., & Stuijk, S. (2012). Efficient retiming of multirate dsp algorithms. Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on, 31(6), 831\u2013844.","journal-title":"Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on"},{"issue":"4","key":"984_CR29","doi-asserted-by":"crossref","first-page":"590","DOI":"10.1145\/950162.950168","volume":"2","author":"Q Zhuge","year":"2003","unstructured":"Zhuge, Q., Xiao, B., & Sha, E.H.M. (2003). Code size reduction technique and implementation for software-pipelined dsp applications. ACM Transactions on Embedded Computing Systems (TECS), 2(4), 590\u2013613.","journal-title":"ACM Transactions on Embedded Computing Systems (TECS)"},{"issue":"4","key":"984_CR30","doi-asserted-by":"crossref","first-page":"173","DOI":"10.1016\/j.micpro.2005.11.002","volume":"30","author":"Q Zhuge","year":"2006","unstructured":"Zhuge, Q., Xue, C., Shao, Z., Liu, M., Qiu, M., & Sha, E.H.M. (2006). Design optimization and space minimization considering timing and code size via retiming and unfolding. Microprocessors and Microsystems, 30(4), 173\u2013183.","journal-title":"Microprocessors and Microsystems"},{"issue":"6","key":"984_CR31","doi-asserted-by":"crossref","first-page":"3253","DOI":"10.1109\/TSP.2012.2189768","volume":"60","author":"Q Zhuge","year":"2012","unstructured":"Zhuge, Q., Guo, Y., Hu, J., Tseng, W.C., Xue, C.J., & Sha, E.M. (2012). Minimizing access cost for multiple types of memory units in embedded systems through data allocation and scheduling. Signal Processing, IEEE Transactions on, 60(6), 3253\u20133263.","journal-title":"Signal Processing, IEEE Transactions on"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-015-0984-6.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-015-0984-6\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-015-0984-6","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T12:22:27Z","timestamp":1559391747000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-015-0984-6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,3,6]]},"references-count":31,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2016,7]]}},"alternative-id":["984"],"URL":"https:\/\/doi.org\/10.1007\/s11265-015-0984-6","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,3,6]]}}}