{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,14]],"date-time":"2026-05-14T00:05:46Z","timestamp":1778717146067,"version":"3.51.4"},"reference-count":26,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2015,3,21]],"date-time":"2015-03-21T00:00:00Z","timestamp":1426896000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2016,7]]},"DOI":"10.1007\/s11265-015-0985-5","type":"journal-article","created":{"date-parts":[[2015,3,20]],"date-time":"2015-03-20T04:56:39Z","timestamp":1426827399000},"page":"151-162","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["Data Allocation with Minimum Cost under Guaranteed Probability for Multiple Types of Memories"],"prefix":"10.1007","volume":"84","author":[{"given":"Shouzhen","family":"Gu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qingfeng","family":"Zhuge","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Juan","family":"Yi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jingtong","family":"Hu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Edwin H.-M.","family":"Sha","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2015,3,21]]},"reference":[{"key":"985_CR1","doi-asserted-by":"crossref","unstructured":"Absar, M.J., & Catthoor, F. (2005). Compiler-based approach for exploiting scratch-pad in presence of irregular array access. In: Proceedings of DATE, pp. 7\u201311.","DOI":"10.1109\/DATE.2005.97"},{"key":"985_CR2","doi-asserted-by":"crossref","unstructured":"Chen, G., Ozturk, O., Kandemir, M.T., Karakoy, M. (2006). Dynamic scratch-pad memory management for irregular array access patterns. In: Proceedings of DATE, pp. 931\u2013936.","DOI":"10.1109\/DATE.2006.243810"},{"key":"985_CR3","unstructured":"Chen, Y., Li, H., Wang, X., Zhu, W., Xu, W., Zhang, T. (2010). A nondestructive self-reference scheme for spin-transfer torque random access memory (stt-ram). In: Proceedings of DATE, pp. 148\u2013153."},{"key":"985_CR4","unstructured":"Chun, K.C., Jain, P., Kim, C.H. (2009). A 0.9v, 65nm logic-compatible embedded dram with > 1ms data retention time and 53 sram. In: Proceedings of the 2009 International Symposium on Low Power Electronics and Design (ISLPED), pp. 119\u2013120."},{"key":"985_CR5","doi-asserted-by":"crossref","unstructured":"Dhiman, G., Ayoub, R., Rosing, T.S. (2009). Pdram: A hybrid pram and dram main memory system. In: Proceedings of ACM\/IEEE Design Automation Conference(DAC), pp. 664\u2013669.","DOI":"10.1145\/1629911.1630086"},{"key":"985_CR6","doi-asserted-by":"crossref","first-page":"2005","DOI":"10.3233\/EMC-2005-00051","volume":"1","author":"A Dominguez","year":"2005","unstructured":"Dominguez, A., Udayakumaran, S., Barua, R. (2005). Heap data allocation to scratch-pad memory in embedded systems. Journal of Embedded Computing, 1, 2005.","journal-title":"Journal of Embedded Computing"},{"key":"985_CR7","doi-asserted-by":"crossref","unstructured":"Dong, X., Jouppi, N.P., Xie, Y. (2009). Pcramsim: System-level performance, energy, and area modeling for phase-change ram. In: Proceedings of IEEE\/ACM Int. Conf. Comput.-Aided Design, pp. 269\u2013275.","DOI":"10.1145\/1687399.1687449"},{"key":"985_CR8","doi-asserted-by":"crossref","unstructured":"Dong, X., Wu, X., Sun, G., xie, Y., Li, H., Chen, Y. (2008). Circuit and microarchitecture evaluation of 3d stacking magnetic ram (mram) as a universal memory replacement. In: Proceedings of ACM\/IEEE Design Automation Conference(DAC), pp. 554\u2013559.","DOI":"10.1145\/1391469.1391610"},{"key":"985_CR9","unstructured":"Hu, J., Xue, C.J., Zhuge, Q., Tseng, W.C., Sha, E.H.M. (2011). Towards energy efficient hybrid on-chip scratch pad memory with non-volatile memory. In: Proceedings of DATE, pp. 1\u20136."},{"key":"985_CR10","doi-asserted-by":"crossref","first-page":"1094","DOI":"10.1109\/TVLSI.2012.2202700","volume":"6","author":"J Hu","year":"2013","unstructured":"Hu, J., Xue, C.J., Zhuge, Q., Tseng, W.C., Sha, E.H.M. (2013). Data allocation optimization for hybrid scratch pad memory with sram and nonvolatile memory. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 6, 1094 \u20131102.","journal-title":"IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS"},{"key":"985_CR11","unstructured":"Joo, Y., Niu, D., Dong, X., Sun, G., Chang, N., Xie, Y. (2010). Energy- and endurance-aware design of phase change memory caches. In: Proceedings of DATE, pp. 136\u2013141."},{"key":"985_CR12","doi-asserted-by":"crossref","unstructured":"Kandemir, M.T., Ramanujam, J., Irwin, M.J., Vijaykrishnan, N., Kadayif, I., Parikh, A.N. (2001). Dynamic management of scratch-pad memory space. In: Proceedings of ACM\/IEEE Design Automation Conference(DAC), pp. 690\u2013695.","DOI":"10.1145\/378239.379049"},{"key":"985_CR13","doi-asserted-by":"crossref","unstructured":"Zhang, C., Wang, Y., Wang, T., Chen, R., Liu, D., Shao, Z. (2014). Deterministic crash recovery for NAND flash based storage systems. In: Proceedings of ACM\/IEEE Design Automation Conference(DAC), pp. 1\u20136.","DOI":"10.1109\/DAC.2014.6881475"},{"key":"985_CR14","unstructured":"Chen, R., Wang, Y., Shao, Z. (2013). DHeating: Dispersed Heating Repair for Self-Healing NAND Flash Memory. In: Proceedings of the Ninth IEEE\/ACM\/IFIP International Conference on Hardware\/Software Codesign and System Synthesis (CODES+ISSS), pp.7."},{"key":"985_CR15","doi-asserted-by":"crossref","unstructured":"Guan, Y., & Wang, G. (2013). Wang, Y.,Chen, R., Shao, Z.: \u201dBLog: Block-level Log-block Management for NAND Flash Memory Storage Systems. In: Proceedings of 14th ACM SIGPLAN\/SIGBED 2013 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2013), pp.111\u2013120.","DOI":"10.1145\/2491899.2465560"},{"key":"985_CR16","doi-asserted-by":"crossref","unstructured":"Lee, B.C., Ipek, E., Mutlu, O., Burger, D. (2009). Architecting phase change memory as a scalable dram alternative. In: proceedings of ISCA\u201909, pp. 2\u201313.","DOI":"10.1145\/1555754.1555758"},{"key":"985_CR17","doi-asserted-by":"crossref","unstructured":"Liu, T., Zhao, Y., Xue, C.J., Li, M. (2011). Power-aware variable partitioning for dsps with hybrid pram and dram main memory. In: Proceedings of ACM\/IEEE Design Automation Conference(DAC), pp. 405\u2013410.","DOI":"10.1145\/2024724.2024819"},{"key":"985_CR18","doi-asserted-by":"crossref","unstructured":"Lu, J., Bai, K., Shrivastava, A. (2013). Ssdm: Smart stack data management for software managed multicores (smms). In: Proceedings of ACM\/IEEE Design Automation Conference(DAC), pp. 1\u20138.","DOI":"10.1145\/2463209.2488918"},{"key":"985_CR19","doi-asserted-by":"crossref","unstructured":"Udayakumaran, S., & Barua, R. (2003). Compiler-decided dynamic memory allocation for scratch-pad based embedded systems. In: proceedings of CASES \u201903, pp. 276\u2013286.","DOI":"10.1145\/951710.951747"},{"key":"985_CR20","doi-asserted-by":"crossref","unstructured":"Udayakumaran, S., & Barua, R. (2006). An integrated scratch-pad allocator for affine and non-affine code. In: Proceedings of DATE, pp. 925\u2013930.","DOI":"10.1109\/DATE.2006.243809"},{"issue":"2","key":"985_CR21","doi-asserted-by":"crossref","first-page":"472","DOI":"10.1145\/1151074.1151085","volume":"5","author":"S Udayakumaran","year":"2006","unstructured":"Udayakumaran, S., Dominguez, A., & Barua, R. (2006). Dynamic allocation for scratch-pad memory using compile-time decisions. ACM Trans Embed. Comput. Syst. (TECS), 5(2), 472\u2013511.","journal-title":"ACM Trans Embed. Comput. Syst. (TECS)"},{"key":"985_CR22","doi-asserted-by":"crossref","unstructured":"Wang, P., Sun, G., Wang, T., Xie, Y., Cong, J. (2013). Designing scratchpad memory architecture with emerging stt-ram memory technologies. In: Proc. ISCAS\u201913, pp. 1244\u20131247.","DOI":"10.1109\/ISCAS.2013.6572078"},{"key":"985_CR23","unstructured":"Wu, X., Li, J., Zhang, L., Speight, E.E., Xie, Y. (2009). Power and performance of read-write aware hybrid caches with non-volatile memories. In: Proceedings of DATE, pp. 737\u2013742."},{"key":"985_CR24","doi-asserted-by":"crossref","unstructured":"Wu, Y., & Larus, J.R. (1994). Static branch frequency and program profile analysis. In: MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture, pp. 1\u201311.","DOI":"10.1145\/192724.192725"},{"key":"985_CR25","doi-asserted-by":"crossref","unstructured":"Zhou, P., zhao, B., Yang, J., Zhang, Y. (2009). A durable and energy efficient main memory using phase change memory technology. In: proceedings of ISCA\u201909, pp. 14\u201323.","DOI":"10.1145\/1555754.1555759"},{"issue":"6","key":"985_CR26","doi-asserted-by":"crossref","first-page":"3253","DOI":"10.1109\/TSP.2012.2189768","volume":"60","author":"Q Zhuge","year":"2012","unstructured":"Zhuge, Q., Guo, Y., Hu, J., Tseng, W.C., Xue, C.J., Sha, E.H.M. (2012). Minimizing access cost for multiple types of memory units in embedded systems through data allocation and scheduling. IEEE Transactions on Signal Processing, 60(6), 3253\u20133263.","journal-title":"IEEE Transactions on Signal Processing"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-015-0985-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-015-0985-5\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-015-0985-5","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T04:40:50Z","timestamp":1747802450000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-015-0985-5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,3,21]]},"references-count":26,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2016,7]]}},"alternative-id":["985"],"URL":"https:\/\/doi.org\/10.1007\/s11265-015-0985-5","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,3,21]]}}}