{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T10:51:07Z","timestamp":1761994267202,"version":"build-2065373602"},"reference-count":28,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2016,10,10]],"date-time":"2016-10-10T00:00:00Z","timestamp":1476057600000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/4.0"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2017,4]]},"DOI":"10.1007\/s11265-016-1185-7","type":"journal-article","created":{"date-parts":[[2016,10,10]],"date-time":"2016-10-10T21:00:30Z","timestamp":1476133230000},"page":"139-156","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":19,"title":["FPGA-Based Soft-Core Processors for Image Processing Applications"],"prefix":"10.1007","volume":"87","author":[{"given":"Moslem","family":"Amiri","sequence":"first","affiliation":[]},{"given":"Fahad Manzoor","family":"Siddiqui","sequence":"additional","affiliation":[]},{"given":"Colm","family":"Kelly","sequence":"additional","affiliation":[]},{"given":"Roger","family":"Woods","sequence":"additional","affiliation":[]},{"given":"Karen","family":"Rafferty","sequence":"additional","affiliation":[]},{"given":"Burak","family":"Bardak","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2016,10,10]]},"reference":[{"key":"1185_CR1","doi-asserted-by":"crossref","unstructured":"Andryc, K., Merchant, M., & Tessier, R. (2013). Flexgrip: A soft gpgpu for fpgas. In International conference on field programmable technology (pp. 230\u2013237).","DOI":"10.1109\/FPT.2013.6718358"},{"key":"1185_CR2","doi-asserted-by":"crossref","unstructured":"Arslan, M.A., Janneck, J.W., & Kuchcinski, K. (2012). Partitioning and mapping dynamic dataflow programs. In Proceedings of Asilomar conference on signals, systems and computers (pp. 1452\u20131456).","DOI":"10.1109\/ACSSC.2012.6489267"},{"issue":"5","key":"1185_CR3","doi-asserted-by":"crossref","first-page":"29","DOI":"10.1145\/1556444.1556449","volume":"36","author":"SS Bhattacharyya","year":"2009","unstructured":"Bhattacharyya, S.S., Brebner, G., Janneck, J.W., Eker, J., von Platen, C., Mattavelli, M., & Raulet, M. (2009). Opendf: A dataflow toolset for reconfigurable hardware and multicore systems. SIGARCH Computer Architecture News, 36(5), 29\u201335.","journal-title":"SIGARCH Computer Architecture News"},{"key":"1185_CR4","doi-asserted-by":"crossref","unstructured":"Boussadi, M.A., Tixier, T., Landrault, A., & Derutin, J.P. (2014). A novel flexible 16-core mp-soc architecture based on parallel skeletons for image processing applications. In IEEE international midwest symposium on circuits and systems (pp. 905\u2013908).","DOI":"10.1109\/MWSCAS.2014.6908562"},{"key":"1185_CR5","doi-asserted-by":"crossref","unstructured":"Brunei, S.C., Mattavelli, M., & Janneck, J.W. (2013). Turnus: A design exploration framework for dataflow system design. In IEEE international symposium on circuits and systems (pp. 654\u2013654).","DOI":"10.1109\/ISCAS.2013.6571927"},{"key":"1185_CR6","doi-asserted-by":"crossref","unstructured":"Canis, A., Choi, J., Aldham, M., Zhang, V., Kammoona, A., Anderson, J.H., Brown, S., & Czajkowski, T. (2011). Legup: High-level synthesis for fpga-based processor\/accelerator systems. In Proceedings ACM\/SIGDA international symposium on field programmable gate arrays (pp. 33\u201336).","DOI":"10.1145\/1950413.1950423"},{"key":"1185_CR7","doi-asserted-by":"crossref","unstructured":"Cheah, H.Y., Fahmy, S.A., & Maskell, D.L. (2012). Idea: A dsp block based fpga soft processor. In International conference on field programmable technology (pp. 151\u2013158).","DOI":"10.1109\/FPT.2012.6412128"},{"key":"1185_CR8","doi-asserted-by":"crossref","first-page":"314","DOI":"10.1016\/j.ins.2014.01.015","volume":"275","author":"CP Chen","year":"2014","unstructured":"Chen, C.P., & Zhang, C.Y. (2014). Data-intensive applications, challenges, techniques and technologies: a survey on big data. Information Sciences, 275, 314\u2013347.","journal-title":"Information Sciences"},{"key":"1185_CR9","doi-asserted-by":"crossref","unstructured":"Chu, X., & McAllister, J. (2010). Fpga based soft-core simd processing: a mimo-ofdm fixed-complexity sphere decoder case study. In International conference on field programmable technology (pp. 479\u2013484).","DOI":"10.1109\/FPT.2010.5681463"},{"issue":"4","key":"1185_CR10","doi-asserted-by":"crossref","first-page":"473","DOI":"10.1109\/TCAD.2011.2110592","volume":"30","author":"J Cong","year":"2011","unstructured":"Cong, J., Liu, B., Neuendorffer, S., Noguera, J., Vissers, K., & Zhang, Z. (2011). High-level synthesis for fpgas: from prototyping to deployment. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30(4), 473\u2013491.","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"issue":"4","key":"1185_CR11","doi-asserted-by":"crossref","first-page":"8","DOI":"10.1109\/MDT.2009.69","volume":"26","author":"P Coussy","year":"2009","unstructured":"Coussy, P., Gajski, D.D., Meredith, M., & Takach, A. (2009). An introduction to high-level synthesis. IEEE Design Test of Computers, 26(4), 8\u201317.","journal-title":"IEEE Design Test of Computers"},{"key":"1185_CR12","doi-asserted-by":"crossref","unstructured":"Dalal, N., & Triggs, B. (2005). Histograms of oriented gradients for human detection. In IEEE conference on computer vision and pattern recognition, (Vol. 1 pp. 886\u2013893).","DOI":"10.1109\/CVPR.2005.177"},{"key":"1185_CR13","doi-asserted-by":"crossref","unstructured":"Dennis, J.B. (1974). First version of a data flow procedure language. In Proceedings Colloque Sur La Programmation, Programming Symposium (pp. 362\u2013376). London: Springer-Verlag.","DOI":"10.1007\/3-540-06859-7_145"},{"key":"1185_CR14","unstructured":"Eker, J., & Janneck, J. (2003). Cal language report. University of California at Berkeley, Tech Rep UCB\/ERL M 3."},{"key":"1185_CR15","doi-asserted-by":"crossref","unstructured":"Hahnle, M., Saxen, F., Hisung, M., Brunsmann, U., & Doll K (2013). Fpga-based real-time pedestrian detection on high-resolution images. In IEEE conference on computer vision and pattern recognition workshops (pp. 629\u2013635).","DOI":"10.1109\/CVPRW.2013.95"},{"issue":"9","key":"1185_CR16","doi-asserted-by":"crossref","first-page":"1305","DOI":"10.1109\/5.97300","volume":"79","author":"N Halbwachs","year":"1991","unstructured":"Halbwachs, N., Caspi, P., Raymond, P., & Pilaud, D. (1991). The synchronous data flow programming language lustre. Proceedings IEEE, 79(9), 1305\u20131320.","journal-title":"Proceedings IEEE"},{"issue":"7","key":"1185_CR17","doi-asserted-by":"crossref","first-page":"2561","DOI":"10.1016\/j.jpdc.2014.01.003","volume":"74","author":"K Kambatla","year":"2014","unstructured":"Kambatla, K., Kollias, G., Kumar, V., & Grama, A. (2014). Trends in big data analytics. Journal of Parallel and Distributed Computing, 74(7), 2561\u20132573.","journal-title":"Journal of Parallel and Distributed Computing"},{"key":"1185_CR18","doi-asserted-by":"crossref","unstructured":"Kelly, C., Siddiqui, F.M., Bardak, B., Wu, Y., Woods, R., & Rafferty, K. (2016). Fpga soft-core processors, compiler and hardware optimizations validated using hog. In IEEE workshop on signal processing systems (pp. 78\u201390).","DOI":"10.1007\/978-3-319-30481-6_7"},{"issue":"9","key":"1185_CR19","doi-asserted-by":"crossref","first-page":"1321","DOI":"10.1109\/5.97301","volume":"79","author":"P LeGuernic","year":"1991","unstructured":"LeGuernic, P., Gautier, T., Borgne, M.L., & Maire, C.L. (1991). Programming real-time applications with signal. Proceedings IEEE, 79(9), 1321\u20131336.","journal-title":"Proceedings IEEE"},{"issue":"6","key":"1185_CR20","doi-asserted-by":"crossref","first-page":"1051","DOI":"10.1109\/TCSVT.2014.2360030","volume":"25","author":"X Ma","year":"2015","unstructured":"Ma, X., Najjar, W.A., & Roy-Chowdhury, A.K. (2015). Evaluation and acceleration of high-throughput fixed-point object detection on fpgas. IEEE Transactions on Circuits and Systems for Video Technology, 25(6), 1051\u20131062.","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"key":"1185_CR21","doi-asserted-by":"crossref","unstructured":"Negi, K., Dohi, K., Shibata, Y., & Oguri, K. (2011). Deep pipelined one-chip fpga implementation of a real-time image-based human detection algorithm. In International conference on field programmable technology (pp. 1\u20138).","DOI":"10.1109\/FPT.2011.6132679"},{"key":"1185_CR22","doi-asserted-by":"crossref","unstructured":"Nugteren C, Corporaal H, & Mesman B (2011). Skeleton-based automatic parallelization of image processing algorithms for gpus. In International conference on embedded computer systems (pp. 25\u201332).","DOI":"10.1109\/SAMOS.2011.6045441"},{"key":"1185_CR23","doi-asserted-by":"crossref","unstructured":"S\u00e9rot, J, S. J, Derutin, J.P., Ginhac, D., & Pierre, D.J. (1999). Skipper - a skeleton-based parallel programming environment for real-time image processing applications.","DOI":"10.1007\/3-540-48387-X_31"},{"key":"1185_CR24","doi-asserted-by":"crossref","unstructured":"Siddiqui, F.M., Russell, M., Bardak, B., Woods, R., & Rafferty, K. (2014). Ippro: Fpga based image processing processor. In IEEE workshop on signal processing systems (pp. 1\u20136).","DOI":"10.1109\/SiPS.2014.6986057"},{"key":"1185_CR25","unstructured":"Singh, D. (2011). Implementing fpga design with the opencl standard: Altera Whitepaper."},{"key":"1185_CR26","unstructured":"Sutherland, W.R. (1966). On-line graphical specification of computer procedures. Tech. rep., DTIC Document."},{"key":"1185_CR27","doi-asserted-by":"crossref","unstructured":"Woods, R., Mcallister, J., Turner, R., Yi, Y., & Lightbody, G. (2008). FPGA-based implementation of signal processing systems: Wiley Publishing.","DOI":"10.1002\/9780470713785"},{"key":"1185_CR28","doi-asserted-by":"crossref","unstructured":"Yviquel, H., Lorence, A., Jerbi, K., Cocherel, G., Sanchez, A., & Raulet, M. (2013). Orcc: Multimedia development made easy. In Proceedings of the 21st ACM international conference on multimedia, MM \u201913 (pp. 863\u2013866). New York: ACM.","DOI":"10.1145\/2502081.2502231"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-016-1185-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-016-1185-7\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-016-1185-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,14]],"date-time":"2019-09-14T12:33:12Z","timestamp":1568464392000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-016-1185-7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,10,10]]},"references-count":28,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2017,4]]}},"alternative-id":["1185"],"URL":"https:\/\/doi.org\/10.1007\/s11265-016-1185-7","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"type":"print","value":"1939-8018"},{"type":"electronic","value":"1939-8115"}],"subject":[],"published":{"date-parts":[[2016,10,10]]}}}