{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,28]],"date-time":"2025-09-28T04:19:55Z","timestamp":1759033195027,"version":"3.37.3"},"reference-count":29,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2017,1,25]],"date-time":"2017-01-25T00:00:00Z","timestamp":1485302400000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2017,10]]},"DOI":"10.1007\/s11265-017-1225-y","type":"journal-article","created":{"date-parts":[[2017,1,25]],"date-time":"2017-01-25T18:02:13Z","timestamp":1485367333000},"page":"107-117","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Using OpenCL to Increase SCA Application Portability"],"prefix":"10.1007","volume":"89","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3613-5794","authenticated-orcid":false,"given":"Steve","family":"Bernier","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fran\u00e7ois","family":"L\u00e9vesque","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Martin","family":"Phisel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dmitry","family":"Zvernik","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Hagood","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2017,1,25]]},"reference":[{"key":"1225_CR1","unstructured":"Baldwin, C., Mohsen, E., ASIC or FPGA. Why Not Plan For Portability?. Chip Design Tools Technologies & Methodologies."},{"key":"1225_CR2","unstructured":"The Khronos OpenCL Working Group (2015). The OpenCL Specification version 2.0, 2015. https:\/\/www.khronos.org\/opencl\/ ."},{"key":"1225_CR3","unstructured":"Tripp, J. L., Jackson, P. A., Hutchings, B. L. (2002). Sea cucumber a synthesizing compiler for FPGAs. Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, Volume 2438 of the series Lecture Notes in Computer Science, pp 875\u2013885, August, Springer-Verlag. http:\/\/link.springer.com\/chapter\/10.1007\/3-540-46117-5_90#page-1 ."},{"issue":"5","key":"1225_CR4","doi-asserted-by":"crossref","first-page":"493","DOI":"10.1007\/s10766-008-0080-7","volume":"36","author":"Z Guo","year":"2008","unstructured":"Guo, Z., Buyukkurt, B., Cortes, J., Mitra, A., & Najjar, W. (2008). A Compiler Intermediate Representation for Reconfigurable Fabrics. International Journal of Parallel Programming, 36(5), 493\u2013520 Springer-Verlag.","journal-title":"International Journal of Parallel Programming"},{"key":"1225_CR5","doi-asserted-by":"crossref","unstructured":"Chung, E.S., Hoe, J.C., Mai, K., (2011). CoRAM. An in-fabric memory architecture for FPGA-based computing, Proceeding FPGA \u201811 Proceedings of the 19th ACM\/SIGDA international symposium on Field programmable gate arrays, pp 97\u2013106, February, ACM.","DOI":"10.1145\/1950413.1950435"},{"key":"1225_CR6","unstructured":"Kirchgessner, R., Stitt, G., George, A., Lam, H. (2012). A virtual FPGA platform for applications and tools portability. Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, Conference: Proceedings of the ACM\/SIGDA 20th International Symposium on Field Programmable Gate Arrays, FPGA 2012, Monteerey, California, USA, February 22\u201324."},{"key":"1225_CR7","doi-asserted-by":"crossref","unstructured":"Kl\u00f6pper, B., Cranston, N., Aleksy, M., Dix, M. (2013). Developing portable FPGA applications - A literature review, Industrial Informatics (INDIN), 2013 11th IEEE International Conference, 29\u201331 July, pp 123\u2013128, IEEE.","DOI":"10.1109\/INDIN.2013.6622869"},{"key":"1225_CR8","unstructured":"Joint Tactical Networking Center Standard Modem Hardware Abstraction Layer Application Program Interface, Version 3.0.0, 02. (2013). JTNC. http:\/\/www.public.navy.mil\/jtnc\/sca\/Documents\/SCA_APIs\/API_3.0_20131002_Mhal_withErrata.pdf ."},{"key":"1225_CR9","unstructured":"Joint Tactical Radio System Standard MHAL on Chip Bus Application Program Interface, Version 1.1.5, 26. (2013). JTNC. http:\/\/www.public.navy.mil\/jtnc\/sca\/Documents\/SCA_APIs\/API_1.1.5_20130626_Mocb.pdf ."},{"key":"1225_CR10","volume-title":"Introduction to 3D game programming with DirectX 10","author":"FD Luna","year":"2008","unstructured":"Luna, F. D. (2008). Introduction to 3D game programming with DirectX 10. Sudbury: WordWare Publishing Inc.."},{"key":"1225_CR11","doi-asserted-by":"crossref","unstructured":"Zhang, W., Betz, V., Rose, J. (2012). Portable and Scalable FPGA-Based Acceleration of a Direct Linear System Solver, ACM Transactions on Reconfigurable Technology and Systems, Vol. 5, No. 1, Article 6.","DOI":"10.1145\/2133352.2133358"},{"key":"1225_CR12","doi-asserted-by":"crossref","unstructured":"Chow, G.C.T., Eguro, K., Luk, W., Leong, P. (2010). A Karatsuba-based Montgomery Multiplier. FPL 10 Proceedings of the 2010 International Conference on Field Programmable Logic and Applications.","DOI":"10.1109\/FPL.2010.89"},{"key":"1225_CR13","volume-title":"OpenCL in action","author":"M Scarpino","year":"2012","unstructured":"Scarpino, M. (2012). OpenCL in action. Shelter Island: Manning Publications Co."},{"key":"1225_CR14","unstructured":"OpenCL mapping for Python. http:\/\/mathema.tician.de\/software\/pyopencl\/ ."},{"key":"1225_CR15","unstructured":"OpenCL mapping for Java. https:\/\/code.google.com\/p\/javacl\/ ."},{"key":"1225_CR16","unstructured":"OpenCL mapping for Ruby. https:\/\/github.com\/Nanosim-LIG\/opencl-ruby ."},{"key":"1225_CR17","unstructured":"TI implementation of the Khronos OpenCL 1.1 specification. http:\/\/downloads.ti.com\/mctools\/esd\/docs\/opencl ."},{"key":"1225_CR18","unstructured":"Brueckner, R. (2015). How OpenCL could open the gates for FPGAs, http:\/\/insidehpc.com\/2015\/02\/how-opencl-could-open-the-gates-for-fpgas\/ ."},{"key":"1225_CR19","unstructured":"Implementing FPGA. (2013). Design with the OpenCL standard, https:\/\/www.altera.com\/content\/dam\/altera-www\/global\/en_US\/pdfs\/literature\/wp\/wp-01173-opencl.pdf ."},{"key":"1225_CR20","unstructured":"Parker, M., Jervis, M. (2015). The most under-rated FPGA design tool ever, EE eTimes. http:\/\/www.eetimes.com\/author.asp?section_id=36amp;doc_id=1327664 . Accessed January 2016."},{"key":"1225_CR21","unstructured":"The Khronos Group Inc., The SPIR\u2122 Specification version 1.2 (2014). https:\/\/www.khronos.org\/registry\/spir\/ ."},{"key":"1225_CR22","unstructured":"Fuji, Y., Azumi, T., Nishio, N., Kato, S., Edahiro, M. Data Transfer Matters for GPU Computing."},{"key":"1225_CR23","unstructured":"SoCKit - the Development Kit for New SoC Device http:\/\/www.terasic.com.tw\/cgi-bin\/page\/archive.pl?Language=English&CategoryNo=167&No=816 ."},{"key":"1225_CR24","unstructured":"Altera OpenCL for Arrow SoCkit Setup Instructions v.14.0.01, 11\/25\/2014, http:\/\/rocketboards.org\/foswiki\/pub\/Documentation\/ArrowSoCKitOpenCL\/SoCkit_OpenCL_Setup-v14.0--2014-11-25.pdf?t=1457556033 ."},{"key":"1225_CR25","unstructured":"Altera SDK for OpenCL Programming Guide (UG-OCL002) 2015.11.02, https:\/\/www.altera.com\/opencl ."},{"key":"1225_CR26","unstructured":"Altera RTE for OpenCL Getting Started Guide (UG-OCL005) 2015.11.02, https:\/\/www.altera.com\/opencl ."},{"key":"1225_CR27","unstructured":"Altera SDK for OpenCL Best Practices Guide (UG-OCL005) 2015.11.02, https:\/\/www.altera.com\/opencl ."},{"key":"1225_CR28","unstructured":"Altera SDK for OpenCL Custom Platform Toolkit User Guide (UG-OCL007) 2015.11.02, https:\/\/www.altera.com\/opencl ."},{"key":"1225_CR29","unstructured":"Texas Instrument OpenCL\u2122 Runtime Documentation, http:\/\/downloads.ti.com\/mctools\/esd\/docs\/opencl\/index.htm ."}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-017-1225-y\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-017-1225-y.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-017-1225-y.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,17]],"date-time":"2019-09-17T20:17:59Z","timestamp":1568751479000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-017-1225-y"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,1,25]]},"references-count":29,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2017,10]]}},"alternative-id":["1225"],"URL":"https:\/\/doi.org\/10.1007\/s11265-017-1225-y","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"type":"print","value":"1939-8018"},{"type":"electronic","value":"1939-8115"}],"subject":[],"published":{"date-parts":[[2017,1,25]]}}}