{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,6,28]],"date-time":"2023-06-28T11:40:46Z","timestamp":1687952446879},"reference-count":25,"publisher":"Springer Science and Business Media LLC","issue":"5","license":[{"start":{"date-parts":[[2023,2,28]],"date-time":"2023-02-28T00:00:00Z","timestamp":1677542400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2023,2,28]],"date-time":"2023-02-28T00:00:00Z","timestamp":1677542400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2023,5]]},"DOI":"10.1007\/s11265-023-01851-1","type":"journal-article","created":{"date-parts":[[2023,3,2]],"date-time":"2023-03-02T11:40:02Z","timestamp":1677757202000},"page":"623-642","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Accelerating OpenVX Application Kernels Using Halide Scheduling"],"prefix":"10.1007","volume":"95","author":[{"given":"Bo-Yu","family":"Zhao","sequence":"first","affiliation":[]},{"given":"Ming-Yi","family":"Peng","sequence":"additional","affiliation":[]},{"given":"Xiang-Yu","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Shih-Wei","family":"Liao","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2023,2,28]]},"reference":[{"key":"1851_CR1","unstructured":"Khronos Group. (2014). The OpenVX API for hardware acceleration. Retrieved August 7, 2021, from https:\/\/www.khronos.org\/openvx\/"},{"key":"1851_CR2","doi-asserted-by":"crossref","unstructured":"Tagliavini, G., et al. (2016). Optimizing memory bandwidth exploitation for openvx applications on embedded many-core accelerators. Journal of Real-Time Image Processing.","DOI":"10.1007\/s11554-015-0544-0"},{"key":"1851_CR3","doi-asserted-by":"crossref","unstructured":"Tagliavini, G., Haugou, G., & Benini, L. (2014). Optimizing memory bandwidth in OpenVX graph execution on embedded many-core accelerators.\u00a0In\u00a0Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, pp. 1\u20138. IEEE.","DOI":"10.1109\/DASIP.2014.7115617"},{"key":"1851_CR4","doi-asserted-by":"crossref","unstructured":"Dekkiche, D., Vincke, B., & Merigot, A. (2016). Investigation and performance analysis of openvx optimizations on computer vision applications. In 14th International Conference on Control, Automation, Robotics and Vision, pp. 1\u20136.","DOI":"10.1109\/ICARCV.2016.7838782"},{"key":"1851_CR5","doi-asserted-by":"crossref","unstructured":"Tagliavini, G., Haugou, G., Marongiu, A., & Benini, L. (2015). ADRENALINE: an OpenVX environment to optimize embedded vision applications on many-core accelerators. In IEEE 9th International Symposium on Embedded Multicore\/Many-core Systems-on- Chip (MCSoC),\u00a0pp. 289\u2013296.","DOI":"10.1109\/MCSoC.2015.45"},{"key":"1851_CR6","doi-asserted-by":"crossref","unstructured":"Ragan-Kelley, J., Adams, A., Paris, S., Levoy, M., Ama-Rainghe, S., & Durand, F. (2012) Decoupling algorithms from schedules for easy optimization of image processing pipelines. ACM Transactions on Graphics, 31(4), 32.","DOI":"10.1145\/2185520.2185528"},{"key":"1851_CR7","doi-asserted-by":"crossref","unstructured":"Ragan-Kelley, J., Barnes, C., Adams, A., Paris, S., Durand, F., & Amarasinghe, S.\u00a0(2013). Halide: a language and compiler for optimizing parallelism, locality, and recomputation in image processing pipelines. In Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation. ACM.","DOI":"10.1145\/2491956.2462176"},{"key":"1851_CR8","doi-asserted-by":"crossref","unstructured":"Rainey, E., Villarreal, J., Dedeoglu, G., Pulli, K., Lepley, T., & Brill, F. (2014).\u00a0Addressing System-Level Optimization with OpenVX Graphs. In IEEE Conference on Computer Vision and Pattern Recognition Workshops (CVPRW), 658\u2013663.","DOI":"10.1109\/CVPRW.2014.100"},{"key":"1851_CR9","doi-asserted-by":"crossref","unstructured":"Canis, A., Choi, J., Aldham, M., Zhang, V., Kammoona, A., Anderson, J. H., Brown, S., & Czajkowski, T. (2011). LegUp: high-level synthesis for FPGA-based processor\/accelerator systems. In: Proceedings of the 19th ACM\/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 33\u201336. ACM.","DOI":"10.1145\/1950413.1950423"},{"key":"1851_CR10","doi-asserted-by":"crossref","unstructured":"Gehrig, S. K., Eberli, F., & Meyer, T. (2009). A real-time low-power stereo vision engine using semi-global matching. In: Computer Vision Systems, pp. 134\u2013143. Springer.","DOI":"10.1007\/978-3-642-04667-4_14"},{"key":"1851_CR11","doi-asserted-by":"crossref","unstructured":"Lei, Y., Gang, Z., Si-Heon, R., Choon-Young, L., Sang-Ryong, L., & Bae, K. M. (2008). The platform of image acquisition and processing system based on DSP and FPGA. In: International Conference on Smart Manufacturing Application, pp. 470\u2013473. IEEE.","DOI":"10.1109\/ICSMA.2008.4505567"},{"key":"1851_CR12","unstructured":"Cong, J., Ghodrat, M. A., Gill, M., Grigorian, B., & Reinman, G. (2012). CHARM: a composable heterogeneous accelerator-rich micro- processor. In: Proceedings of the 2012 ACM\/IEEE International Symposium on Low Power Electronics and Design, pp. 379\u2013384. ACM."},{"key":"1851_CR13","doi-asserted-by":"crossref","unstructured":"Cong, J., Liu, C., Ghodrat, M.A., Reinman, G., Gill, M., & Zou, Y. (2011). AXR-CMP: architecture support in accelerator-rich CMPs. In: 2nd Workshop on SoC Architecture, Accelerators and Workloads.","DOI":"10.1145\/2228360.2228512"},{"key":"1851_CR14","doi-asserted-by":"crossref","unstructured":"Farabet, C., Martini, B., Corda, B., Akselrod, P., Culurciello, E., & LeCun, Y. (2011) Neuflow: a runtime reconfigurable dataflow processor for vision. In: 2011 IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops (CVPRW), pp. 109\u2013116. IEEE.","DOI":"10.1109\/CVPRW.2011.5981829"},{"key":"1851_CR15","unstructured":"Hegarty, J., Brunhaver, J., DeVito, Z., Ragan-Kelley, J., Cohen, N., Bell, S., Vasilyev, A., Horowitz, M., & Hanrahan, P. D. (2014). Compiling high-level image processing code into hardware pipelines. In: Proceedings of the 41st International Conference on Computer Graphics and Interactive Techniques (SIGGRAPH)."},{"key":"1851_CR16","unstructured":"Intel. (2000). OpenCV Library. Retrieved September 16, 2021, from http:\/\/www.opencv.org"},{"issue":"3","key":"1851_CR17","doi-asserted-by":"publisher","first-page":"260","DOI":"10.7227\/IJEEE.49.3.6","volume":"49","author":"J Coombs","year":"2012","unstructured":"Coombs, J., Prabhu, R., & Peake, G. (2012). Overcoming the challenges of porting OpenCV to TI\u2019s embedded ARM+ DSP platforms. International Journal of Electrical Engineering Education, 49(3), 260\u2013274.","journal-title":"International Journal of Electrical Engineering Education"},{"key":"1851_CR18","unstructured":"Nvidia. (2008). Tegra Android Development Documentation Website. Retrieved September 1, 2021, from http:\/\/docs.nvidia.com\/tegra\/index.html"},{"key":"1851_CR19","unstructured":"Qualcomm. (2015). Computer Vision (FastCV). Retrieved September 2, 2021, from https:\/\/developer.qualcomm.com\/computer-vision-fastcv"},{"key":"1851_CR20","doi-asserted-by":"crossref","unstructured":"Stone, J. E., Gohara, D., & Shi, G. (2010).\u00a0OpenCL: A parallel programming standard for heterogeneous computing systems. Computing in Science & Engineering.","DOI":"10.1109\/MCSE.2010.69"},{"key":"1851_CR21","doi-asserted-by":"crossref","unstructured":"Czajkowski, T. S., Aydonat, U., Denisenko, D., Freeman, J., Kinsner, M., Neto, D., Wong, J., Yiannacouras, P., & Singh, DP. (2012). From OpenCL to high-performance hardware on FPGAs. In: 22nd International Conference on Field Programmable Logic and Applications (FPL), pp. 531\u2013534. IEEE.","DOI":"10.1109\/FPL.2012.6339272"},{"key":"1851_CR22","unstructured":"Boudier, P., & Sellers, G. (2011). Memory system on fusion APUs. AMD fusion developer summit. Retrieved August 20, 2021, from https:\/\/developer.amd.com\/wordpress\/media\/2013\/06\/1004_final.pdf"},{"key":"1851_CR23","doi-asserted-by":"crossref","unstructured":"Mullapudi, R. T., Adams, A., Sharlet, D., Ragan-Kelley, J., & Fatahalian, K. (2016, July). Automatically scheduling halide image processing pipelines. ACM Transactions on Graphics, 35(4), Article 83;11.","DOI":"10.1145\/2897824.2925952"},{"key":"1851_CR24","doi-asserted-by":"crossref","unstructured":"Mullapudi, R. T., Vasista, V., & Bondhugula, U. (2015). PolyMage: Automatic optimization for image processing pipelines. In Proceedings of the Twentieth International Confer- ence on Architectural Support for Programming Languages and Operating Systems, pp. 429\u2013443.","DOI":"10.1145\/2775054.2694364"},{"key":"1851_CR25","first-page":"1106","volume":"25","author":"A Krizhevsky","year":"2012","unstructured":"Krizhevsky, A., Sutskever, I., & Hinton, G. (2012). Imagenet classification with deep convolutional neural networks. In Advances in Neural Information Processing Systems, 25, 1106\u20131114.","journal-title":"In Advances in Neural Information Processing Systems"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-023-01851-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s11265-023-01851-1\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-023-01851-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,28]],"date-time":"2023-06-28T11:20:02Z","timestamp":1687951202000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s11265-023-01851-1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,2,28]]},"references-count":25,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2023,5]]}},"alternative-id":["1851"],"URL":"https:\/\/doi.org\/10.1007\/s11265-023-01851-1","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,2,28]]},"assertion":[{"value":"10 July 2022","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"31 January 2023","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"1 February 2023","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"28 February 2023","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"The authors have no competing interests to declare that are relevant \nto the content of this article.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Conflicts of Interest"}}]}}