{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,11]],"date-time":"2025-06-11T17:03:32Z","timestamp":1749661412575,"version":"3.37.3"},"reference-count":19,"publisher":"Springer Science and Business Media LLC","issue":"10","license":[{"start":{"date-parts":[[2023,7,18]],"date-time":"2023-07-18T00:00:00Z","timestamp":1689638400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0"},{"start":{"date-parts":[[2023,7,18]],"date-time":"2023-07-18T00:00:00Z","timestamp":1689638400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0"}],"funder":[{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council","doi-asserted-by":"publisher","award":["EP\/V034111\/1"],"award-info":[{"award-number":["EP\/V034111\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council","doi-asserted-by":"publisher","award":["EP\/R02572X\/1"],"award-info":[{"award-number":["EP\/R02572X\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council","doi-asserted-by":"publisher","award":["EP\/V000462\/1"],"award-info":[{"award-number":["EP\/V000462\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council","doi-asserted-by":"publisher","award":["EP\/P017487\/1"],"award-info":[{"award-number":["EP\/P017487\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2023,10]]},"abstract":"<jats:title>Abstract<\/jats:title><jats:p>Deep Neutral Networks (DNNs) have been widely used in many applications, such as self-driving cars, natural language processing (NLP), image classification, visual object recognition, and so on. Field-programmable gate array (FPGA) based Multiprocessor System on a Chip (MPSoC) is recently considered one of the popular choices for deploying DNN models. However, the limited resource capacity of MPSoC imposes a challenge for such practical implementation. Recent studies revealed the trade-off between the \u201cresources consumed\" vs. the \u201cperformance achieved\". Taking a cue from these findings, we address the problem of efficient implementation of deep learning into the resource-constrained MPSoC in this paper, where each deep learning network is run with different service levels based on resource usage (where a higher service level implies higher performance with increased resource consumption). To this end, we propose a heuristic-based strategy, Application Wise Level Selector (AWLS), for selecting service levels to maximize the overall performance subject to a given resource bound. AWLS can achieve higher performance within a constrained resource budget under various simulation scenarios. Further, we verify the proposed strategy using an AMD-Xilinx Zynq UltraScale+ XCZU9EG SoC. Using a framework designed to deploy multi-DNN on multi-DPUs (Deep Learning Units), it is proved that an optimal solution is achieved from the algorithm, which obtains the highest performance (Frames Per Second) using the same resource budget.<\/jats:p>","DOI":"10.1007\/s11265-023-01881-9","type":"journal-article","created":{"date-parts":[[2023,7,18]],"date-time":"2023-07-18T08:02:23Z","timestamp":1689667343000},"page":"1231-1243","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Application Level Resource Scheduling for Deep Learning Acceleration on MPSoC"],"prefix":"10.1007","volume":"95","author":[{"given":"Cong","family":"Gao","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sangeet","family":"Saha","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xuqi","family":"Zhu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hongyuan","family":"Jing","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Klaus D.","family":"McDonald-Maier","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1030-8311","authenticated-orcid":false,"given":"Xiaojun","family":"Zhai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2023,7,18]]},"reference":[{"key":"1881_CR1","unstructured":"Goodfellow, I., Bengio, Y., & Courville, A. (2016). Deep learning. MIT press."},{"key":"1881_CR2","doi-asserted-by":"publisher","DOI":"10.1016\/j.iot.2021.100461","volume":"16","author":"L Dutta","year":"2021","unstructured":"Dutta, L., & Bharali, S. (2021). TinyML meets IoT: A comprehensive survey. Internet of Things, 16, 100461.","journal-title":"Internet of Things"},{"key":"1881_CR3","unstructured":"Cai, H., Gan, C., Wang, T., Zhang, Z., & Han, S. (2019). Once-for-all: Train one network and specialize it for efficient deployment. Preprint retrieved from http:\/\/arxiv.org\/abs\/1908.09791"},{"key":"1881_CR4","doi-asserted-by":"crossref","unstructured":"Lou, W., Xun, L., Sabet, A., Bi, J., Hare, J., & Merrett, G. V. (2021). Dynamic-OFA: Runtime DNN architecture switching for performance scaling on heterogeneous embedded platforms. In Proceedings of the IEEE\/CVF Conference on Computer Vision and Pattern Recognition (pp. 3110\u20133118).","DOI":"10.1109\/CVPRW53098.2021.00347"},{"key":"1881_CR5","doi-asserted-by":"crossref","unstructured":"Korol, G., Jordan, M. G., Rutzig, M.\u00a0B., & Beck, A. C. S. (2022). AdaFlow: A framework for adaptive dataflow CNN acceleration on FPGAs. In 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE) (pp. 244\u2013249). IEEE.","DOI":"10.23919\/DATE54114.2022.9774727"},{"key":"1881_CR6","doi-asserted-by":"publisher","first-page":"116569","DOI":"10.1109\/ACCESS.2020.3004198","volume":"8","author":"Z Wang","year":"2020","unstructured":"Wang, Z., Xu, K., Wu, S., Liu, L., Liu, L., & Wang, D. (2020). Sparse-YOLO: Hardware\/software co-design of an FPGA accelerator for YOLOv2. IEEE Access, 8, 116569\u2013116585.","journal-title":"IEEE Access"},{"key":"1881_CR7","doi-asserted-by":"crossref","unstructured":"Hao, C., Zhang, X., Li, Y., Huang, S., Xiong, J., Rupnow, K., Hwu, W-M., & Chen, D. (2019). FPGA\/DNN co-design: An efficient design methodology for 1ot intelligence on the edge. In 2019 56th ACM\/IEEE Design Automation Conference (DAC) (pp. 1\u20136). IEEE.","DOI":"10.1145\/3316781.3317829"},{"key":"1881_CR8","doi-asserted-by":"crossref","unstructured":"Lu, Y., Zhai, X., Saha, S., Ehsan, S., & McDonald-Maier, K.\u00a0D. (2022). A self-adaptive SEU mitigation scheme for embedded systems in extreme radiation environments. IEEE Systems Journal.","DOI":"10.1109\/JSYST.2022.3144019"},{"issue":"1","key":"1881_CR9","doi-asserted-by":"publisher","first-page":"96","DOI":"10.1109\/MNET.2018.1700202","volume":"32","author":"H Li","year":"2018","unstructured":"Li, H., Ota, K., & Dong, M. (2018). Learning IoT in edge: Deep learning for the internet of things with edge computing. IEEE Network, 32(1), 96\u2013101.","journal-title":"IEEE Network"},{"issue":"2","key":"1881_CR10","doi-asserted-by":"publisher","first-page":"249","DOI":"10.1109\/TSC.2017.2662008","volume":"11","author":"C Liu","year":"2017","unstructured":"Liu, C., Cao, Y., Luo, Y., Chen, G., Vokkarane, V., Yunsheng, M., Chen, S., & Hou, P. (2017). A new deep learning-based food recognition system for dietary assessment on an edge computing service infrastructure. IEEE Transactions on Services Computing, 11(2), 249\u2013261.","journal-title":"IEEE Transactions on Services Computing"},{"issue":"6","key":"1881_CR11","doi-asserted-by":"publisher","first-page":"1205","DOI":"10.1109\/JSAC.2019.2904348","volume":"37","author":"S Wang","year":"2019","unstructured":"Wang, S., Tuor, T., Salonidis, T., Leung, K. K., Makaya, C., He, T., & Chan, K. (2019). Adaptive federated learning in resource constrained edge computing systems. IEEE Journal on Selected Areas in Communications, 37(6), 1205\u20131221.","journal-title":"IEEE Journal on Selected Areas in Communications"},{"issue":"4","key":"1881_CR12","doi-asserted-by":"publisher","first-page":"2923","DOI":"10.1109\/COMST.2018.2844341","volume":"20","author":"M Mohammadi","year":"2018","unstructured":"Mohammadi, M., Al-Fuqaha, A., Sorour, S., & Guizani, M. (2018). Deep learning for IoT big data and streaming analytics: A survey. IEEE Communications Surveys & Tutorials, 20(4), 2923\u20132960.","journal-title":"IEEE Communications Surveys & Tutorials"},{"key":"1881_CR13","unstructured":"Deng, Z., Xu, C., Cai, Q., & Faraboschi, P. (2015). Reduced-precision memory value approximation for deep learning. Hewlett Packard Labs, HPL-2015-100."},{"key":"1881_CR14","doi-asserted-by":"crossref","unstructured":"Gao, C., Saha, S., Lu, Y., Saha, R., McDonald-Maier, K.\u00a0D., & Zhai, X. (2022). Deep learning on FPGAs with multiple service levels for edge computing. In 2022 27th International Conference on Automation and Computing (ICAC) (pp. 1\u20136). IEEE.","DOI":"10.1109\/ICAC55051.2022.9911081"},{"key":"1881_CR15","doi-asserted-by":"crossref","unstructured":"Goel, S., Kedia, R., Balakrishnan, M., & Sen, R. (2020). Infer: Interference-aware estimation of runtime for concurrent CNN execution on DPUS. In 2020 International Conference on Field-Programmable Technology (ICFPT) (pp. 66\u201371). IEEE.","DOI":"10.1109\/ICFPT51103.2020.00018"},{"key":"1881_CR16","doi-asserted-by":"crossref","unstructured":"Lin, G-Z., Nguyen, H. M., Sun, C-C., Kuo, P-Y., & Sheu, M-H. (2021). A novel bird detection and identification based on DPU processor on PYNQ FPGA. In 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW) (pp. 1\u20132). IEEE.","DOI":"10.1109\/ICCE-TW52618.2021.9603066"},{"key":"1881_CR17","doi-asserted-by":"crossref","unstructured":"Lu, Y., Gao, C., Saha, R., Saha, S., McDonald-Maier, K. D., & Zhai, X. (2022) FPGA-based dynamic deep learning acceleration for real-time video analytics. In 35th GI\/ITG International Conference on Architecture of Computing Systems. IEEE.","DOI":"10.1007\/978-3-031-21867-5_5"},{"key":"1881_CR18","unstructured":"AMD-Xilinx. (2022). DPUCZDX8G for zynq ultrascale+ MPSoCs product guide (pg338). Retrieved August 2022, from\u00a0https:\/\/docs.xilinx.com\/r\/en-US\/pg338-dpu\/reg_dpu_isr"},{"key":"1881_CR19","unstructured":"AMD-Xilinx. (2022). Xilinx Vitis-ai 2.5 release.\u00a0Retrieved August 2022, from\u00a0https:\/\/docs.xilinx.com\/r\/en-US\/ug1414-vitis-ai"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-023-01881-9.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s11265-023-01881-9\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-023-01881-9.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,12,2]],"date-time":"2023-12-02T09:11:21Z","timestamp":1701508281000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s11265-023-01881-9"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7,18]]},"references-count":19,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2023,10]]}},"alternative-id":["1881"],"URL":"https:\/\/doi.org\/10.1007\/s11265-023-01881-9","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"type":"print","value":"1939-8018"},{"type":"electronic","value":"1939-8115"}],"subject":[],"published":{"date-parts":[[2023,7,18]]},"assertion":[{"value":"1 December 2022","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"21 March 2023","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"10 July 2023","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"18 July 2023","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"Not Applicable.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Ethics Approval"}},{"value":"The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.","order":3,"name":"Ethics","group":{"name":"EthicsHeading","label":"Conflict of Interest"}}]}}