{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,16]],"date-time":"2024-07-16T00:17:36Z","timestamp":1721089056008},"reference-count":35,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2024,7,1]],"date-time":"2024-07-01T00:00:00Z","timestamp":1719792000000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2024,7,1]],"date-time":"2024-07-01T00:00:00Z","timestamp":1719792000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"funder":[{"name":"Scientific Research Fund of Hunan Provincial Education Department","award":["21B0345"],"award-info":[{"award-number":["21B0345"]}]}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Wireless Pers Commun"],"published-print":{"date-parts":[[2024,7]]},"DOI":"10.1007\/s11277-024-11444-1","type":"journal-article","created":{"date-parts":[[2024,7,4]],"date-time":"2024-07-04T08:14:55Z","timestamp":1720080895000},"page":"615-629","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Analysis and Design of a Low-Voltage Low-Power High SNDR Current-Mode Sample and Hold Circuit Based on CMOS Technology"],"prefix":"10.1007","volume":"137","author":[{"given":"Fei","family":"Yu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lei","family":"Gao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shuo","family":"Cai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sichun","family":"Du","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2024,7,4]]},"reference":[{"issue":"2","key":"11444_CR1","doi-asserted-by":"publisher","first-page":"571","DOI":"10.1109\/JIOT.2017.2717704","volume":"5","author":"O Kaiwartya","year":"2017","unstructured":"Kaiwartya, O., Abdullah, A. H., Cao, Y., et al. (2017). Virtualization in wireless sensor networks: Fault tolerant embedding for internet of things. IEEE Internet of Things Journal, 5(2), 571\u2013580.","journal-title":"IEEE Internet of Things Journal"},{"key":"11444_CR2","doi-asserted-by":"publisher","first-page":"85","DOI":"10.1016\/j.neunet.2023.12.008","volume":"171","author":"X Kong","year":"2024","unstructured":"Kong, X., Yu, F., Yao, W., et al. (2024). Memristor-induced hyperchaos, multiscroll and extreme multistability in fractional-order HNN: Image encryption and FPGA implementation. Neural Networks, 171, 85\u2013103.","journal-title":"Neural Networks"},{"issue":"2","key":"11444_CR3","doi-asserted-by":"publisher","DOI":"10.1016\/j.jjimei.2022.100084","volume":"2","author":"B Unhelkar","year":"2022","unstructured":"Unhelkar, B., Joshi, S., Sharma, M., et al. (2022). Enhancing supply chain performance using RFID technology and decision support systems in the industry 4.0 A systematic literature review. International Journal of Information Management Data Insights, 2(2), 100084.","journal-title":"International Journal of Information Management Data Insights"},{"issue":"6","key":"11444_CR4","doi-asserted-by":"publisher","first-page":"1636","DOI":"10.1109\/JSSC.2019.2900150","volume":"54","author":"H Zhuang","year":"2019","unstructured":"Zhuang, H., Guo, W., Liu, J., et al. (2019). A second-order noise-shaping SAR ADC with passive integrator and tri-level voting. IEEE Journal of Solid-State Circuits, 54(6), 1636\u20131647.","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"10","key":"11444_CR5","doi-asserted-by":"publisher","first-page":"20190176","DOI":"10.1587\/elex.16.20190176","volume":"16","author":"L Li","year":"2019","unstructured":"Li, L., Cheng, X., Zhang, Z., et al. (2019). A 24-bit sigma-delta ADC with configurable chopping scheme. IEICE Electronics Express, 16(10), 20190176.","journal-title":"IEICE Electronics Express"},{"key":"11444_CR6","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1016\/j.vlsi.2023.02.010","volume":"91","author":"S Cai","year":"2023","unstructured":"Cai, S., Wen, Y., Xie, C., et al. (2023). Low-power and high-speed SRAM cells for double-node-upset recovery. Integration, 91, 1\u20139.","journal-title":"Integration"},{"key":"11444_CR7","doi-asserted-by":"publisher","first-page":"671","DOI":"10.1007\/s11277-015-2951-8","volume":"86","author":"F Yu","year":"2016","unstructured":"Yu, F., Tang, Q., Wang, W., et al. (2016). A 2.7 GHz low-phase-noise LC-QVCO using the gate-modulated coupling technique. Wireless Personal Communications, 86, 671\u2013681.","journal-title":"Wireless Personal Communications"},{"key":"11444_CR8","doi-asserted-by":"publisher","first-page":"11","DOI":"10.1016\/j.vlsi.2022.12.012","volume":"90","author":"S Cai","year":"2023","unstructured":"Cai, S., Xie, C., Wen, Y., et al. (2023). Four-input-C-element-based multiple-node-upset-self-recoverable latch designs. Integration, 90, 11\u201321.","journal-title":"Integration"},{"issue":"1","key":"11444_CR9","doi-asserted-by":"publisher","first-page":"3334","DOI":"10.1038\/s41467-024-47642-5","volume":"15","author":"O Maher","year":"2024","unstructured":"Maher, O., Jim\u00e9nez, M., Delacour, C., et al. (2024). A CMOS-compatible oscillation-based VO2 Ising machine solver. Nature Communications, 15(1), 3334.","journal-title":"Nature Communications"},{"issue":"2","key":"11444_CR10","doi-asserted-by":"publisher","first-page":"905","DOI":"10.1007\/s11277-014-1791-2","volume":"78","author":"F Yu","year":"2014","unstructured":"Yu, F. (2014). A low-voltage and low-power 3-GHz CMOS LC VCO for S-band wireless applications. Wireless Personal Communications, 78(2), 905\u2013914.","journal-title":"Wireless Personal Communications"},{"issue":"1","key":"11444_CR11","doi-asserted-by":"publisher","first-page":"109","DOI":"10.1109\/4.818927","volume":"35","author":"L Dai","year":"2000","unstructured":"Dai, L., & Harjani, R. (2000). CMOS switched-op-amp-based sample-and-hold circuit. IEEE Journal of Solid-State Circuits, 35(1), 109\u2013113.","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"21","key":"11444_CR12","doi-asserted-by":"publisher","first-page":"1323","DOI":"10.1049\/el.2013.2092","volume":"49","author":"L Zou","year":"2013","unstructured":"Zou, L., Pathrose, J., Chai, K. T. C., et al. (2013). Sample-and-hold circuit with dynamic switch leakage compensation. Electronics Letters, 49(21), 1323\u20131325.","journal-title":"Electronics Letters"},{"issue":"6","key":"11444_CR13","first-page":"459","volume":"56","author":"F Centurelli","year":"2009","unstructured":"Centurelli, F., Monsurro, P., Pennisi, S., et al. (2009). Design solutions for sample-and-hold circuits in CMOS nanometer technologies. IEEE Transactions on Circuits and Systems II: Express Briefs, 56(6), 459\u2013463.","journal-title":"IEEE Transactions on Circuits and Systems II: Express Briefs"},{"key":"11444_CR14","volume":"130","author":"A Diaz-Sanchez","year":"2021","unstructured":"Diaz-Sanchez, A., Mateus-Ardila, J. C., Zamora-Mejia, G., et al. (2021). A four quadrant high-speed CMOS analog multiplier based on the flipped voltage follower cell. AEU-International Journal of Electronics and Communications, 130, 153582.","journal-title":"AEU-International Journal of Electronics and Communications"},{"issue":"1","key":"11444_CR15","doi-asserted-by":"publisher","first-page":"47","DOI":"10.1007\/s10470-021-01856-5","volume":"110","author":"AS Vidhyadharan","year":"2022","unstructured":"Vidhyadharan, A. S., & Vidhyadharan, S. (2022). Memristor-CCMOS hybrid ultra-low-power high-speed multivibrators. Analog Integrated Circuits and Signal Processing, 110(1), 47\u201353.","journal-title":"Analog Integrated Circuits and Signal Processing"},{"issue":"8003","key":"11444_CR16","doi-asserted-by":"publisher","first-page":"313","DOI":"10.1038\/s41586-024-07096-7","volume":"627","author":"D Zhong","year":"2024","unstructured":"Zhong, D., Wu, C., Jiang, Y., et al. (2024). High-speed and large-scale intrinsically stretchable integrated circuits. Nature, 627(8003), 313\u2013320.","journal-title":"Nature"},{"key":"11444_CR17","doi-asserted-by":"publisher","first-page":"1202398","DOI":"10.3389\/fphy.2023.1202398","volume":"11","author":"Y Lin","year":"2023","unstructured":"Lin, Y., Gong, J., Yu, F., et al. (2023). Current mode multi scroll chaotic oscillator based on CDTA. Frontiers in Physics, 11, 1202398.","journal-title":"Frontiers in Physics"},{"issue":"4","key":"11444_CR18","doi-asserted-by":"publisher","first-page":"181","DOI":"10.3390\/fractalfract8040181","volume":"8","author":"F Sen","year":"2024","unstructured":"Sen, F., Kircay, A., Cobb, B. S., et al. (2024). MO-CCCII-based single-input multi-output (SIMO) current-mode fractional-order universal and shelving filter. Fractal and Fractional, 8(4), 181.","journal-title":"Fractal and Fractional"},{"key":"11444_CR19","first-page":"5212601","volume":"2020","author":"F Yu","year":"2020","unstructured":"Yu, F., Shen, H., Liu, L., et al. (2020). CCII and FPGA realization: A multistable modified fourth-order autonomous Chua\u2019s chaotic system with coexisting multiple attractors. Complexity, 2020, 5212601.","journal-title":"Complexity"},{"issue":"2","key":"11444_CR20","doi-asserted-by":"publisher","first-page":"843","DOI":"10.1007\/s11277-019-06888-9","volume":"111","author":"F Yu","year":"2020","unstructured":"Yu, F., Gao, L., Liu, L., et al. (2020). A 1 V, 0.53 ns, 59 \u03bcW current comparator using standard 0.18 \u03bcm CMOS technology. Wireless Personal Communications, 111(2), 843\u2013851.","journal-title":"Wireless Personal Communications"},{"key":"11444_CR21","unstructured":"Lo, M.Y., Ki, W.H., & Mow, W.H. (2009). A 20MHz switched-current sample-and-hold circuit for current mode analog iterative decoders\/\/Proceedings of the 2009 12th International Symposium on Integrated Circuits. IEEE, 283-286."},{"key":"11444_CR22","unstructured":"Rajaee, O., & Bakhtiar, M.S. (2005). A low voltage, high speed current mode sample and hold for high precision applications\/\/Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005. IEEE, 1: I\/269-I\/272 vol. 1."},{"key":"11444_CR23","unstructured":"Sedighi, B., Rajaee, O., Jahanian, A., et al. (2005). A 1.5 V 150MS\/s current-mode sample-and-hold circuit\/\/Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005. IEEE, 2: II\/91-II\/94 vol. 2."},{"key":"11444_CR24","doi-asserted-by":"crossref","unstructured":"Sawigun, C., & Serdijn, W.A. (2010). A 24nW, 0.65-V, 74-dB SNDR, 83-dB DR, class-AB current-mode sample and hold circuit\/\/Proceedings of 2010 IEEE International Symposium on Circuits and Systems. IEEE, 3132-3135.","DOI":"10.1109\/ISCAS.2010.5537963"},{"issue":"7","key":"11444_CR25","doi-asserted-by":"publisher","first-page":"1615","DOI":"10.1109\/TCSI.2011.2158491","volume":"58","author":"C Sawigun","year":"2011","unstructured":"Sawigun, C., & Serdijn, W. A. (2011). Analysis and design of a low-voltage, low-power, high-precision, class-AB current-mode subthreshold CMOS sample and hold circuit. IEEE Transactions on Circuits and Systems I: Regular Papers, 58(7), 1615\u20131626.","journal-title":"IEEE Transactions on Circuits and Systems I: Regular Papers"},{"issue":"4","key":"11444_CR26","doi-asserted-by":"publisher","first-page":"397","DOI":"10.1049\/iet-cds.2017.0411","volume":"12","author":"M Kumngern","year":"2018","unstructured":"Kumngern, M., Nonthaputha, T., & Khateb, F. (2018). Low-power sample and hold circuits using current conveyor analogue switches. IET Circuits, Devices & Systems, 12(4), 397\u2013402.","journal-title":"IET Circuits, Devices & Systems"},{"key":"11444_CR27","first-page":"2045","volume":"4","author":"DG Nairn","year":"1992","unstructured":"Nairn, D. G. (1992). Amplifiers for high-speed current-mode sample-and-hold circuits\/\/[Proceedings] 1992 IEEE International Symposium on Circuits and Systems. IEEE, 4, 2045\u20132048.","journal-title":"IEEE"},{"issue":"4","key":"11444_CR28","doi-asserted-by":"publisher","first-page":"696","DOI":"10.1109\/4.913749","volume":"36","author":"Y Sugimoto","year":"2001","unstructured":"Sugimoto, Y. (2001). A 1.5-V current-mode CMOS sample-and-hold IC with 57-dB S\/N at 20 MS\/s and 54-dB S\/N at 30 MS\/s. IEEE Journal of Solid-State Circuits, 36(4), 696\u2013700.","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"11444_CR29","unstructured":"Ozkilic, M.C., Minaei, S., & Turkoz, S. (2007). A current-mode sample-and-hold circuit with high accuracy\/\/2007 9th International Symposium on Signal Processing and Its Applications. IEEE, 1-4."},{"key":"11444_CR30","first-page":"147","volume":"97","author":"R Sridhar","year":"2016","unstructured":"Sridhar, R., Pandey, N., Bhattacharyya, A., et al. (2016). High speed high resolution current comparator and its application to Analog to Digital converter. Journal of The Institution of Engineers (India): Series B, 97, 147\u2013154.","journal-title":"Journal of The Institution of Engineers (India): Series B"},{"key":"11444_CR31","volume-title":"Design of Sample-Holding Circuit for High Precision ADC","author":"J Shao","year":"2022","unstructured":"Shao, J. (2022). Design of Sample-Holding Circuit for High Precision ADC. Thesis: Southeast University."},{"key":"11444_CR32","volume-title":"Analysis and design of CMOS analog integrated circuits","author":"J Wu","year":"2004","unstructured":"Wu, J. (2004). Analysis and design of CMOS analog integrated circuits. Beijing: Publishing House of Electronics Industry."},{"issue":"10","key":"11444_CR33","doi-asserted-by":"publisher","first-page":"1144","DOI":"10.1080\/10426914.2016.1257802","volume":"32","author":"V Trivedi","year":"2017","unstructured":"Trivedi, V., Prakash, S., & Ramteke, M. (2017). Optimized on-line control of MMA polymerization using fast multi-objective DE. Materials and Manufacturing Processes, 32(10), 1144\u20131151.","journal-title":"Materials and Manufacturing Processes"},{"key":"11444_CR34","doi-asserted-by":"crossref","unstructured":"Ishmam, A., Afridi, A.A., Haider, T., et al. (2023). A Sample and Hold Architecture with Folded Cascode Operational Amplifier using Gain Compression for Improved Linearity Implemented in 90 nm CMOS Technology\/\/2023 26th International Conference on Computer and Information Technology (ICCIT). IEEE, 1-5.","DOI":"10.1109\/ICCIT60459.2023.10441351"},{"key":"11444_CR35","doi-asserted-by":"crossref","unstructured":"Moreira, M.B., Lapuyade, H., Rivet, F., et al. (2023). A Wide-Band High-Speed Sample and Hold in 0.35 \u03bcm CMOS Technology\/\/2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS). IEEE, 1-4.","DOI":"10.1109\/LASCAS56464.2023.10108219"}],"container-title":["Wireless Personal Communications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11277-024-11444-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s11277-024-11444-1\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11277-024-11444-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,7,15]],"date-time":"2024-07-15T12:20:03Z","timestamp":1721046003000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s11277-024-11444-1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,7]]},"references-count":35,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2024,7]]}},"alternative-id":["11444"],"URL":"https:\/\/doi.org\/10.1007\/s11277-024-11444-1","relation":{},"ISSN":["0929-6212","1572-834X"],"issn-type":[{"value":"0929-6212","type":"print"},{"value":"1572-834X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,7]]},"assertion":[{"value":"30 June 2024","order":1,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"4 July 2024","order":2,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"The authors declare that they have no Conflict of interest.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Conflict of interest"}}]}}