{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T04:55:35Z","timestamp":1649048135861},"reference-count":26,"publisher":"Springer Science and Business Media LLC","issue":"5","license":[{"start":{"date-parts":[[2021,9,30]],"date-time":"2021-09-30T00:00:00Z","timestamp":1632960000000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,9,30]],"date-time":"2021-09-30T00:00:00Z","timestamp":1632960000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J. Comput. Sci. Technol."],"published-print":{"date-parts":[[2021,10]]},"DOI":"10.1007\/s11390-021-0904-0","type":"journal-article","created":{"date-parts":[[2021,10,27]],"date-time":"2021-10-27T14:02:58Z","timestamp":1635343378000},"page":"1118-1132","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Defect-Tolerant Mapping of CMOL Circuit Targeting Delay Optimization"],"prefix":"10.1007","volume":"36","author":[{"given":"Xiao-Jing","family":"Zha","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yin-Shui","family":"Xia","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shang-Luan","family":"Xie","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhu-Fei","family":"Chu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2021,9,30]]},"reference":[{"issue":"2","key":"904_CR1","doi-asserted-by":"publisher","first-page":"178","DOI":"10.1145\/384285.379262","volume":"29","author":"SC Goldstein","year":"2001","unstructured":"Goldstein S C, Budiu M. Nanofabrics: Spatial computing using molecular electronics. SIGARCH Comput. Archit. News, 2001, 29(2): 178-191. https:\/\/doi.org\/10.1145\/384285.379262.","journal-title":"SIGARCH Comput. Archit. News"},{"issue":"2","key":"904_CR2","doi-asserted-by":"publisher","first-page":"109","DOI":"10.1145\/1084748.1084750","volume":"1","author":"A DeHon","year":"2005","unstructured":"DeHon A. Nanowire-based programmable architectures. J. Emerg. Technol. Comput. Syst., 2005, 1(2): 109-162. https:\/\/doi.org\/10.1145\/1084748.1084750.","journal-title":"J. Emerg. Technol. Comput. Syst."},{"issue":"11","key":"904_CR3","doi-asserted-by":"publisher","first-page":"841","DOI":"10.1038\/nmat2028","volume":"6","author":"W Lu","year":"2007","unstructured":"Lu W, Lieber C M. Nanoelectronics from the bottom up. Nature Materials, 2007, 6(11):841-850. https:\/\/doi.org\/10.1038\/nmat2028.","journal-title":"Nature Materials"},{"issue":"6","key":"904_CR4","doi-asserted-by":"publisher","first-page":"888","DOI":"10.1088\/0957-4484\/16\/6\/045","volume":"16","author":"DB Strukov","year":"2005","unstructured":"Strukov D B, Likharev K K. CMOL FPGA: A reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices. Nanotechnology, 2005, 16(6): 888-900. https:\/\/doi.org\/10.1088\/0957-4484\/16\/6\/045.","journal-title":"Nanotechnology"},{"issue":"3","key":"904_CR5","doi-asserted-by":"publisher","first-page":"203","DOI":"10.1166\/jno.2008.301","volume":"3","author":"KK Likharev","year":"2008","unstructured":"Likharev K K. Hybrid CMOS\/nanoelectronic circuits: Opportunities and challenges. J. Nanoelectron. Optoelectron., 2008, 3(3): 203-230. https:\/\/doi.org\/10.1166\/jno.2008.301.","journal-title":"J. Nanoelectron. Optoelectron."},{"issue":"12","key":"904_CR6","doi-asserted-by":"publisher","first-page":"2759","DOI":"10.1109\/TVLSI.2018.2809644","volume":"26","author":"A Madhavan","year":"2018","unstructured":"Madhavan A, Sherwood T, Strukov D B. High-throughput pattern matching with CMOL FPGA circuits: Case for logic-in-memory computing. IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2018, 26(12): 2759-2772. https:\/\/doi.org\/10.1109\/TVLSI.2018.2809644.","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"904_CR7","doi-asserted-by":"publisher","unstructured":"Sait S M, Oughali F C, Arafeh A M. Engineering a memetic algorithm from discrete cuckoo search and tabu search for cell assignment of hybrid nanoscale CMOL circuits. J. Circuits Syst. Comput., 2016, 25(04): Article No. 1650023. https:\/\/doi.org\/10.1142\/S0218126616500237.","DOI":"10.1142\/S0218126616500237"},{"issue":"6","key":"904_CR8","doi-asserted-by":"publisher","first-page":"1275","DOI":"10.1109\/TNANO.2011.2131153","volume":"10","author":"Y Xia","year":"2011","unstructured":"Xia Y, Chu Z, HungWN N, Wang L, Song X. An integrated optimization approach for nanohybrid circuit cell mapping. IEEE Trans. Nanotechnol., 2011, 10(6): 1275-1284. https:\/\/doi.org\/10.1109\/TNANO.2011.2131153.","journal-title":"IEEE Trans. Nanotechnol."},{"key":"904_CR9","doi-asserted-by":"publisher","unstructured":"Tunali O, Altun M. A survey of fault-tolerance algorithms for reconfigurable nano-crossbar arrays. ACM Comput. Surv., 2018, 50(6): Article No. 79. https:\/\/doi.org\/10.1145\/3125641.","DOI":"10.1145\/3125641"},{"issue":"1\/2","key":"904_CR10","doi-asserted-by":"publisher","first-page":"20","DOI":"10.1016\/j.cis.2010.01.005","volume":"154","author":"K Ariga","year":"2010","unstructured":"Ariga K, Lee M V, Mori T, Yu X, Hill J P. Two-dimensional nanoarchitectonics based on self-assembly. Adv. Colloid Interface Sci., 2010, 154(1\/2): 20-29. https:\/\/doi.org\/10.1016\/j.cis.2010.01.005.","journal-title":"Adv. Colloid Interface Sci."},{"issue":"7333","key":"904_CR11","doi-asserted-by":"publisher","first-page":"240","DOI":"10.1038\/nature09749","volume":"470","author":"H Yan","year":"2011","unstructured":"Yan H, Choe H S, Nam S, Hu Y, Das S, Klemic J F, Ellenbogen J C, Lieber C M. Programmable nanowire circuits for nanoprocessors. Nature, 2011, 470(7333): 240-244. https:\/\/doi.org\/10.1038\/nature09749.","journal-title":"Nature"},{"key":"904_CR12","doi-asserted-by":"publisher","unstructured":"Yuan B, Li B. A fast extraction algorithm for defect-free subcrossbar in nanoelectronic crossbar. ACM J. Emerg. Technologies Comput. Syst., 2014, 10(3): Article No. 25. https:\/\/doi.org\/10.1145\/2517137.","DOI":"10.1145\/2517137"},{"key":"904_CR13","doi-asserted-by":"publisher","unstructured":"Sasikumar D, Kumar A. A novel defect tolerance scheme for nanocrossbar architectures with enhanced efficiency. Micromachines, 2018, 10(1): Article No. 14. https:\/\/doi.org\/10.3390\/mi10010014.","DOI":"10.3390\/mi10010014"},{"issue":"9","key":"904_CR14","doi-asserted-by":"publisher","first-page":"2813","DOI":"10.1109\/TVLSI.2016.2530898","volume":"24","author":"B Yuan","year":"2016","unstructured":"Yuan B, Li B, Chen H H. Defect- and variation-tolerant logic mapping in nanocrossbar using bipartite matching and memetic algorithm. IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2016, 24(9): 2813-2826. https:\/\/doi.org\/10.1109\/TVLSI.2016.2530898.","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"issue":"6","key":"904_CR15","doi-asserted-by":"publisher","first-page":"823","DOI":"10.1109\/JSEN.2008.923261","volume":"8","author":"WNN Hung","year":"2008","unstructured":"Hung W N N, Gao C, Song X, Hammerstrom D. Defect-tolerant CMOL cell assignment via satisfiability. IEEE Sens. J., 2008, 8(6): 823-830. https:\/\/doi.org\/10.1109\/JSEN.2008.923261.","journal-title":"IEEE Sens. J."},{"issue":"9","key":"904_CR16","doi-asserted-by":"publisher","first-page":"2515","DOI":"10.1007\/s13369-015-1682-1","volume":"40","author":"SM Sait","year":"2015","unstructured":"Sait S M, Arafeh A M. Reconfiguration-based defect-tolerant design automation for hybrid CMOS\/nanofabrics circuits using evolutionary and non-deterministic heuristics. Arab. J. Sci. Eng., 2015, 40(9): 2515-2529. https:\/\/doi.org\/10.1007\/s13369-015-1682-1.","journal-title":"Arab. J. Sci. Eng."},{"key":"904_CR17","doi-asserted-by":"publisher","first-page":"100","DOI":"10.1016\/j.mejo.2017.12.004","volume":"72","author":"D Chen","year":"2018","unstructured":"Chen D, Xia Y, Wang Z. Stuck-at-close defect propagation and its blocking technique in CMOL cell mapping. Microelectron. J., 2018, 72: 100-108. https:\/\/doi.org\/10.1016\/j.mejo.2017.12.004.","journal-title":"Microelectron. J."},{"key":"904_CR18","doi-asserted-by":"publisher","unstructured":"Morgul M C, Tunali O, Altun M, Frontini L, Ciriani V, Vatajelu E I, Anghel L, Moritz C A, Stan M R, Alexandrescu D. Integrated synthesis methodology for crossbar arrays. In Proc. the 14th IEEE\/ACM Int. Symp. Nanoscale Architectures, Jul. 2018, pp.91-97. https:\/\/doi.org\/10.1145\/3232195.3232211.","DOI":"10.1145\/3232195.3232211"},{"key":"904_CR19","doi-asserted-by":"publisher","first-page":"70","DOI":"10.1016\/j.vlsi.2019.09.008","volume":"70","author":"Q Xu","year":"2020","unstructured":"Xu Q, Chen S, Geng H, Yuan B, Yu B, Wu F, Huang Z. Fault tolerance in memristive crossbar-based neuromorphic computing systems. Integr. VLSI J., 2020, 70: 70-79. https:\/\/doi.org\/10.1016\/j.vlsi.2019.09.008.","journal-title":"Integr. VLSI J."},{"key":"904_CR20","doi-asserted-by":"publisher","unstructured":"Kule M, Rahaman H, Bhattacharya B B. Maximal defect-free component in nanoscale crossbar circuits amidst stuck-open and stuck-closed faults. J. Circuits Syst. Comput., 2019, 28(11): Article No. 1950180. https:\/\/doi.org\/10.1142\/S0218126619501809.","DOI":"10.1142\/S0218126619501809"},{"issue":"5","key":"904_CR21","doi-asserted-by":"publisher","first-page":"669","DOI":"10.1080\/00207217.2012.720945","volume":"100","author":"Z Chu","year":"2013","unstructured":"Chu Z, Xia Y, Hung W N N, Song X, Wang L. Timing-driven logic restructuring for nano-hybrid circuits. Int. J. Electron., 2013, 100(5): 669-685. https:\/\/doi.org\/10.1080\/00207217.2012.720945.","journal-title":"Int. J. Electron."},{"key":"904_CR22","doi-asserted-by":"publisher","unstructured":"Zha X, Xia Y. Defect-tolerant mapping of CMOL circuits with delay optimization. In Proc. the 30th ACM Great Lakes Symp. VLSI, Sept. 2020, pp.451-456. https:\/\/doi.org\/10.1145\/3386263.3406944.","DOI":"10.1145\/3386263.3406944"},{"key":"904_CR23","doi-asserted-by":"publisher","unstructured":"Cong J, Xiao B. Defect tolerance in nanodevice-based programmable interconnects: Utilization beyond avoidance. In Proc. the 50th ACM\/EDAC\/IEEE Des. Autom. Conf., May 29-June 7, 2013, Article No. 9. https:\/\/doi.org\/10.1145\/2463209.2488745.","DOI":"10.1145\/2463209.2488745"},{"issue":"1","key":"904_CR24","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1007\/s10489-013-0441-9","volume":"40","author":"SM Sait","year":"2014","unstructured":"Sait S M, Arafeh A M. Cell assignment in hybrid CMOS\/nanodevices architecture using tabu search. Appl. Intell., 2014, 40(1): 1-12. https:\/\/doi.org\/10.1007\/s10489-013-0441-9.","journal-title":"Appl. Intell."},{"key":"904_CR25","doi-asserted-by":"publisher","unstructured":"Matrosova A, Ostanin S, Chernyshov S. Finding false paths for sequential circuits using operations on ROB-DDs. In Proc. the 24th IEEE Int. Symp. On-Line Testing and Robust System Design, July 2018, pp.240-242. https:\/\/doi.org\/10.1109\/IOLTS.2018.8474213.","DOI":"10.1109\/IOLTS.2018.8474213"},{"key":"904_CR26","doi-asserted-by":"publisher","unstructured":"Brglez F, Bryan D, Kozminski K. Combinational profiles of sequential benchmark circuits. In Proc. IEEE Int. Symp. Circuits and Systems, May 1989, pp.1929-1934. https:\/\/doi.org\/10.1109\/ISCAS.1989.100747.","DOI":"10.1109\/ISCAS.1989.100747"}],"container-title":["Journal of Computer Science and Technology"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11390-021-0904-0.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s11390-021-0904-0\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11390-021-0904-0.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,27]],"date-time":"2021-10-27T15:13:59Z","timestamp":1635347639000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s11390-021-0904-0"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,9,30]]},"references-count":26,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2021,10]]}},"alternative-id":["904"],"URL":"https:\/\/doi.org\/10.1007\/s11390-021-0904-0","relation":{},"ISSN":["1000-9000","1860-4749"],"issn-type":[{"value":"1000-9000","type":"print"},{"value":"1860-4749","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,9,30]]},"assertion":[{"value":"19 August 2020","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"5 August 2021","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"30 September 2021","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}