{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,30]],"date-time":"2025-01-30T11:10:36Z","timestamp":1738235436299,"version":"3.34.0"},"reference-count":22,"publisher":"Springer Science and Business Media LLC","issue":"6","license":[{"start":{"date-parts":[[2008,5,21]],"date-time":"2008-05-21T00:00:00Z","timestamp":1211328000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sci. China Ser. F-Inf. Sci."],"published-print":{"date-parts":[[2008,6]]},"DOI":"10.1007\/s11432-008-0071-8","type":"journal-article","created":{"date-parts":[[2008,5,20]],"date-time":"2008-05-20T14:41:12Z","timestamp":1211294472000},"page":"743-755","source":"Crossref","is-referenced-by-count":4,"title":["Novel devices and process for 32 nm CMOS technology and beyond"],"prefix":"10.1007","volume":"51","author":[{"given":"YangYuan","family":"Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xing","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"XiaoYan","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ru","family":"Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2008,5,21]]},"reference":[{"key":"71_CR1","unstructured":"The International Technology Roadmap for Semiconductors (ITRS) Roadmap, ITRS roadmap 2006, http:\/\/public.itrs.net , 2006"},{"key":"71_CR2","doi-asserted-by":"crossref","unstructured":"Wakabayashi H, Yamagami S, Ikezawa N, et al. Sub-10-nm planar-bulk-CMOS devices using lateral junction control. In: Int. Electron Devices Meeting (IEDM) Tech. Dig., Dec. 2003. 989\u2013991","DOI":"10.1109\/IEDM.2003.1269446"},{"key":"71_CR3","doi-asserted-by":"crossref","first-page":"237","DOI":"10.1109\/LED.2005.845496","volume":"26","author":"J. F. Kang","year":"2005","unstructured":"Kang J F, Yu H Y, Ren C, et al. Improved electrical and reliability characteristics of HfN\/HfO2 gated nMOSFET with 0.95 nm EOT fabricated using a gate-first process. IEEE Elect Dev Lett, 2005, 26: 237\u2013239","journal-title":"IEEE Elect Dev Lett"},{"key":"71_CR4","doi-asserted-by":"crossref","unstructured":"Lee S J, Rhee S J, Clark R, et al. Reliability projection and polarity dependence of TDDB for ultra thin CVD HfO2 gate dielectrics. VLSI Tech Dig, 2002, 78\u201379","DOI":"10.1109\/VLSIT.2002.1015397"},{"key":"71_CR5","doi-asserted-by":"crossref","first-page":"230","DOI":"10.1109\/LED.2003.812143","volume":"24","author":"H. Y. Yu","year":"2003","unstructured":"Yu H Y, Lim H F, Chen J H, et al. Physical and electrical characteristics of HfN gate electrode for advanced MOS devices. IEEE Elect Dev Lett, 2003, 24: 230\u2013232","journal-title":"IEEE Elect Dev Lett"},{"key":"71_CR6","unstructured":"Tseng H-H, Ramon M E, Hebert L, et al. ALD HfO2 using heavy water (D2O) for improved MOSFET stability. In: Int Elect Dev Meet\u2019 03, 2003, 83\u201386"},{"key":"71_CR7","doi-asserted-by":"crossref","unstructured":"Kang J F, Ren C, Yu H Y, et al. Anovel dual-metal gate integration process for sub-1 nm EOT HfO2 CMOS devices. In: 2004 International Conference on Solid State Devices and Materials (SSDM 2004), Tokyo, Japan, Sept. 15\u201317, 2004","DOI":"10.7567\/SSDM.2004.B-5-2"},{"key":"71_CR8","doi-asserted-by":"crossref","first-page":"H927","DOI":"10.1149\/1.2775163","volume":"154","author":"J. F. Kang","year":"2007","unstructured":"Kang J F, Yu H Y, Ren C, et al. Scalability and reliability characteristics of CVD HfO2 gate dielectrics with HfN electrodes for advanced CMOS applications. J Elect Soc, 2007, 154: H927\u2013H932","journal-title":"J Elect Soc"},{"issue":"9","key":"71_CR9","doi-asserted-by":"crossref","first-page":"610","DOI":"10.1109\/LED.2005.853683","volume":"26","author":"N. Sa","year":"2005","unstructured":"Sa N, Kang J F, Yang H, et al. Mechanism of positive-bias temperature instability in sub-1 nm TaN\/HfN\/HfO2 gate stack with low preexisting traps. IEEE Elect Dev Lett, 2005, 26(9): 610\u2013612","journal-title":"IEEE Elect Dev Lett"},{"issue":"9","key":"71_CR10","doi-asserted-by":"crossref","first-page":"447","DOI":"10.1109\/55.944335","volume":"22","author":"Y. K. Choi","year":"2001","unstructured":"Choi Y K, Ha D, King T J, et al. Nanoscale ultrathin body PMOSFETs with raised selective germanium source\/drain. IEEE Elect Dev Lett, 2001, 22(9): 447\u2013448","journal-title":"IEEE Elect Dev Lett"},{"key":"71_CR11","doi-asserted-by":"crossref","unstructured":"Uchida K, Koga J, Takagi S-I. Experimental study on carrier transport mechanisms in double-and single-gate ultrathin-body MOSFETs-Coulomb scattering, volume inversion, and \u03b4TSOI-induced scattering. IEEE Elect Dev Meet, 2003, 33.5.1-33.5.4","DOI":"10.1109\/IEDM.2003.1269402"},{"issue":"10","key":"71_CR12","doi-asserted-by":"crossref","first-page":"609","DOI":"10.1109\/LED.2002.803757","volume":"23","author":"Z. Ren","year":"2002","unstructured":"Ren Z, Hegde S, Doris B, et al. An experimental study on transport issues and electrostatics of ultrathin body SOI pMOSFETs. IEEE Elect Dev Lett, 2002, 23(10): 609\u2013611","journal-title":"IEEE Elect Dev Lett"},{"issue":"4","key":"71_CR13","doi-asserted-by":"crossref","first-page":"561","DOI":"10.1109\/TED.2005.844737","volume":"52","author":"Y. Tian","year":"2005","unstructured":"Tian Y, Huang R, Zhang R, et al. A novel nanoscaled device concept: Quasi-SOI MOSFET to eliminate the potential weaknesses of UTB SOI MOSFET. IEEE Trans Elect Dev, 2005, 52(4): 561\u2013568","journal-title":"IEEE Trans Elect Dev"},{"issue":"7","key":"71_CR14","doi-asserted-by":"crossref","first-page":"1784","DOI":"10.1109\/TED.2007.899401","volume":"53","author":"Y. Tian","year":"2007","unstructured":"Tian Y, Xiao H, Huang R, et al. Quasi-SOI MOSFET \u2014 A promising bulk device candidate for extremely scaled era. IEEE Trans Elect Dev, 2007, 53(7): 1784\u20131788","journal-title":"IEEE Trans Elect Dev"},{"key":"71_CR15","doi-asserted-by":"crossref","unstructured":"Timp G, Bude J, Bourdelle K K, et al. The ballistic nano-transistor. IEDM Tech Dig, 1999, 55\u201358","DOI":"10.1109\/IEDM.1999.823845"},{"issue":"8","key":"71_CR16","doi-asserted-by":"crossref","first-page":"1029","DOI":"10.1063\/1.357263","volume":"76","author":"K. Natori","year":"1994","unstructured":"Natori K. Ballistic metal-oxide-semiconductor field effect transistor. J Appl Phys, 1994, 76(8): 1029\u20131036","journal-title":"J Appl Phys"},{"issue":"12","key":"71_CR17","doi-asserted-by":"crossref","first-page":"2727","DOI":"10.1109\/TED.2005.859593","volume":"52","author":"P. Palestri","year":"2005","unstructured":"Palestri P, Esseni D, Eminente S, et al. Understanding quasi-ballistic transport in nano-MOSFETs: Part I\u2014Scattering in the channel and in the drain. IEEE Trans Elect Dev, 2005, 52(12): 2727\u20132732","journal-title":"IEEE Trans Elect Dev"},{"issue":"12","key":"71_CR18","doi-asserted-by":"crossref","first-page":"2736","DOI":"10.1109\/TED.2005.859566","volume":"52","author":"S. Eminente","year":"2005","unstructured":"Eminente S, Esseni D, Palestri P, et al. Understanding quasi-ballistic transport in nano-MOSFETs: Part II\u2014Technology scaling along the ITRS. IEEE Trans Elect Dev, 2005, 52(12): 2736\u20132743","journal-title":"IEEE Trans Elect Dev"},{"issue":"7","key":"71_CR19","doi-asserted-by":"crossref","first-page":"361","DOI":"10.1109\/55.596937","volume":"18","author":"M. Lundstrom","year":"1997","unstructured":"Lundstrom M. Elementary scattering theory of the Si MOSFET. IEEE Elect Dev Lett, 1997, 18(7): 361\u2013363","journal-title":"IEEE Elect Dev Lett"},{"key":"71_CR20","doi-asserted-by":"crossref","unstructured":"Xia Z L, Du G, Liu X Y, et al. Effect of surface roughness on quasi-ballistic transport in nano-scale Ge and Si double-gate MOSFETs. ICSICT, 2006","DOI":"10.1109\/ICSICT.2006.306124"},{"issue":"10","key":"71_CR21","doi-asserted-by":"crossref","first-page":"2258","DOI":"10.1109\/TED.2005.856806","volume":"52","author":"G. Du","year":"2005","unstructured":"Du G, Liu X Y, Xia Z L, et al. Monte Carlo simulation of p and n channel GOI MOSFETs by solving quantum Boltzmann equation. IEEE Trans Elect Dev, 2005, 52(10): 2258\u20132264","journal-title":"IEEE Trans Elect Dev"},{"issue":"12","key":"71_CR22","doi-asserted-by":"crossref","first-page":"1942","DOI":"10.1016\/j.sse.2005.08.010","volume":"49","author":"X. L. Xia","year":"2005","unstructured":"Xia X L, Du G, Liu X Y, et al. Carrier effective mobilities in germanium MOSFET inversion layer investigated by Monte Carlo simulation. Solid-state Elect, 2005, 49(12): 1942\u20131946","journal-title":"Solid-state Elect"}],"container-title":["Science in China Series F: Information Sciences"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11432-008-0071-8.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11432-008-0071-8\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11432-008-0071-8","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,30]],"date-time":"2025-01-30T10:53:55Z","timestamp":1738234435000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11432-008-0071-8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,5,21]]},"references-count":22,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2008,6]]}},"alternative-id":["71"],"URL":"https:\/\/doi.org\/10.1007\/s11432-008-0071-8","relation":{},"ISSN":["1009-2757","1862-2836"],"issn-type":[{"type":"print","value":"1009-2757"},{"type":"electronic","value":"1862-2836"}],"subject":[],"published":{"date-parts":[[2008,5,21]]}}}