{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,3]],"date-time":"2025-03-03T06:01:22Z","timestamp":1740981682775,"version":"3.38.0"},"reference-count":21,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2011,2,28]],"date-time":"2011-02-28T00:00:00Z","timestamp":1298851200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sci. China Inf. Sci."],"published-print":{"date-parts":[[2011,4]]},"DOI":"10.1007\/s11432-011-4205-z","type":"journal-article","created":{"date-parts":[[2011,2,28]],"date-time":"2011-02-28T21:32:33Z","timestamp":1298928753000},"page":"767-777","source":"Crossref","is-referenced-by-count":0,"title":["Scan chain design for shift power reduction in scan-based testing"],"prefix":"10.1007","volume":"54","author":[{"given":"Jia","family":"Li","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu","family":"Hu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"XiaoWei","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2011,2,28]]},"reference":[{"key":"4205_CR1","volume-title":"Design-for-Test for Digital ICs and Embedded Core Systems","author":"A. Crouch","year":"1999","unstructured":"Crouch A. Design-for-Test for Digital ICs and Embedded Core Systems. Upper Saddle River, NJ: Prentice Hall, 1999"},{"key":"4205_CR2","doi-asserted-by":"crossref","unstructured":"Girard P. Survey of low-power testing of VLSI circuits. In: Proc. of IEEE Design and Test of Computers, 2002. 82\u201392","DOI":"10.1109\/MDT.2002.1003802"},{"key":"4205_CR3","unstructured":"Zorian Y. A distributed BIST control scheme for complex VLSI devices. In: Proc. of VLSI Test Symposium, Guam, 1993. 4\u20139"},{"key":"4205_CR4","doi-asserted-by":"crossref","unstructured":"Whetsel L. Adapting scan architectures for low power operation. In: Proc. of International Test Conference, Atlantic, 2000. 863\u2013872","DOI":"10.1109\/TEST.2000.894297"},{"key":"4205_CR5","doi-asserted-by":"crossref","first-page":"1142","DOI":"10.1109\/TCAD.2004.829797","volume":"23","author":"P. Rosinger","year":"2004","unstructured":"Rosinger P, Al-Hashimi B M, Nicolici N. Scan architecture with mutually exclusive scan segment activation for shift- and capture-power reduction. IEEE Trans Comput-Aid Design Integ Circ Syst, 2004, 23: 1142\u20131153","journal-title":"IEEE Trans Comput-Aid Design Integ Circ Syst"},{"key":"4205_CR6","doi-asserted-by":"crossref","unstructured":"Sankaralingam R, Touba N A. Inserting test points to control peak power during scan testing. In: Proc. of International Symposium on Defect and Fault Tolerance in VLSI Systems, Vancouver, 2002. 138\u2013146","DOI":"10.1109\/DFTVS.2002.1173510"},{"key":"4205_CR7","doi-asserted-by":"crossref","unstructured":"Elm M, Wunderlich H J, Imhof M E, et al. Scan chain clustering for test power reduction. In: Proc. of Design Automation Conference, San Francisco, 2008. 828\u2013833","DOI":"10.1145\/1391469.1391680"},{"key":"4205_CR8","doi-asserted-by":"crossref","first-page":"1063","DOI":"10.1109\/TC.2003.1223640","volume":"52","author":"D. Xiang","year":"2003","unstructured":"Xiang D, Fujiwara H. Nonscan design for testability for synchronous sequential circuits based on conflict resolution. IEEE Trans Comput, 2003, 52: 1063\u20131075","journal-title":"IEEE Trans Comput"},{"key":"4205_CR9","doi-asserted-by":"crossref","first-page":"1101","DOI":"10.1109\/TCAD.2009.2018775","volume":"28","author":"D. Xiang","year":"2009","unstructured":"Xiang D, Hu D, Xu Q, et al. Low-power scan testing for test data compression using a routing-driven scan architecture. IEEE Trans Comput-Aid Design, 2009, 28: 1101\u20131105","journal-title":"IEEE Trans Comput-Aid Design"},{"key":"4205_CR10","doi-asserted-by":"crossref","unstructured":"Hu Y, Li C, Li J, et al. Test data compression based on clustered random access scan. In: Proc. of Asian Test Symposium, Fukuoka, 2006. 231\u2013236","DOI":"10.1109\/ATS.2006.261025"},{"key":"4205_CR11","doi-asserted-by":"crossref","unstructured":"Bonhomme Y, Girard P, Guiller L, et al. Efficient scan chain design for power minimization during scan testing under routing constraint. In: Proc. of International Test Conference, Charlotte, 2003. 488\u2013493","DOI":"10.1109\/TEST.2003.1270874"},{"key":"4205_CR12","doi-asserted-by":"crossref","first-page":"267","DOI":"10.1007\/978-0-387-73661-7_17","volume":"240","author":"N. Badereddine","year":"2007","unstructured":"Badereddine N, Girard P, Pravossoudovitch S, et al. Scan cell reordering for peak power reduction during scan test cycles. IFIP Int Fed Inf Process, 2007, 240: 267\u2013281","journal-title":"IFIP Int Fed Inf Process"},{"key":"4205_CR13","doi-asserted-by":"crossref","unstructured":"Wu Y Z, Chao M C T. Scan-chain reordering for minimizing scan-shift power based on non-specified test cubes. In: Proc. of VLSI Test Symposium, San Diego, 2008. 147-154","DOI":"10.1109\/VTS.2008.16"},{"key":"4205_CR14","doi-asserted-by":"crossref","unstructured":"Li J, Hu Y, Li X. A scan chain adjustment technology for test power reduction. In: Proc. of Asian Test Symposium, Fukuoka, 2006. 11\u201316","DOI":"10.1109\/ATS.2006.260986"},{"key":"4205_CR15","doi-asserted-by":"crossref","unstructured":"Sinanoglu O, Orailoglu A. Scan power minimization through stimulus and response transformations. In: Proc. of Design, Automation and Test in Europe Conference and Exhibition, Paris, 2004. 404\u2013409","DOI":"10.1109\/DATE.2004.1268880"},{"key":"4205_CR16","doi-asserted-by":"crossref","unstructured":"Butler K M, Saxena J, Jain A, et al. Minimizing power consumption in scan testing-pattern generation and DFT techniques. In: Proc. of International Test Conference, Charlotte, 2004. 355\u2013364","DOI":"10.1109\/TEST.2004.1386971"},{"key":"4205_CR17","unstructured":"Remersaro S, Lin X, Zhang Z, et al. Preferred fill: a scalable method to reduce capture power for scan based designs. In: Proc. of International Test Conference, Santa Clara, 2006. 32.3"},{"key":"4205_CR18","unstructured":"Wen X, Yamashita Y, Kajihara S, et al. On low-capture-power test generation for scan testing. In: Proc. of IEEE VLSI Test Symposium (VTS), Palm Springs, CA, USA, 2005. 265\u2013270"},{"key":"4205_CR19","unstructured":"Li J, Xu Q, Hu Y, et al. iFill: an impact-oriented X-filling method for shift- and capture-power reduction in at-speed scan-based testing. In: Proc. of Design, Automation, and Test in Europe, Munich, 2008. 1184\u20131189"},{"key":"4205_CR20","doi-asserted-by":"crossref","unstructured":"Sankaralingam R, Oruganti R R, Touba N A. Static Compaction techniques to control scan vector power dissipation. In: Proc. of VLSI Test Symposium, Montreal, 2000. 35\u201340","DOI":"10.1109\/VTEST.2000.843824"},{"key":"4205_CR21","doi-asserted-by":"crossref","unstructured":"Hamzaoglu I, Patel J. Test set compaction algorithms for combinational circuits. In: Proc. of International Test Conference, Washington DC, 1998. 283\u2013289","DOI":"10.1145\/288548.288615"}],"container-title":["Science China Information Sciences"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11432-011-4205-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11432-011-4205-z\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11432-011-4205-z","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,3]],"date-time":"2025-03-03T02:13:33Z","timestamp":1740968013000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11432-011-4205-z"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,2,28]]},"references-count":21,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2011,4]]}},"alternative-id":["4205"],"URL":"https:\/\/doi.org\/10.1007\/s11432-011-4205-z","relation":{},"ISSN":["1674-733X","1869-1919"],"issn-type":[{"type":"print","value":"1674-733X"},{"type":"electronic","value":"1869-1919"}],"subject":[],"published":{"date-parts":[[2011,2,28]]}}}