{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,4]],"date-time":"2025-03-04T18:40:12Z","timestamp":1741113612264,"version":"3.38.0"},"reference-count":14,"publisher":"Springer Science and Business Media LLC","issue":"6","license":[{"start":{"date-parts":[[2011,3,26]],"date-time":"2011-03-26T00:00:00Z","timestamp":1301097600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sci. China Inf. Sci."],"published-print":{"date-parts":[[2011,6]]},"DOI":"10.1007\/s11432-011-4218-7","type":"journal-article","created":{"date-parts":[[2011,3,26]],"date-time":"2011-03-26T03:17:53Z","timestamp":1301109473000},"page":"1293-1299","source":"Crossref","is-referenced-by-count":2,"title":["A low-jitter low-power monolithically integrated optical receiver for SDH STM-16"],"prefix":"10.1007","volume":"54","author":[{"given":"YingMei","family":"Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"ZhiGong","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Li","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2011,3,26]]},"reference":[{"key":"4218_CR1","doi-asserted-by":"crossref","first-page":"94","DOI":"10.1109\/MCOM.2002.1024421","volume":"40","author":"B. Razavi","year":"2002","unstructured":"Razavi B. Challenges in the design high-speed clock and data recovery circuits. IEEE Commun Mag, 2002, 40: 94\u2013101","journal-title":"IEEE Commun Mag"},{"key":"4218_CR2","doi-asserted-by":"crossref","first-page":"1781","DOI":"10.1109\/JSSC.2002.804337","volume":"37","author":"J. E. Rogers","year":"2002","unstructured":"Rogers J E, Long J R. A 10-Gb\/s CDR\/DEMUX with LC delay line VCO in 0.18-\u03bcm CMOS. IEEE J Solid State Circuits, 2002, 37: 1781\u20131789","journal-title":"IEEE J Solid State Circuits"},{"key":"4218_CR3","doi-asserted-by":"crossref","first-page":"1451","DOI":"10.1109\/4.540055","volume":"31","author":"F. Sato","year":"1996","unstructured":"Sato F, Tezuka H, Soda M, et al. A 2.4 Gb\/s receiver and a 1:16 demultiplexer in one chip using a super self-aligned selectively grown SiGe base (SSSB) bipolar transistor. IEEE J Solid State Circuits, 1996, 31: 1451\u20131457","journal-title":"IEEE J Solid State Circuits"},{"key":"4218_CR4","doi-asserted-by":"crossref","unstructured":"Soda M, Shiori S, Morikawa T, et al. A 2.5-Gb\/s one-chip receiver module for Gigabit-To-The-Home (GTTH) system. In: Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, San Diego, USA, 1999. 273\u2013276","DOI":"10.1109\/CICC.1999.777290"},{"key":"4218_CR5","doi-asserted-by":"crossref","unstructured":"Soliman S, Yuan F, Raahemifar K. An overview of design techniques for CMOS phase detectors. In: 2002 IEEE International Symposium on Circuits and Systems, Scottsdale, USA, 2002. 457\u2013460","DOI":"10.1109\/ISCAS.2002.1010739"},{"key":"4218_CR6","doi-asserted-by":"crossref","first-page":"38","DOI":"10.1109\/4.974544","volume":"37","author":"K. Kishine","year":"2002","unstructured":"Kishine K, Ishii K, Ichino H. Loop-parameter optimization of a PLL for a low-jitter 2.5-Gb\/s one-chip optical receiver IC with 1:8 DEMUX. IEEE J Solid State Circuits, 2002, 37: 38\u201350","journal-title":"IEEE J Solid State Circuits"},{"key":"4218_CR7","doi-asserted-by":"crossref","first-page":"2056","DOI":"10.1109\/4.545832","volume":"31","author":"J. Hauenschild","year":"1996","unstructured":"Hauenschild J, Dorschky C, von Mohrenfels T W, et al. A plastic packaged 10-Gb\/s BiCMOS clock and data recovery 1:4-Demultiplexer with external VCO. IEEE J Solid State Circuits, 1996, 31: 2056\u20132059","journal-title":"IEEE J Solid State Circuits"},{"key":"4218_CR8","unstructured":"Chen Y M, Wang Z G, Zhang L, et al. Monolithic IC of SDH STM-16 optical receiver core circuits. In: Proceedings of 2005 International Conference on Communications, Circuits and Systems, Hong Kong, China, 2005. 27\u201330"},{"key":"4218_CR9","doi-asserted-by":"crossref","DOI":"10.1109\/9780470545331","volume-title":"Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design","author":"B. Razavi","year":"1996","unstructured":"Razavi B. Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design. New York: IEEE Press, 1996"},{"key":"4218_CR10","first-page":"23","volume":"3","author":"K. Makie-Fukuda","year":"1993","unstructured":"Makie-Fukuda K, Kikuchi T, Hotta M. Measurement of digital noise in mixed-signal integrated circuits. VLSI Circuits Symp Dig Tech, 1993, 3: 23\u201324","journal-title":"VLSI Circuits Symp Dig Tech"},{"key":"4218_CR11","unstructured":"Kishine K, Ishii K, Hirose M, et al. A low-jitter, low-power 2.5-Gb\/s one-chip optical receiver IC with 1:8 DEMUX. In: Proceedings of Bipolar\/BiCMOS Circuits and Technology Meeting (BCTM), Minneapolis, USA, 1999. 177\u2013180"},{"key":"4218_CR12","doi-asserted-by":"crossref","unstructured":"Pallotta A, Centureli F, Trifiletti A. A low-power clock and data recovery circuit for 2.5 Gb\/s SDH receivers. In: Proceedings of the 2000 International Symposium on Low Power Electronics and Design, Rapallo, Italy, 2000. 67\u201372","DOI":"10.1145\/344166.344202"},{"key":"4218_CR13","doi-asserted-by":"crossref","first-page":"977","DOI":"10.1109\/TCSI.2005.862068","volume":"53","author":"W. Z. Chen","year":"2006","unstructured":"Chen W Z, Lu C H. Design and analysis of a 2.5-Gbps optical receiver analog front-end in a 0.35-\u03bcm digital CMOS technology. IEEE Trans Circuits Syst, 2006, 53: 977\u2013983","journal-title":"IEEE Trans Circuits Syst"},{"key":"4218_CR14","doi-asserted-by":"crossref","unstructured":"Tian J, Shi Y, Zheng Y D, et al. 1.25 Gb\/s low power CMOS limiting amplifier for optical receiver. In: Proceedings of 7th International Conference on Solid-State and Integrated Circuits Technology, Beijing, China, 2004. 1469\u20131471","DOI":"10.1109\/ICSICT.2004.1436878"}],"container-title":["Science China Information Sciences"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11432-011-4218-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11432-011-4218-7\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11432-011-4218-7","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,4]],"date-time":"2025-03-04T18:10:42Z","timestamp":1741111842000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11432-011-4218-7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,3,26]]},"references-count":14,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2011,6]]}},"alternative-id":["4218"],"URL":"https:\/\/doi.org\/10.1007\/s11432-011-4218-7","relation":{},"ISSN":["1674-733X","1869-1919"],"issn-type":[{"type":"print","value":"1674-733X"},{"type":"electronic","value":"1869-1919"}],"subject":[],"published":{"date-parts":[[2011,3,26]]}}}