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VPs are predominantly created in SystemC transaction-level modeling (TLM) and are leveraged for early software development and other system-level use cases. Recently, virtual prototyping has been introduced for the emerging RISC-V instruction set architecture (ISA) and become an important piece of the growing RISC-V ecosystem. In this paper, we present enhanced virtual prototyping solutions tailored for RISC-V. The foundation is an advanced open source RISC-V VP implemented in SystemC TLM and designed as a configurable and extensible platform. It scales from small bare-metal systems to large multi-core systems that run applications on top of the Linux operating system. Based on the RISC-V VP, this paper also discusses advanced VP-based verification approaches and open challenges. In combination, we provide for the first time an integrated and unified overview and perspective on advanced virtual prototyping for RISC-V.<\/jats:p>","DOI":"10.1007\/s11432-020-3308-4","type":"journal-article","created":{"date-parts":[[2021,12,29]],"date-time":"2021-12-29T08:03:53Z","timestamp":1640765033000},"update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":15,"title":["Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challenges"],"prefix":"10.1007","volume":"65","author":[{"given":"Vladimir","family":"Herdt","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rolf","family":"Drechsler","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2021,12,23]]},"reference":[{"key":"3308_CR1","unstructured":"Waterman A, Asanovi\u0107 K. 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