{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,31]],"date-time":"2026-07-31T02:51:48Z","timestamp":1785466308873,"version":"3.56.0"},"reference-count":72,"publisher":"Springer Science and Business Media LLC","issue":"10","license":[{"start":{"date-parts":[[2023,9,21]],"date-time":"2023-09-21T00:00:00Z","timestamp":1695254400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2023,9,21]],"date-time":"2023-09-21T00:00:00Z","timestamp":1695254400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Sci. China Inf. Sci."],"published-print":{"date-parts":[[2023,11]]},"DOI":"10.1007\/s11432-023-3802-8","type":"journal-article","created":{"date-parts":[[2023,9,26]],"date-time":"2023-09-26T04:01:31Z","timestamp":1695700891000},"update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":44,"title":["Recent progress in InGaZnO FETs for high-density 2T0C DRAM applications"],"prefix":"10.1007","volume":"66","author":[{"given":"Shengzhe","family":"Yan","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhaori","family":"Cong","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nianduan","family":"Lu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jinshan","family":"Yue","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qing","family":"Luo","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2023,9,21]]},"reference":[{"key":"3802_CR1","doi-asserted-by":"publisher","first-page":"334","DOI":"10.1557\/mrs.2018.95","volume":"43","author":"S K Kim","year":"2018","unstructured":"Kim S K, Popovici M. Future of dynamic random-access memory as main memory. MRS Bull, 2018, 43: 334\u2013339","journal-title":"MRS Bull"},{"key":"3802_CR2","unstructured":"Chang M. Memory-2022 trends. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2022. 121\u2013122"},{"key":"3802_CR3","unstructured":"Chang J. Memory-2020 trends. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 2020. 127\u2013129"},{"key":"3802_CR4","doi-asserted-by":"publisher","first-page":"11","DOI":"10.1016\/j.sysarc.2018.09.004","volume":"91","author":"S Mittal","year":"2018","unstructured":"Mittal S, Inukonda M S. A survey of techniques for improving error-resilience of DRAM. J Syst Architecture, 2018, 91: 11\u201340","journal-title":"J Syst Architecture"},{"key":"3802_CR5","doi-asserted-by":"publisher","first-page":"1524","DOI":"10.1109\/LED.2017.2755050","volume":"38","author":"J M Lee","year":"2017","unstructured":"Lee J M, Park D S, Yew S, et al. Novel approach for the reduction of leakage current characteristics of 20 nm DRAM capacitors with ZrO2-based high-k dielectrics. IEEE Electron Dev Lett, 2017, 38: 1524\u20131527","journal-title":"IEEE Electron Dev Lett"},{"key":"3802_CR6","doi-asserted-by":"publisher","first-page":"4839","DOI":"10.1109\/TED.2018.2870141","volume":"65","author":"J M Lee","year":"2018","unstructured":"Lee J M, Choi P H, Kim S K, et al. New method for reduction of the capacitor leakage failure rate without changing the capacitor structure or materials in DRAM mass production. IEEE Trans Electron Dev, 2018, 65: 4839\u20134845","journal-title":"IEEE Trans Electron Dev"},{"key":"3802_CR7","doi-asserted-by":"publisher","first-page":"064101","DOI":"10.1063\/1.4941537","volume":"119","author":"M Pe\u0161i\u0107","year":"2016","unstructured":"Pe\u0161i\u0107 M, Knebel S, Geyer M, et al. Low leakage ZrO2 based capacitors for sub 20 nm dynamic random access memory technology nodes. J Appl Phys, 2016, 119: 064101","journal-title":"J Appl Phys"},{"key":"3802_CR8","doi-asserted-by":"crossref","unstructured":"Popovici M, Belmonte A, Oh H, et al. High-performance (EOT <0.4 nm, Jg \u223c 10\u22127 A\/cm2) ALD-deposited RuSrTiO3 stack for next generations DRAM pillar capacitor. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2018. 51\u201354","DOI":"10.1109\/IEDM.2018.8614673"},{"key":"3802_CR9","unstructured":"Jang S, Lim J, Han J, et al. A fully integrated low voltage DRAM with thermally stable gate-first high-k metal gate process. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2019. 654\u2013656"},{"key":"3802_CR10","doi-asserted-by":"publisher","first-page":"85","DOI":"10.1109\/55.981314","volume":"23","author":"S Okhonin","year":"2002","unstructured":"Okhonin S, Nagoga M, Sallese J M, et al. A capacitor-less 1T-DRAM cell. IEEE Electron Dev Lett, 2002, 23: 85\u201387","journal-title":"IEEE Electron Dev Lett"},{"key":"3802_CR11","doi-asserted-by":"crossref","unstructured":"Song K W, Jeong H, Lee J W, et al. 55 nm capacitor-less 1T DRAM cell transistor with non-overlap structure. In: Proceedings of IEEE International Electron Devices Meeting, Washington D.C., 2008. 797","DOI":"10.1109\/IEDM.2008.4796818"},{"key":"3802_CR12","doi-asserted-by":"publisher","first-page":"412","DOI":"10.1038\/s41928-019-0282-6","volume":"2","author":"C Navarro","year":"2019","unstructured":"Navarro C, Karg S, Marquez C, et al. Capacitor-less dynamic random access memory based on a III\u2013V transistor with a gate length of 14 nm. Nat Electron, 2019, 2: 412\u2013419","journal-title":"Nat Electron"},{"key":"3802_CR13","doi-asserted-by":"crossref","unstructured":"Chun K C, Jain P, Kim T H, et al. A 1.1 V, 667 MHz random cycle, asymmetric 2T gain cell embedded DRAM with a 99.9 percentile retention time of 110 \u00b5sec. In: Proceedings of the 2010 Symposium on VLSI Technology and Circuits Digest of Technical Papers, Honolulu, 2010. 191\u2013192","DOI":"10.1109\/VLSIC.2010.5560303"},{"key":"3802_CR14","doi-asserted-by":"publisher","first-page":"187","DOI":"10.1109\/LED.2013.2292586","volume":"35","author":"H Li","year":"2014","unstructured":"Li H, Lin Y. A 2T dual port capacitor-less DRAM. IEEE Electron Dev Lett, 2014, 35: 187\u2013189","journal-title":"IEEE Electron Dev Lett"},{"key":"3802_CR15","doi-asserted-by":"crossref","unstructured":"Oota M, Ando Y, Tsuda K, et al. 3D-stacked CAAC-In-Ga-Zn oxide FETs with gate length of 72 nm. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2019. 50\u201353","DOI":"10.1109\/IEDM19573.2019.8993506"},{"key":"3802_CR16","doi-asserted-by":"crossref","unstructured":"Ye H, Gomez J, Chakraborty W, et al. Double-gate W-doped amorphous indium oxide transistors for monolithic 3D capacitorless gain cell eDRAM. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2020. 613\u2013616","DOI":"10.1109\/IEDM13553.2020.9371981"},{"key":"3802_CR17","doi-asserted-by":"crossref","unstructured":"Belmonte A, Oh H, Rassoul N, et al. Capacitor-less, long-retention (> 400 s) DRAM cell paving the way towards low-power and high-density monolithic 3D DRAM. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2020. 609\u2013612","DOI":"10.1109\/IEDM13553.2020.9371900"},{"key":"3802_CR18","doi-asserted-by":"publisher","first-page":"488","DOI":"10.1038\/nature03090","volume":"432","author":"K Nomura","year":"2004","unstructured":"Nomura K, Ohta H, Takagi A, et al. Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors. Nature, 2004, 432: 488\u2013492","journal-title":"Nature"},{"key":"3802_CR19","doi-asserted-by":"crossref","unstructured":"Lee J H, Kim D H, Yang D J, et al. World\u2019s largest (15-inch) XGA AMLCD panel using IGZO oxide TFT. In: Proceedings of Sid International Symposium, Digest of Technical Papers, 2008","DOI":"10.1889\/1.3069740"},{"key":"3802_CR20","doi-asserted-by":"publisher","first-page":"013503","DOI":"10.1063\/1.3159832","volume":"95","author":"J S Park","year":"2009","unstructured":"Park J S, Kim T W, Stryakhilev D, et al. Flexible full color organic light-emitting diode display on polyimide plastic substrate driven by amorphous indium gallium zinc oxide thin-film transistors. Appl Phys Lett, 2009, 95: 013503","journal-title":"Appl Phys Lett"},{"key":"3802_CR21","doi-asserted-by":"publisher","first-page":"167","DOI":"10.1109\/LED.2010.2093505","volume":"32","author":"B Kim","year":"2011","unstructured":"Kim B, Choi S, Kim B, et al. A novel level shifter employing IGZO TFT. IEEE Electron Dev Lett, 2011, 32: 167\u2013169","journal-title":"IEEE Electron Dev Lett"},{"key":"3802_CR22","doi-asserted-by":"publisher","first-page":"044305","DOI":"10.1088\/1468-6996\/11\/4\/044305","volume":"11","author":"T Kamiya","year":"2010","unstructured":"Kamiya T, Nomura K, Hosono H. Present status of amorphous In\u2212Ga\u2212Zn\u2212O thin-film transistors. Sci Tech Adv Mater, 2010, 11: 044305","journal-title":"Sci Tech Adv Mater"},{"key":"3802_CR23","doi-asserted-by":"publisher","first-page":"133512","DOI":"10.1063\/1.2904704","volume":"92","author":"M Kimura","year":"2008","unstructured":"Kimura M, Nakanishi T, Nomura K, et al. Trap densities in amorphous-InGaZnO4 thin-film transistors. Appl Phys Lett, 2008, 92: 133512","journal-title":"Appl Phys Lett"},{"key":"3802_CR24","doi-asserted-by":"publisher","first-page":"5043","DOI":"10.1002\/adma.201502239","volume":"27","author":"W J Lee","year":"2015","unstructured":"Lee W J, Park W T, Park S, et al. Large-scale precise printing of ultrathin sol-gel oxide dielectrics for directly patterned solution-processed metal oxide transistor arrays. Adv Mater, 2015, 27: 5043\u20135048","journal-title":"Adv Mater"},{"key":"3802_CR25","doi-asserted-by":"publisher","first-page":"529","DOI":"10.1038\/s41565-020-0655-z","volume":"15","author":"A Sebastian","year":"2020","unstructured":"Sebastian A, Le Gallo M, Khaddam-Aljameh R, et al. Memory devices and applications for in-memory computing. Nat Nanotechnol, 2020, 15: 529\u2013544","journal-title":"Nat Nanotechnol"},{"key":"3802_CR26","first-page":"4172","volume":"66","author":"X Si","year":"2019","unstructured":"Si X, Chang M F, Khwa W S, et al. A dual-split 6T SRAM-based computing-in-memory unit-macro with fully parallel product-sum operation for binarized DNN edge processors. IEEE Trans Circ Syst I, 2019, 66: 4172\u20134185","journal-title":"IEEE Trans Circ Syst I"},{"key":"3802_CR27","first-page":"667","volume":"68","author":"C Yu","year":"2021","unstructured":"Yu C, Yoo T, Kim H, et al. A logic-compatible eDRAM compute-in-memory with embedded ADCs for processing neural networks. IEEE Trans Circ Syst I, 2021, 68: 667\u2013679","journal-title":"IEEE Trans Circ Syst I"},{"key":"3802_CR28","doi-asserted-by":"publisher","first-page":"160","DOI":"10.1109\/LED.2020.3048101","volume":"42","author":"W Shim","year":"2021","unstructured":"Shim W, Yu S. Technological design of 3D NAND-based compute-in-memory architecture for GB-scale deep neural network. IEEE Electron Dev Lett, 2021, 42: 160\u2013163","journal-title":"IEEE Electron Dev Lett"},{"key":"3802_CR29","doi-asserted-by":"crossref","unstructured":"Wan W E, Kubendran R, Eryilmaz S B, et al. A 74 TMACS\/W CMOS-RRAM neurosynaptic core with dynamically reconfigurable dataflow and in-situ transposable weights for probabilistic graphical models. In: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, 2020. 498\u2013499","DOI":"10.1109\/ISSCC19947.2020.9062979"},{"key":"3802_CR30","doi-asserted-by":"publisher","first-page":"5585","DOI":"10.1109\/TED.2021.3113300","volume":"68","author":"X Sun","year":"2021","unstructured":"Sun X, Khwa W S, Chen Y S, et al. PCM-based analog compute-in-memory: impact of device non-idealities on inference accuracy. IEEE Trans Electron Dev, 2021, 68: 5585\u20135591","journal-title":"IEEE Trans Electron Dev"},{"key":"3802_CR31","doi-asserted-by":"publisher","first-page":"470","DOI":"10.1109\/TVLSI.2017.2776954","volume":"26","author":"S Jain","year":"2018","unstructured":"Jain S, Ranjan A, Roy K, et al. Computing in memory with spin-transfer torque magnetic RAM. IEEE Trans VLSI Syst, 2018, 26: 470\u2013483","journal-title":"IEEE Trans VLSI Syst"},{"key":"3802_CR32","doi-asserted-by":"publisher","first-page":"1444","DOI":"10.1109\/TED.2020.2976115","volume":"67","author":"J M Hung","year":"2020","unstructured":"Hung J M, Li X, Wu J, et al. Challenges and trends indeveloping nonvolatile memory-enabled computing chips for intelligent edge devices. IEEE Trans Electron Dev, 2020, 67: 1444\u20131453","journal-title":"IEEE Trans Electron Dev"},{"key":"3802_CR33","doi-asserted-by":"publisher","first-page":"371","DOI":"10.1038\/s41928-020-0435-7","volume":"3","author":"W Zhang","year":"2020","unstructured":"Zhang W, Gao B, Tang J, et al. Neuro-inspired computing chips. Nat Electron, 2020, 3: 371\u2013382","journal-title":"Nat Electron"},{"key":"3802_CR34","doi-asserted-by":"crossref","unstructured":"Guo J, Han K, Subhechha S, et al. A new surface potential and physics based compact model for \u03b1-IGZO TFTs at multi-nanoscale for high retention and low-power DRAM application. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2021. 182\u2013185","DOI":"10.1109\/IEDM19574.2021.9720700"},{"key":"3802_CR35","unstructured":"Guo J, Zhao Y, Yang G, et al. A new surface potential based compact model for independent dual gate \u03b1-IGZO TFT: experimental verification and circuit demonstration. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2020"},{"key":"3802_CR36","unstructured":"Chasin A, Franco J, Triantopoulos K, et al. Understanding and modelling the PBTI reliability of thin-film IGZO transistors. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2021. 657\u2013660"},{"key":"3802_CR37","doi-asserted-by":"crossref","unstructured":"Guo J, Sun Y, Wang L, et al. Compact modeling of IGZO-based CAA-FETs with time-zero-instability and BTI impact on device and capacitor-less DRAM retention reliability. In: Proceedings of 2022 Symposium on VLSI Technology and Circuits Digest of Technical Papers, Honolulu, 2022. 300\u2013301","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830482"},{"key":"3802_CR38","unstructured":"Wu Z, Chasin A, Franco J, et al. Characterizing and modelling of the BTI reliability in IGZO-TFT using light-assisted I\u2013V spectroscopy. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 695\u2013698"},{"key":"3802_CR39","unstructured":"Kong Q, Liu G, Sun C, et al. New insights into the impact of hydrogen evolution on the reliability of IGZO FETs: experiment and modeling. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 699\u2013702"},{"key":"3802_CR40","unstructured":"Belmonte A, Oh H, Subhechha S, et al. Tailoring IGZO-TFT architecture for capacitorless DRAM, demonstrating > 103 s retention, > 1011 cycles endurance and Lg scalability down to 14 nm. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2021. 226\u2013228"},{"key":"3802_CR41","doi-asserted-by":"crossref","unstructured":"Chen K, Niu J, Yang G, et al. Scaling dual-gate ultra-thin \u03b1-IGZO FET to 30 nm channel length with record-high Gm, max of 559 \u00b5S\/\u00b5m at VDS = 1 V, record-low DIBL of 10 mV\/V and nearly ideal SS of 63 mV\/dec. In: Proceedings of 2022 Symposium on VLSI Technology and Circuits Digest of Technical Papers, Honolulu, 2022. 298\u2013299","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830389"},{"key":"3802_CR42","doi-asserted-by":"crossref","unstructured":"Lu W, Zhu Z, Chen K, et al. First demonstration of dual-gate IGZO 2T0C DRAM with novel read operation, one bit line in single cell, ION = 1500 \u00b5A\/\u00b5m @ VDS = 1 V and Retention Time > 300 s. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 611\u2013614","DOI":"10.1109\/IEDM45625.2022.10019488"},{"key":"3802_CR43","unstructured":"Chand U, Fang Z, Chun-kuei C, et al. 2-kbit array of 3-D monolithically-stacked IGZO FETs with low SS-64 mV\/dec, ultra-low-leakage, competitive \u03bc \u223c 57cm2\/V\u00b7s performance and novel nMOS-only circuit demonstration. In: Proceedings of 2021 Symposium on VLSI Technology and Circuits Digest of Technical Papers, 2021"},{"key":"3802_CR44","doi-asserted-by":"crossref","unstructured":"Baba H, Ohshita S, Hamada T, et al. Novel analog in-memory compute with > 1 nA current\/cell and 143.9 TOPS\/W enabled by monolithic normally-off Zn-rich CAAC-IGZO FET-on-Si CMOS technology. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2021. 466\u2013469","DOI":"10.1109\/IEDM19574.2021.9721312"},{"key":"3802_CR45","doi-asserted-by":"publisher","first-page":"532","DOI":"10.1038\/s41586-021-03625-w","volume":"595","author":"J Biggs","year":"2021","unstructured":"Biggs J, Myers J, Kufel J, et al. A natively flexible 32-bit arm microprocessor. Nature, 2021, 595: 532\u2013536","journal-title":"Nature"},{"key":"3802_CR46","unstructured":"Kunitake H, Ohshima K, Tsuda K, et al. High thermal tolerance of 25-nm c-axis aligned crystalline In\u2212Ga\u2212Zn oxide FET. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2018. 312\u2013315"},{"key":"3802_CR47","doi-asserted-by":"crossref","unstructured":"Mo F, Tagawa Y, Jin C, et al. Experimental demonstration of ferroelectric HfO2 FET with ultrathin-body IGZO for high-density and low-power memory application. In: Proceedings of 2019 Symposium on VLSI Technology and Circuits Digest of Technical Papers, Kyoto, 2019","DOI":"10.23919\/VLSIT.2019.8776553"},{"key":"3802_CR48","unstructured":"Han K, Kong Q, Kang Y, et al. First demonstration of oxide semiconductor nanowire transistors: a novel digital etch technique, IGZO channel, nanowire width down to \u223c20 nm, and Ion exceeding 1300 \u00b5A\/\u00b5m. In: Proceedings of 2021 Symposium on VLSI Technology and Circuits Digest of Technical Papers, 2021"},{"key":"3802_CR49","unstructured":"Sun C, Han K, Samanta S, et al. First demonstration of BEOL-compatible ferroelectric TCAM featuring \u03b1-IGZO Fe-TFTs with large memory window of 2.9 V, scaled channel length of 40 nm, and high endurance of 108 cycles. In: Proceedings of 2021 Symposium on VLSI Technology and Circuits Digest of Technical Papers, 2021"},{"key":"3802_CR50","doi-asserted-by":"crossref","unstructured":"Samanta S, Han K, Sun C, et al. Amorphous IGZO TFTs featuring extremely-scaled channel thickness and 38 nm channel length: achieving record high Gm, max of 125 \u00b5S\/\u00b5m at VDS of 1 V and ION of 350 \u00b5A\/\u00b5m. In: Proceedings of 2020 Symposium on VLSI Technology and Circuits Digest of Technical Papers, 2020","DOI":"10.1109\/VLSITechnology18217.2020.9265052"},{"key":"3802_CR51","unstructured":"Subhechha S, Rassoul N, Belmonte A, et al. First demonstration of sub-12 nm Lg gate last IGZO-TFTs with oxygen tunnel architecture for front gate devices. In: Proceedings of 2021 Symposium on VLSI Technology and Circuits Digest of Technical Papers, 2021"},{"key":"3802_CR52","doi-asserted-by":"crossref","unstructured":"Subhechha S, Rassoul N, Belmonte A, et al. Ultra-low leakage IGZO-TFTs with raised source\/drain for Vt > 0 V and Ion > 30 \u00b5A\/\u00b5m. In: Proceedings of 2022 Symposium on VLSI Technology and Circuits Digest of Technical Papers, Honolulu, 2022","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830448"},{"key":"3802_CR53","doi-asserted-by":"crossref","unstructured":"Wang C, Kumar A, Han K, et al. Extremely scaled bottom gate \u03b1-IGZO transistors using a novel patterning technique achieving record high Gm of 479.5 \u00b5S\/\u00b5m (VDS of 1 V) and fT of 18.3 GHz (VDS of 3 V). In: Proceedings of 2022 Symposium on VLSI Technology and Circuits Digest of Technical Papers, Honolulu, 2022","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830393"},{"key":"3802_CR54","unstructured":"Chang S W, Lu T H, Yang C Y, et al. First demonstration of heterogeneous IGZO\/Si CFET monolithic 3D integration with dual workfunction gate for ultra low-power SRAM and RF applications. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2021. 733\u2013736"},{"key":"3802_CR55","doi-asserted-by":"crossref","unstructured":"Li Q J, Gu C, Zhu S, et al. BEOL-compatible high-performance \u03b1-IGZO transistors with record high Ids, max = 1207 \u00b5A\/\u00b5m and on-off ratio exceeding 1011 at Vds = 1 V. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 42\u201345","DOI":"10.1109\/IEDM45625.2022.10019448"},{"key":"3802_CR56","doi-asserted-by":"crossref","unstructured":"Duan X, Huang K, Feng J, et al. Novel vertical channel-all-around (CAA) IGZO FETs for 2T0C DRAM with high density beyond 4F2 by monolithic stacking. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2021. 222\u2013225","DOI":"10.1109\/IEDM19574.2021.9720682"},{"key":"3802_CR57","doi-asserted-by":"crossref","unstructured":"Huang K, Duan X, Feng J, et al. Vertical channel-all-around (CAA) IGZO FET under 50 nm CD with high read current of 32.8 \u00b5A\/\u00b5m (Vth + 1 V), well-performed thermal stability up to 120\u00b0C for low latency, high-density 2T0C 3D DRAM application. In: Proceedings of 2022 Symposium on VLSI Technology and Circuits Digest of Technical Papers, Honolulu, 2022. 296\u2013297","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830271"},{"key":"3802_CR58","unstructured":"Chen C, Duan X, Yang G, et al. Inter-layer dielectric engineering for monolithic stacking 4F2-2T0C DRAM with channel-all-around (CAA) IGZO FET to achieve good reliability (> 104 s bias stress, > 1012 cycles endurance. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 615\u2013618"},{"key":"3802_CR59","doi-asserted-by":"publisher","first-page":"021303","DOI":"10.1063\/1.4953034","volume":"3","author":"L Petti","year":"2016","unstructured":"Petti L, M\u00fcnzenrieder N, Vogt C, et al. Metal oxide semiconductor thin-film transistors for flexible electronics. Appl Phys Rev, 2016, 3: 021303","journal-title":"Appl Phys Rev"},{"key":"3802_CR60","doi-asserted-by":"crossref","unstructured":"Hu Q, Li Q, Zhu S, et al. Optimized IGZO FETs for capacitorless DRAM with retention of 10 ks at RT and 7 ks at 85\u00b0C at zero Vhold with sub-10 ns speed and 3-bit operation. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 619\u2013622","DOI":"10.1109\/IEDM45625.2022.10019435"},{"key":"3802_CR61","doi-asserted-by":"crossref","unstructured":"Cosemans S, Verhoef B, Doevenspeck J, et al. Towards 10000TOPS\/W DNN inference with analog in-memory computing\u2013a circuit blueprint, device options and requirements. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2019","DOI":"10.1109\/IEDM19573.2019.8993599"},{"key":"3802_CR62","doi-asserted-by":"publisher","first-page":"4616","DOI":"10.1109\/TED.2020.3025986","volume":"67","author":"D Saito","year":"2020","unstructured":"Saito D, Doevenspeck J, Cosemans S, et al. IGZO-based compute cell for analog in-memory computing-DTCO analysis to enable ultralow-power AI at edge. IEEE Trans Electron Dev, 2020, 67: 4616\u20134620","journal-title":"IEEE Trans Electron Dev"},{"key":"3802_CR63","doi-asserted-by":"crossref","unstructured":"Liu J, Tang W, Liu Y, et al. Almost-nonvolatile IGZO-TFT-based near-sensor in-memory computing. In: Proceedings of 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, 2021","DOI":"10.1109\/ISCAS51556.2021.9401719"},{"key":"3802_CR64","doi-asserted-by":"crossref","unstructured":"Raman S, Xie S, Kulkarni J P. Compute-in-eDRAM with backend integrated indium gallium zinc oxide transistors. In: Proceedings of 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, 2021","DOI":"10.1109\/ISCAS51556.2021.9401798"},{"key":"3802_CR65","doi-asserted-by":"crossref","unstructured":"Liu J L, Sun C, Tang W J, et al. Low-power and scalable retention-enhanced IGZO TFT eDRAM-based charge-domain computing. In: Proceedings of 2021 IEEE International Electron Devices Meeting (IEDM), San Francisco, 2021. 462\u2013465","DOI":"10.1109\/IEDM19574.2021.9720576"},{"key":"3802_CR66","unstructured":"Bao L, Wang Z, Shi Y, et al. Experimental demonstration of high-order in-memory computing based on IGZO charge trapping RAM array for polynomial regression acceleration. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 26\u201329"},{"key":"3802_CR67","doi-asserted-by":"publisher","first-page":"1382","DOI":"10.1109\/TED.2020.2963911","volume":"67","author":"A Spessot","year":"2020","unstructured":"Spessot A, Oh H. 1T-1C dynamic random access memory status, challenges, and prospects. IEEE Trans Electron Dev, 2020, 67: 1382\u20131393","journal-title":"IEEE Trans Electron Dev"},{"key":"3802_CR68","doi-asserted-by":"publisher","first-page":"74","DOI":"10.1038\/nature22994","volume":"547","author":"M M Shulaker","year":"2017","unstructured":"Shulaker M M, Hills G, Park R S, et al. Three-dimensional integration of nanotechnologies for computing and data storage on a single chip. Nature, 2017, 547: 74\u201378","journal-title":"Nature"},{"key":"3802_CR69","unstructured":"Li Y, Tang J, Gao B, et al. Monolithic 3D integration of logic, memory and computing-in-memory for one-shot learning. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2021. 478\u2013481"},{"key":"3802_CR70","unstructured":"An R, Li Y, Tang J, et al. A hybrid computing-in-memory architecture by monolithic 3D integration of BEOL CNT\/IGZO based CFET logic and analog RRAM. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 419\u2013422"},{"key":"3802_CR71","doi-asserted-by":"crossref","unstructured":"Chen M C, Ohshita S, Amano S, et al. A > 64 multiple states and > 210 TOPS\/W high efficient computing by monolithic Si\/CAAC-IGZO + super-lattice ZrO2\/Al2O3\/ZrO2 for ultra-low power edge AI application. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2022. 423\u2013426","DOI":"10.1109\/IEDM45625.2022.10019324"},{"key":"3802_CR72","doi-asserted-by":"publisher","first-page":"777","DOI":"10.1038\/s41467-023-36104-z","volume":"14","author":"E Ozer","year":"2023","unstructured":"Ozer E, Kufel J, Biggs J, et al. Malodour classification with low-cost flexible electronics. Nat Commun, 2023, 14: 777","journal-title":"Nat Commun"}],"container-title":["Science China Information Sciences"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11432-023-3802-8.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s11432-023-3802-8\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s11432-023-3802-8.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,11,18]],"date-time":"2024-11-18T21:27:22Z","timestamp":1731965242000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s11432-023-3802-8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,9,21]]},"references-count":72,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2023,11]]}},"alternative-id":["3802"],"URL":"https:\/\/doi.org\/10.1007\/s11432-023-3802-8","relation":{},"ISSN":["1674-733X","1869-1919"],"issn-type":[{"value":"1674-733X","type":"print"},{"value":"1869-1919","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,9,21]]},"assertion":[{"value":"1 February 2023","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"29 March 2023","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"9 June 2023","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"21 September 2023","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}],"article-number":"200404"}}