{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,15]],"date-time":"2025-06-15T01:40:08Z","timestamp":1749951608691,"version":"3.41.0"},"reference-count":58,"publisher":"Springer Science and Business Media LLC","issue":"5","license":[{"start":{"date-parts":[[2017,2,6]],"date-time":"2017-02-06T00:00:00Z","timestamp":1486339200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"funder":[{"name":"Spero Devices"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Real-Time Image Proc"],"published-print":{"date-parts":[[2019,10]]},"DOI":"10.1007\/s11554-017-0669-4","type":"journal-article","created":{"date-parts":[[2017,2,6]],"date-time":"2017-02-06T03:52:45Z","timestamp":1486353165000},"page":"1607-1628","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":6,"title":["Analog signal processing solution for machine vision applications"],"prefix":"10.1007","volume":"16","author":[{"given":"Nihar","family":"Athreyas","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dev","family":"Gupta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jai","family":"Gupta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2017,2,6]]},"reference":[{"issue":"3","key":"669_CR1","first-page":"207","volume":"3","author":"A Alma Delic","year":"2015","unstructured":"Alma Delic, A., et al.: Programmable state-variable filter with wide frequency and Q tuning range. Int. J. Electron. Electr. Eng. 3(3), 207\u2013211 (2015)","journal-title":"Int. J. Electron. Electr. Eng."},{"key":"669_CR2","unstructured":"Analog Devices: ADG601\/602 SPST switches. ADG601\/602 datasheet"},{"key":"669_CR3","unstructured":"Analog Devices: AD8336 wide bandwidth, DC-coupled VGA. AD8336 datasheet"},{"key":"669_CR4","unstructured":"Analog Devices: AD4817-1 low-noise, 1\u00a0GHz, FastFET Op Amps. AD4817 datasheet"},{"key":"669_CR5","unstructured":"Analog Devices: ADL5391 DC to 2\u00a0GHz, multiplier. ADL5391 datasheet"},{"issue":"25","key":"669_CR6","doi-asserted-by":"publisher","first-page":"1304","DOI":"10.1049\/el.2009.1718","volume":"45","author":"G Botella","year":"2009","unstructured":"Botella, G., et al.: Bio-inspired robust optical flow processor system for VLSI implementation. Electron. Lett. 45(25), 1304\u20131305 (2009)","journal-title":"Electron. Lett."},{"issue":"4","key":"669_CR7","doi-asserted-by":"publisher","first-page":"616","DOI":"10.1109\/TVLSI.2009.2013957","volume":"18","author":"G Botella","year":"2010","unstructured":"Botella, G., et al.: Robust bioinspired architecture for optical-flow computation. IEEE Trans. VLSI Syst. 18(4), 616\u2013629 (2010)","journal-title":"IEEE Trans. VLSI Syst."},{"key":"669_CR8","unstructured":"Carmona, R., et al.: A 0.5\u00a0\u00b5m CMOS CNN analog random access memory chip for massive image processing. In: IEEE International workshop on CNN and their Applications (1998)"},{"key":"669_CR9","doi-asserted-by":"crossref","unstructured":"Christopher Soell., et al.: A CMOS image sensor with analog pre-processing capability suitable for smart camera applications. In: IEEE ISPACS, pp. 279\u2013284 (2015)","DOI":"10.1109\/ISPACS.2015.7432780"},{"key":"669_CR10","doi-asserted-by":"crossref","unstructured":"Corradi, F., et al.: Decision making and perceptual bistability in spike-based neuromorphic VLSI systems. In: IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, pp. 2708\u20132711 (2015)","DOI":"10.1109\/ISCAS.2015.7169245"},{"key":"669_CR11","unstructured":"Culurciello, E.: Enabling machines to perceive the world. Teradeep Inc. (2014)"},{"key":"669_CR12","doi-asserted-by":"crossref","unstructured":"De Simone, F., et al.: A comparative study of color image compression standards using perceptually driven quality metrics. SPIE, Optical Engineering Applications (2008)","DOI":"10.1117\/12.797795"},{"key":"669_CR13","unstructured":"Devereux, V.G.: Limiting of YUV digital video signals. BBC Research Department (1987)"},{"issue":"1","key":"669_CR14","doi-asserted-by":"publisher","first-page":"81","DOI":"10.1007\/s11760-009-0144-1","volume":"5","author":"R Dosselmann","year":"2009","unstructured":"Dosselmann, R., Yang, X.D.: A comprehensive assessment of the structural similarity index. SIViP 5(1), 81\u201391 (2009)","journal-title":"SIViP"},{"issue":"1","key":"669_CR15","doi-asserted-by":"publisher","first-page":"13","DOI":"10.1109\/TCSI.2004.840093","volume":"52","author":"P Dudek","year":"2005","unstructured":"Dudek, P., et al.: A general-purpose processor-per-pixel analog SIMD vision chip. IEEE Trans. Circuits Syst. 52(1), 13\u201320 (2005)","journal-title":"IEEE Trans. Circuits Syst."},{"key":"669_CR16","unstructured":"Espejo, S., et al.: A 0.8\u00a0\u00b5m CMOS programmable analog-array-processing vision chip with local logic and image-memory. In: European IEEE Solid-State Circuits Conference, pp. 280\u2013283 (1996)"},{"key":"669_CR17","volume-title":"Digital Image Processing","author":"R Gonzalez","year":"2002","unstructured":"Gonzalez, R., Woods, R.: Digital Image Processing. Prentice Hall, Upper Saddle River (2002)"},{"issue":"12","key":"669_CR18","doi-asserted-by":"publisher","first-page":"2548","DOI":"10.1109\/TCSI.2006.883843","volume":"53","author":"R Gotarredona","year":"2006","unstructured":"Gotarredona, R., et al.: A neuromorphic cortical-layer microchip for spike-based event processing vision systems. IEEE Trans. Circuits Syst. I Regul. Pap. 53(12), 2548\u20132566 (2006)","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"669_CR19","unstructured":"Hall, T.: Field-programmable analog arrays: a floating-gate approach. Ph.D. Dissertation, Georgia Institute of Technology, Atlanta, GA (2004)"},{"key":"669_CR20","doi-asserted-by":"crossref","unstructured":"Harpe, P., et al.: A 7-to-10 bit 0-to-4 MS\/s flexible SAR ADC with 6.5-to-16fJ\/conversion step. In: IEEE J. Solid-State Circuits, pp. 472\u2013474 (2012)","DOI":"10.1109\/ISSCC.2012.6177096"},{"key":"669_CR21","doi-asserted-by":"crossref","unstructured":"Indiveri, G., et al.: A reconfigurable neuromorphic VLSI multi-chip system applied to visual motion computation. In: Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, (MicroNeuro \u201899), Granada, pp. 37\u201344 (1999)","DOI":"10.1109\/MN.1999.758844"},{"key":"669_CR22","doi-asserted-by":"crossref","unstructured":"Jendernalik, W., et al.: Analog CMOS processor for early vision processing with highly reduced power consumption. In: 20th European Conference on Circuit Theory and Design, pp. 745\u2013748 (2011)","DOI":"10.1109\/ECCTD.2011.6043651"},{"issue":"2","key":"669_CR23","first-page":"141","volume":"59","author":"W Jendernalik","year":"2011","unstructured":"Jendernalik, W., et al.: CMOS realization of analogue processor for early vision processing. Bull. Pol. Acad. Sci.: Tech. Sci. 59(2), 141\u2013147 (2011)","journal-title":"Bull. Pol. Acad. Sci.: Tech. Sci."},{"issue":"5","key":"669_CR24","doi-asserted-by":"publisher","first-page":"539","DOI":"10.4218\/etrij.05.0905.0008","volume":"27","author":"Jung-Hwan Kim","year":"2005","unstructured":"Kim, J.-H., et al.: A low power analog CMOS vision chip for edge detection using electronic switches. ETRI J. 27(5), 539\u2013544 (2005)","journal-title":"ETRI Journal"},{"issue":"3","key":"669_CR25","doi-asserted-by":"publisher","first-page":"235","DOI":"10.1109\/4.364437","volume":"30","author":"P Kinget","year":"1995","unstructured":"Kinget, P., et al.: A programmable analog cellular neural network CMOS chip for high speed image processing. IEEE J. Solid-State Circuits 30(3), 235\u2013243 (1995)","journal-title":"IEEE J. Solid-State Circuits"},{"key":"669_CR26","doi-asserted-by":"crossref","unstructured":"Klein, J.-O., et al.: Low power image processing: analog versus digital comparison. In: IEEE International Workshop on Computer Architecture for Machine Perception, pp. 111\u2013115 (2005)","DOI":"10.1109\/CAMP.2005.33"},{"key":"669_CR27","doi-asserted-by":"crossref","unstructured":"Kong, J. S., et. al.: A 160x120 edge detection vision chip for neuromorphic systems using logarithmic active pixel sensor with low power dissipation. In: ICONIP, pp. 97\u2013106 (2007)","DOI":"10.1007\/978-3-540-69162-4_11"},{"key":"669_CR28","unstructured":"Krizhevsky, A., et al.: ImageNet classification with deep convolutional neural networks. In: Advances in Neural Information Processing Systems, pp. 1097\u20131105 (2012)"},{"issue":"3","key":"669_CR29","doi-asserted-by":"publisher","first-page":"708","DOI":"10.1109\/JSSC.2014.2301769","volume":"49","author":"Wei-Te Lin","year":"2014","unstructured":"Lin, W.-T., et al.: A 12-bit 40\u00a0nm DAC achieving SFDR >70\u00a0dB at 1.6 GSPS and IMD <\u221261\u00a0dB at 2.8 GSPS with DEMDRZ technique. In: IEEE Journal of Solid-State Circuits, pp. 708\u2013717 (2014)","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"669_CR30","unstructured":"Linan, G., et al.: A 0.5\u00a0\u00b5m CMOS 106 transistors analog programmable array processor for real-time image processing. In: IEEE Solid-State Circuits Conference, pp 358\u2013361 (1999)"},{"issue":"12","key":"669_CR31","doi-asserted-by":"publisher","first-page":"1458","DOI":"10.1109\/82.899640","volume":"47","author":"S-C Liu","year":"2000","unstructured":"Liu, S.-C.: A neuromorphic aVLSI model of global motion processing in the fly. IEEE Trans. Circuits Syst. II: Analog Digit. Signal Process 47(12), 1458\u20131467 (2000). doi: 10.1109\/82.899640","journal-title":"IEEE Trans. Circuits Syst. II: Analog Digit. Signal Process"},{"issue":"6","key":"669_CR32","doi-asserted-by":"publisher","first-page":"1470","DOI":"10.1109\/JSSC.2008.923621","volume":"43","author":"W Miao","year":"2008","unstructured":"Miao, W., et al.: A programmable SIMD vision chip for real-time vision applications. IEEE J. Solid-State Circuits 43(6), 1470\u20131479 (2008). doi: 10.1109\/JSSC.2008.923621","journal-title":"IEEE J. Solid-State Circuits"},{"key":"669_CR33","unstructured":"Minicircuit: RLP-70+ low pass filter. RLP-70+ datasheet"},{"key":"669_CR34","unstructured":"Movidius: Software programmable media processor (2011)"},{"key":"669_CR35","unstructured":"Movidius: Myriad 2 MA2\u00d75\u00d7 vision processor VPU product brief"},{"key":"669_CR36","unstructured":"Nvidia: NVIDIA Tesla P100. In: Nvidia whitepaper"},{"key":"669_CR37","unstructured":"Nvidia: GPU-based deep learning inference: a performance and power analysis. In: Nvidia whitepaper"},{"key":"669_CR38","unstructured":"Ovtcharov, K., et al.: Accelerating deep convolutional neural networks using specialized hardware. In: Microsoft Research (2015)"},{"issue":"8","key":"669_CR39","first-page":"1559","volume":"52","author":"X Pan","year":"2011","unstructured":"Pan, X., Graeb, H.: Reliability optimization of analog integrated circuits considering the tradeoff between lifetime and area. ICMAT, Elsevier 52(8), 1559\u20131564 (2011)","journal-title":"ICMAT, Elsevier"},{"issue":"1","key":"669_CR40","doi-asserted-by":"publisher","first-page":"9","DOI":"10.1049\/ip-g-2.1989.0002","volume":"136","author":"Y Papananos","year":"1989","unstructured":"Papananos, Y.: Feasibility of analogue computation for image processing application. IEEE Proc.- Circuits, Devices Sys. 136(1), 9\u201313 (1989)","journal-title":"IEEE Proc.- Circuits, Devices Sys."},{"issue":"6","key":"669_CR41","doi-asserted-by":"publisher","first-page":"1843","DOI":"10.1109\/TMTT.2016.2562003","volume":"64","author":"Mahdi Parvizi","year":"2016","unstructured":"Parvizi, M., et al.: An ultra-low-power wideband inductorless CMOS LNA with tunable active shunt-feedback. In: IEEE Trans. Microw. Theory Tech. 64(6) (2016)","journal-title":"IEEE Transactions on Microwave Theory and Techniques"},{"key":"669_CR42","doi-asserted-by":"crossref","unstructured":"Potluri, S., et al.: CNN based high performance computing for real-time image processing on GPU. In: IEEE Proceedings of the Joint INDS and ISTET, pp. 1\u20137 (2011)","DOI":"10.1109\/INDS.2011.6024781"},{"key":"669_CR43","doi-asserted-by":"crossref","unstructured":"Schlottmann, C., et al.: Vector matrix multiplier on field programmable analog array. In: IEEE International Conference on Acoustics, Speech and Signal Processing, pp. 1522\u20131525 (2010)","DOI":"10.1109\/ICASSP.2010.5495508"},{"key":"669_CR44","doi-asserted-by":"crossref","unstructured":"Shameli, A. et al.: A Novel ultra-low power low noise amplifier using differential inductor feedback. In: IEEE European Solid-State Conference, pp. 352\u2013355 (2006)","DOI":"10.1109\/ESSCIR.2006.307603"},{"key":"669_CR45","doi-asserted-by":"crossref","unstructured":"Sharad, M., et al.: Ultra-low energy analog image processing using spin based neurons. In: IEEE\/ACM International Symposium on Nanoscale Architectures, pp. 211\u2013217 (2012)","DOI":"10.1145\/2765491.2765529"},{"key":"669_CR46","doi-asserted-by":"crossref","unstructured":"Shimonomura, K., et al.: Neuromorphic binocular vision system for real-time disparity estimation. In: IEEE International Conference on Robotics and Automation, pp. 4867\u20134872, Roma (2007)","DOI":"10.1109\/ROBOT.2007.364229"},{"issue":"5","key":"669_CR47","doi-asserted-by":"publisher","first-page":"963","DOI":"10.1109\/TCSI.2004.827619","volume":"51","author":"A Stocker","year":"2004","unstructured":"Stocker, A.: Analog VLSI focal-plane array with dynamic connections for the estimation of piecewise-smooth optical flow. IEEE Trans. Circuits Syst. I Regul. Pap. 51(5), 963\u2013973 (2004)","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"669_CR48","unstructured":"Tang, H.: Study of design for reliability of RF and analog integrated circuits. Ph.D. Dissertation, University of Central Florida, Orlando, Florida (2012)"},{"key":"669_CR49","unstructured":"Texas Instruments: LMH6552 1.5\u00a0GHz fully differential amplifier. LMH6552 Datasheet, April 2007 (revised Jan 2015)"},{"key":"669_CR50","doi-asserted-by":"crossref","unstructured":"Valle, M. et al.: An analog VLSI neural network for real-time image processing in industrial applications. In: Seventh IEEE ASIC conference, pp. 37\u201340 (1994)","DOI":"10.1109\/ASIC.1994.404614"},{"key":"669_CR51","doi-asserted-by":"crossref","unstructured":"Vornicu, I., et al.: Image processing using a CMOS analog parallel architecture. In: IEEE Proceedings on CAS, vol. 2 (2010)","DOI":"10.1109\/SMICND.2010.5650530"},{"key":"669_CR52","doi-asserted-by":"publisher","DOI":"10.1002\/9780470024065","volume-title":"Digital Video Quality: Vision Models and Metrics","author":"S Winkler","year":"2005","unstructured":"Winkler, S.: Digital Video Quality: Vision Models and Metrics. Wiley, West Sussex (2005)"},{"key":"669_CR53","unstructured":"Wyatt, J.L., et al.: The MIT Vision chip project: analog VLSI systems for fast image acquisition and early vision processing. In: IEEE International Conference on Robotics and Automation (1991)"},{"key":"669_CR54","unstructured":"Xilinx: 7 Series FPGAs overview. DS180 (v2.0) (2016)"},{"key":"669_CR55","unstructured":"Xilinx: Artix-7 FPGAs data sheet: DC and AC switching characteristics. Artix-7 datasheet (2015)"},{"issue":"2","key":"669_CR56","doi-asserted-by":"publisher","first-page":"254","DOI":"10.1109\/JETCAS.2015.2433552","volume":"5","author":"W Xinyu","year":"2015","unstructured":"Xinyu, W., et al.: Homogeneous spiking neuromorphic system for real-world pattern recognition. IEEE J. Emerg. Sel.Top. Circuits Syst. 5(2), 254\u2013266 (2015)","journal-title":"IEEE J. Emerg. Sel.Top. Circuits Syst."},{"key":"669_CR57","doi-asserted-by":"crossref","unstructured":"Yagi, T., Shimonomura, K.: Silicon primary visual cortex designed with a mixed analog-digital architecture. In: International Joint Conference on Neural Networks, pp. 2723\u20132728, Orlando, FL (2007)","DOI":"10.1109\/IJCNN.2007.4371389"},{"key":"669_CR58","doi-asserted-by":"crossref","unstructured":"Yin, C., et al., \u201cA 0.5\u00a0V 34.4uW 14.28kfps 105\u00a0dB smart image sensor with array level analog signal processing\u201d, IEEE Solid-State Circuits Conference, pp. 97-100, Nov. 2013","DOI":"10.1109\/ASSCC.2013.6690991"}],"container-title":["Journal of Real-Time Image Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11554-017-0669-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11554-017-0669-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11554-017-0669-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,15]],"date-time":"2025-06-15T00:58:24Z","timestamp":1749949104000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11554-017-0669-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,2,6]]},"references-count":58,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2019,10]]}},"alternative-id":["669"],"URL":"https:\/\/doi.org\/10.1007\/s11554-017-0669-4","relation":{},"ISSN":["1861-8200","1861-8219"],"issn-type":[{"type":"print","value":"1861-8200"},{"type":"electronic","value":"1861-8219"}],"subject":[],"published":{"date-parts":[[2017,2,6]]},"assertion":[{"value":"18 June 2016","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"17 January 2017","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"6 February 2017","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}