{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,23]],"date-time":"2026-02-23T10:07:12Z","timestamp":1771841232460,"version":"3.50.1"},"reference-count":38,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2018,5,5]],"date-time":"2018-05-05T00:00:00Z","timestamp":1525478400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Real-Time Image Proc"],"published-print":{"date-parts":[[2020,4]]},"DOI":"10.1007\/s11554-018-0776-x","type":"journal-article","created":{"date-parts":[[2018,5,5]],"date-time":"2018-05-05T09:43:38Z","timestamp":1525513418000},"page":"357-370","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":8,"title":["FPGA Implementation of Optimized Karhunen\u2013Loeve Transform for Image Processing Applications"],"prefix":"10.1007","volume":"17","author":[{"given":"Satish S.","family":"Bhairannawar","sequence":"first","affiliation":[]},{"given":"Sayantam","family":"Sarkar","sequence":"additional","affiliation":[]},{"given":"K. B.","family":"Raja","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2018,5,5]]},"reference":[{"key":"776_CR1","unstructured":"https:\/\/en.wikipedia.org\/wiki\/Digital_image_processing"},{"issue":"6","key":"776_CR2","doi-asserted-by":"publisher","first-page":"62","DOI":"10.1109\/6.925269","volume":"38","author":"J Eyre","year":"2001","unstructured":"Eyre, J.: The digital signal processor derby. IEEE Spectr. 38(6), 62\u201368 (2001)","journal-title":"IEEE Spectr."},{"key":"776_CR3","unstructured":"Pucknell, D.A., Eshraghian, K.: Basic VLSI design. In: PHI Learning, 3rd edn (2009)"},{"key":"776_CR4","unstructured":"https:\/\/en.wikipedia.org\/wiki\/Karhunen-Loeve_theorem"},{"issue":"2","key":"776_CR5","doi-asserted-by":"publisher","first-page":"305","DOI":"10.1109\/29.1527","volume":"36","author":"J Stapleton","year":"1988","unstructured":"Stapleton, J., Bass, S.C.: Synthesis of musical tones based on the Karhunen\u2013Loeve transform. IEEE Trans. Acoust. Speech Signal Process. 36(2), 305\u2013319 (1988)","journal-title":"IEEE Trans. Acoust. Speech Signal Process."},{"issue":"1","key":"776_CR6","doi-asserted-by":"publisher","first-page":"99","DOI":"10.1109\/29.17504","volume":"37","author":"JB Burl","year":"1989","unstructured":"Burl, J.B.: Estimating the basis function of the Karhunen\u2013Loeve transform. IEEE Trans. Acoust. Speech Signal Process. 37(1), 99\u2013105 (1989)","journal-title":"IEEE Trans. Acoust. Speech Signal Process."},{"issue":"4","key":"776_CR7","doi-asserted-by":"publisher","first-page":"372","DOI":"10.1109\/76.465094","volume":"5","author":"XMG Xia","year":"1995","unstructured":"Xia, X.M.G., Suter, B.W.: On vector Karhunen\u2013Loeve transform and optimal vector transforms. IEEE Trans. Circuit Syst. Video Technol. 5(4), 372\u2013374 (1995)","journal-title":"IEEE Trans. Circuit Syst. Video Technol."},{"issue":"4","key":"776_CR8","doi-asserted-by":"publisher","first-page":"330","DOI":"10.1109\/2945.765327","volume":"4","author":"KA Robbins","year":"1998","unstructured":"Robbins, K.A.: Visualization of scientific video data using KL decomposition. IEEE Trans. Vis. Comput. Graph. 4(4), 330\u2013343 (1998)","journal-title":"IEEE Trans. Vis. Comput. Graph."},{"issue":"9","key":"776_CR9","doi-asserted-by":"publisher","first-page":"1183","DOI":"10.1109\/83.784431","volume":"8","author":"B Lahme","year":"1999","unstructured":"Lahme, B., Miranda, R.: Karhunen\u2013Loeve decomposition in the presence of symmetry\u2014part-I. IEEE Trans. Imagel Process. 8(9), 1183\u20131190 (1999)","journal-title":"IEEE Trans. Imagel Process."},{"issue":"8","key":"776_CR10","doi-asserted-by":"publisher","first-page":"1371","DOI":"10.1109\/83.855432","volume":"9","author":"A Levy","year":"2000","unstructured":"Levy, A., Lindenbaum, M.: Sequential Karhunen\u2013Loeve basis extraction and it\u2019s application to image. IEEE Trans. Image Process. 9(8), 1371\u20131374 (2000)","journal-title":"IEEE Trans. Image Process."},{"issue":"9","key":"776_CR11","doi-asserted-by":"publisher","first-page":"977","DOI":"10.1109\/34.955111","volume":"23","author":"R Cappelli","year":"2001","unstructured":"Cappelli, R., Maio, D., Maltoni, D.: Multispace KL for pattern representation and classification. IEEE Trans. Pattern Anal. Mach. Intell. 23(9), 977\u2013996 (2001)","journal-title":"IEEE Trans. Pattern Anal. Mach. Intell."},{"issue":"1","key":"776_CR12","doi-asserted-by":"crossref","first-page":"42","DOI":"10.29292\/jics.v5i1.309","volume":"5","author":"DM Munoz","year":"2010","unstructured":"Munoz, D.M., Sanchez, D.F., Llanos, C.H., Ayala-Ricon, M.: Tradeoff of FPGA design of a floating-point library for arithmetic operators. Int. J. Integr. Circuits Syst. 5(1), 42\u201352 (2010)","journal-title":"Int. J. Integr. Circuits Syst."},{"issue":"15","key":"776_CR13","first-page":"1531","volume":"4","author":"J Kaur","year":"2014","unstructured":"Kaur, J., Grewal, N.S.: Design and FPGA implementation of a novel square root evluator based on vedic mathematics. Int. J. Inf. Comput. Technol. 4(15), 1531\u20131537 (2014)","journal-title":"Int. J. Inf. Comput. Technol."},{"key":"776_CR14","doi-asserted-by":"crossref","unstructured":"Yoshikawa, K., Iwanaga, N., Yamawaki, A.: Developement of fixed-point square root operation for high level synthesis. In: 2nd International Conference on Industrial Application Engineering, China, pp. 16\u201320 (2014)","DOI":"10.12792\/iciae2014.006"},{"issue":"5","key":"776_CR15","doi-asserted-by":"publisher","first-page":"533","DOI":"10.7763\/IJCEE.2013.V5.767","volume":"5","author":"A Nanhe","year":"2013","unstructured":"Nanhe, A., Gawali, G., Ahire, S., Sivasankarami, K.: Implementation of fixed and floating point square root using nonrestoring algorithm on FPGA. Int. J. Comput. Electr. Eng. 5(5), 533\u2013537 (2013)","journal-title":"Int. J. Comput. Electr. Eng."},{"key":"776_CR16","doi-asserted-by":"crossref","unstructured":"Takagi, N., Takagi, K.: A VLSI algorithm for integer square-rooting. In: IEEE International Symposium on Intelligent Signal Processing and Communication, Japan, pp. 626\u2013629 (2006)","DOI":"10.1109\/ISPACS.2006.364734"},{"issue":"1","key":"776_CR17","doi-asserted-by":"publisher","first-page":"12","DOI":"10.1109\/TC.2005.1","volume":"58","author":"ME Kaihara","year":"2005","unstructured":"Kaihara, M.E., Takagi, N.: A hardware algorithm for modular multiplication\/division. IEEE Trans. Comput. 58(1), 12\u201321 (2005)","journal-title":"IEEE Trans. Comput."},{"key":"776_CR18","unstructured":"Takagi, N., Kadowaki, S., Takagi, K.: A VLSI hardware algorithm for integer division. In: 17th IEEE Symposium on Computer Arithmetics, Japan, pp. 1\u20137 (2005)"},{"issue":"4","key":"776_CR19","doi-asserted-by":"publisher","first-page":"205","DOI":"10.1049\/ip-cdt:19990524","volume":"146","author":"CL Way","year":"1999","unstructured":"Way, C.L., Wang, C.P.: Design of a fast radix-4 SRT divider and its VLSI implementation. IEEE Proc. Comput. Digit. Tech. 146(4), 205\u2013210 (1999)","journal-title":"IEEE Proc. Comput. Digit. Tech."},{"key":"776_CR20","volume-title":"Digital Image Processing","author":"S Jayaraman","year":"2009","unstructured":"Jayaraman, S., Esakkirajan, S., Veerakumar, T.: Digital Image Processing. Tata McGraw Hill, New York (2009)"},{"key":"776_CR21","volume-title":"Fundamentals of Digital Inage Processing","author":"AK Jain","year":"1989","unstructured":"Jain, A.K.: Fundamentals of Digital Inage Processing. Prentice-Hall, Upper Saddle River (1989)"},{"key":"776_CR22","volume-title":"Digital Signal Processing","author":"A Singh","year":"2004","unstructured":"Singh, A., Srinivasan, S.: Digital Signal Processing. Thomson Learning, Boston (2004)"},{"key":"776_CR23","unstructured":"https:\/\/en.wikipedia.org\/wiki\/Quadratic_equation"},{"key":"776_CR24","unstructured":"https:\/\/en.wikipedia.org\/wiki\/Matrix_multiplication_algorithm"},{"key":"776_CR25","volume-title":"HDL Programming Fundamentals: VHDL and Verilog","author":"NM Botros","year":"2006","unstructured":"Botros, N.M.: HDL Programming Fundamentals: VHDL and Verilog. Dreamtech Press, New Delhi (2006)"},{"key":"776_CR26","volume-title":"Digital System Design Using VHDL","author":"CH Roth Jr","year":"1998","unstructured":"Roth Jr., C.H.: Digital System Design Using VHDL. PWS Publication, Boston (1998)"},{"key":"776_CR27","unstructured":"https:\/\/www.xilinx.com\/support\/documentation\/ip_documentation\/ila\/v5_0\/pg172-ila.pdf"},{"key":"776_CR28","unstructured":"https:\/\/www.xilinx.com\/support\/documentation\/ip_documentation\/vio\/v3_0\/pg159-vio.pdf"},{"key":"776_CR29","unstructured":"https:\/\/www.xilinx.com\/support\/documentation\/ip_documentation\/chipscope_icon.pdf"},{"key":"776_CR30","unstructured":"https:\/\/www.xilinx.com\/support\/documentation\/sw_manuals\/xilinx14_6\/ug750.pdf"},{"key":"776_CR31","doi-asserted-by":"crossref","unstructured":"Ronak, B., Fahmy, S.A.: Improved resource sharing for FPGA DSP blocks, In: 26th IEEE International Conference on Field Programmable Logic and Applications, Switzerland, pp. 1\u20134 (2016)","DOI":"10.1109\/FPL.2016.7577373"},{"key":"776_CR32","doi-asserted-by":"crossref","unstructured":"Hadjis, S., Canis, A., Anderson, J., Choi, J., Nam, K., Brown, S., Czajkowski, T.: Impact of FPGA architecture on resource sharing in high-level synthesis. In: IEEE International Symposium on Field Programmable Gate Arrays, USA, pp. 1\u20134 (2012)","DOI":"10.1145\/2145694.2145712"},{"key":"776_CR33","unstructured":"https:\/\/en.wikipedia.org\/wiki\/Root-finding_algorithm"},{"key":"776_CR34","unstructured":"https:\/\/en.wikipedia.org\/wiki\/Division_(mathematics)"},{"key":"776_CR35","doi-asserted-by":"crossref","unstructured":"Suresh, S., Beldianu, S.F., Ziavras, S.G.: FPGA and ASIC square root designs for high performance and power efficiency. In: 24th IEEE International Conference on Application-Specific Systems, Architectures and Processors, London, pp. 1\u20134 (2013)","DOI":"10.1109\/ASAP.2013.6567588"},{"key":"776_CR36","doi-asserted-by":"crossref","unstructured":"Deschamps, J.-P., Sutter, G.: Decimal division: algorithms and FPGA implementations, In: 6th IEEE Southern Programmable Logic Conference, Brazil, pp. 67\u201372 (2010)","DOI":"10.1109\/SPL.2010.5483000"},{"key":"776_CR37","doi-asserted-by":"crossref","unstructured":"Jaiswal, M.K., So, H.K.H.: Taylor series based architecture for quadruple precision floating point division, In: IEEE Computer Society Annual Symposium on VLSI, USA, pp. 518\u2013523 (2016)","DOI":"10.1109\/ISVLSI.2016.10"},{"issue":"4","key":"776_CR38","doi-asserted-by":"publisher","first-page":"520","DOI":"10.1016\/j.jpdc.2004.03.003","volume":"64","author":"M Fleury","year":"2004","unstructured":"Fleury, M., Self, R.P., Downton, A.C.: Development of a fine-grained parallel Karhunen\u2013Loeve transform. Int. J. Parallel Distrib. Comput. 64(4), 520\u2013535 (2004)","journal-title":"Int. J. Parallel Distrib. Comput."}],"container-title":["Journal of Real-Time Image Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11554-018-0776-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11554-018-0776-x\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11554-018-0776-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,22]],"date-time":"2022-08-22T02:42:49Z","timestamp":1661136169000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11554-018-0776-x"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,5,5]]},"references-count":38,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2020,4]]}},"alternative-id":["776"],"URL":"https:\/\/doi.org\/10.1007\/s11554-018-0776-x","relation":{},"ISSN":["1861-8200","1861-8219"],"issn-type":[{"value":"1861-8200","type":"print"},{"value":"1861-8219","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,5,5]]},"assertion":[{"value":"15 February 2017","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"11 April 2018","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"5 May 2018","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}