{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,1,14]],"date-time":"2023-01-14T21:52:13Z","timestamp":1673733133058},"reference-count":28,"publisher":"Springer Science and Business Media LLC","issue":"6","license":[{"start":{"date-parts":[[2015,10,20]],"date-time":"2015-10-20T00:00:00Z","timestamp":1445299200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Front. Comput. Sci."],"published-print":{"date-parts":[[2015,12]]},"DOI":"10.1007\/s11704-015-4257-0","type":"journal-article","created":{"date-parts":[[2015,10,19]],"date-time":"2015-10-19T23:41:36Z","timestamp":1445298096000},"page":"934-943","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":8,"title":["Equivalence checking between SLM and TLM using coverage directed simulation"],"prefix":"10.1007","volume":"9","author":[{"given":"Jian","family":"Hu","sequence":"first","affiliation":[]},{"given":"Tun","family":"Li","sequence":"additional","affiliation":[]},{"given":"Sikun","family":"Li","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2015,10,20]]},"reference":[{"key":"4257_CR1","first-page":"320","volume-title":"In: Proceedings of VLSI Design and the 12th International Conference on Embedded Systems.","author":"M S Chen","year":"2012","unstructured":"Chen M S, Mishra P. Assertion-based functional consistency checking between TLM and RTL models. In: Proceedings of VLSI Design and the 12th International Conference on Embedded Systems. 2012, 320\u2013325"},{"key":"4257_CR2","doi-asserted-by":"crossref","first-page":"214","DOI":"10.1109\/EWDTS.2008.5580149","volume-title":"In: Proceedings of IEEE East-West Design and Test symposium (EWDTS).","author":"N Bombieri","year":"2008","unstructured":"Bombieri N, Fummi F, Pravadelli G. RTL-TLM equivalence checking based on simulation. In: Proceedings of IEEE East-West Design and Test symposium (EWDTS). 2008, 214\u2013217"},{"key":"4257_CR3","volume-title":"Center for Embedded Computer Systems","author":"L K Cai","year":"2003","unstructured":"Cai L K, Gajski D. Transaction level modeling in system level design. Center for Embedded Computer Systems, 2003"},{"key":"4257_CR4","volume-title":"Open SystemC Initiative","author":"A Rose","year":"2005","unstructured":"Rose A, Swan S, Pierce J, Fernandez J M. Transaction level modeling in SystemC. Open SystemC Initiative, 2005"},{"issue":"12","key":"4257_CR5","doi-asserted-by":"crossref","first-page":"1730","DOI":"10.1109\/TC.2010.187","volume":"60","author":"N Bombieri","year":"2010","unstructured":"Bombieri N, Fummi F, Pravadelli G. Automatic abstraction of RTL IPs into equivalent TLM descriptions. IEEE Transactions on Computers, 2010, 60(12): 1730\u20131743","journal-title":"IEEE Transactions on Computers"},{"key":"4257_CR6","first-page":"1500","volume-title":"In: Proceedings of the Conference on Design, Automation and Test in Europe.","author":"K Hao","year":"2010","unstructured":"Hao K, Xie F, Ray S, Yang J. Optimizing equivalence checking for behavioral synthesis. In: Proceedings of the Conference on Design, Automation and Test in Europe. 2010, 1500\u20131505"},{"key":"4257_CR7","first-page":"179","volume-title":"In: Proceedings of the 9th IEEE International High-Level Design Validation and Test Workshop.","author":"M Fujita","year":"2004","unstructured":"Fujita M. On equivalence checking between behavioral and RTL descriptions. In: Proceedings of the 9th IEEE International High-Level Design Validation and Test Workshop. 2004, 179\u2013184"},{"issue":"4","key":"4257_CR8","doi-asserted-by":"crossref","first-page":"610","DOI":"10.1145\/1109118.1109121","volume":"10","author":"M Fujita","year":"2005","unstructured":"Fujita M. Equivalence checking between behavioral and RTL descriptions with virtual controllers and datapaths. ACM Transactions on Design Automation of Electronic Systems, 2005, 10(4): 610\u2013626","journal-title":"ACM Transactions on Design Automation of Electronic Systems"},{"key":"4257_CR9","first-page":"162","volume-title":"In: Proceedings of the 11th Annual IEEE International High-Level Design Validation and Test Workshop.","author":"T Nishihara","year":"2006","unstructured":"Nishihara T, Matsumoto T, Fujitat M. Equivalence checking with rulebased equivalence propagation and high-level synthesis. In: Proceedings of the 11th Annual IEEE International High-Level Design Validation and Test Workshop. 2006, 162\u2013169"},{"issue":"4","key":"4257_CR10","doi-asserted-by":"crossref","first-page":"377","DOI":"10.1007\/s10617-008-9033-z","volume":"12","author":"S Vasudevan","year":"2006","unstructured":"Vasudevan S, Viswanath V, Abraham J A, Tu J. Sequential equivalence checking between system level and RTL descriptions. Design Automation for Embedded Systems, 2006, 12(4): 377\u2013396","journal-title":"Design Automation for Embedded Systems"},{"key":"4257_CR11","first-page":"71","volume-title":"In: Proceedings of the 4th ACM and IEEE International Conference on Formal Methods and Models for Co-Design.","author":"S Vasudevan","year":"2006","unstructured":"Vasudevan S, Viswanath V, Abraham J A, Tu J. Automatic decomposition for sequential equivalence checking of system level and RTL descriptions. In: Proceedings of the 4th ACM and IEEE International Conference on Formal Methods and Models for Co-Design. 2006, 71\u201380"},{"key":"4257_CR12","first-page":"637","volume-title":"In: Proceedings of the 9th International Symposium on Quality Electronic Design.","author":"D Zhu","year":"2008","unstructured":"Zhu D, Li T, Guo Y, Li S K. 2D Decomposition sequential equivalence checking of system level and RTL descriptions. In: Proceedings of the 9th International Symposium on Quality Electronic Design. 2008, 637\u2013642"},{"key":"4257_CR13","doi-asserted-by":"crossref","first-page":"516","DOI":"10.1109\/ISQED.2013.6523660","volume-title":"In: Proceedings of the 14th International Symposium on Quality Electronic Design.","author":"T Li","year":"2013","unstructured":"Li T, Guo Y, Liu WW, Ma C Y. Efficient translation validation of highlevel synthesis. In: Proceedings of the 14th International Symposium on Quality Electronic Design. 2013, 516\u2013523"},{"key":"4257_CR14","doi-asserted-by":"crossref","first-page":"101","DOI":"10.1145\/2483028.2483070","volume-title":"In: Proceedings of the 23rd ACM International Conference on Great Lakes Symposium on VLSI.","author":"T Li","year":"2013","unstructured":"Li T, Guo Y, Liu W W, Tang M S. Translation validation of scheduling in high-level synthesis. In: Proceedings of the 23rd ACM International Conference on Great Lakes Symposium on VLSI. 2013, 101\u2013106"},{"issue":"2","key":"4257_CR15","doi-asserted-by":"crossref","first-page":"140","DOI":"10.1109\/MDT.2007.48","volume":"24","author":"N Bombieri","year":"2007","unstructured":"Bombieri N, Fedeli A, Fummi F, Pravadelli G. Hybrid incremental ABV for functional validation in TLM design flows. IEEE Design and Test of Computer, 2007, 24(2): 140\u2013152","journal-title":"IEEE Design and Test of Computer"},{"key":"4257_CR16","first-page":"882","volume-title":"In: Proceedings of the Conference on Design, Automation and Test in Europe.","author":"N Bombieri","year":"2007","unstructured":"Bombieri N, Fummi F, Pravadelli G. Incremental ABV for functional validation of TL-to-RTL design refinement. In: Proceedings of the Conference on Design, Automation and Test in Europe. 2007, 882\u2013887"},{"key":"4257_CR17","doi-asserted-by":"crossref","first-page":"223","DOI":"10.1145\/1973009.1973054","volume-title":"In: Proceedings of the 21st Edition of the Great Lakes Symposium on Great Lakes Symposium on VLSI.","author":"D Gro\u00dfe","year":"2011","unstructured":"Gro\u00dfe D, Gro\u00df M, K\u00fchne U, Drechsler R. Simulation-based equivalence checking between SystemC models at different levels of abstraction. In: Proceedings of the 21st Edition of the Great Lakes Symposium on Great Lakes Symposium on VLSI. 2011, 223\u2013228"},{"key":"4257_CR18","volume-title":"Software testing techniques","author":"B Beizer","year":"2003","unstructured":"Beizer B. Software testing techniques. New Delhi: Dreamtech Press, 2003"},{"key":"4257_CR19","first-page":"97","volume-title":"Proceedings of EuroSTAR","author":"R Stewart","year":"1997","unstructured":"Stewart R. Unit test coverage as leading indicator of rework. Proceedings of EuroSTAR, 1997, 97"},{"key":"4257_CR20","doi-asserted-by":"crossref","first-page":"124","DOI":"10.1109\/ISSRE.1995.497650","volume-title":"In: Proceedings of the 6th International Symposium on Software Reliability Engineering.","author":"F D Frate","year":"1995","unstructured":"Frate F D, Garg P, Mathur A P, Pasquini A. On the correlation between code coverage and software reliability. In: Proceedings of the 6th International Symposium on Software Reliability Engineering. 1995, 124\u2013132"},{"key":"4257_CR21","first-page":"186","volume-title":"In: Proceedings of the 5th IEEE International Symposium on Software Reliability Engineering.","author":"Y K Malaiya","year":"1994","unstructured":"Malaiya Y K, Li N, Bieman J, Karcich R, Skbbe B. The relationship between test coverage and reliability. In: Proceedings of the 5th IEEE International Symposium on Software Reliability Engineering. 1994, 186\u2013195"},{"key":"4257_CR22","first-page":"148","volume-title":"In: Proceedings of the 10th IEEE International Symposium on Software Reliability Engineering","author":"L Briand","year":"1999","unstructured":"Briand L, Pfahl D. Using simulation for assessing the real impact of test coverage on defect coverage. In: Proceedings of the 10th IEEE International Symposium on Software Reliability Engineering, 1999, 148\u2013157"},{"issue":"4","key":"4257_CR23","first-page":"1","volume":"30","author":"X Cai","year":"2005","unstructured":"Cai X, Lyu M R. The effect of code coverage on fault detection under different testing profiles. ACM SIGSOFT Software Engineering Notes, 2005, 30(4): 1\u20137","journal-title":"ACM SIGSOFT Software Engineering Notes"},{"key":"4257_CR24","first-page":"138","volume-title":"In: Proceedings of IEEE International Highlevel Design Validation and Test Workshop.","author":"J Sanguinetti","year":"2010","unstructured":"Sanguinetti J, Zhang E. The relationship of code coverage metrics on high-level and RTL code. In: Proceedings of IEEE International Highlevel Design Validation and Test Workshop. 2010, 138\u2013141"},{"issue":"2","key":"4257_CR25","first-page":"38","volume":"11","author":"M S Chen","year":"2012","unstructured":"Chen M S, Mishra P, Kalita D. Automatic RTL test generation from SystemC TLM specifications. ACM Transactions on Embedded Computing Systems, 2012, 11(2): 38","journal-title":"ACM Transactions on Embedded Computing Systems"},{"issue":"4","key":"4257_CR26","doi-asserted-by":"crossref","first-page":"451","DOI":"10.1145\/115372.115320","volume":"13","author":"R Cytron","year":"1991","unstructured":"Cytron R, Ferrante J, Rosen B K, Wegman M N, Zadeck F K. Efficiently computing static single assignment form and the control dependence graph. ACM Transactions on Programming Languages and Systems, 1991, 13(4): 451\u2013490","journal-title":"ACM Transactions on Programming Languages and Systems"},{"key":"4257_CR27","first-page":"164","volume-title":"The satisfiability modulo theories library (SMTLIB)","author":"S Ranise","year":"2006","unstructured":"Ranise S, Tinelli C. The satisfiability modulo theories library (SMTLIB). www. SMT-LIB.org, 2006, 164"},{"key":"4257_CR28","doi-asserted-by":"crossref","first-page":"337","DOI":"10.1007\/978-3-540-78800-3_24","volume":"4963","author":"L De Moura","year":"2008","unstructured":"De Moura L, Bj\u00f8rner N. Z3: An efficient SMT solver. Lecture Notes in Computer Science, 2008, 4963: 337\u2013340","journal-title":"Lecture Notes in Computer Science"}],"container-title":["Frontiers of Computer Science"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11704-015-4257-0.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11704-015-4257-0\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11704-015-4257-0","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,31]],"date-time":"2019-08-31T18:20:46Z","timestamp":1567275646000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11704-015-4257-0"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10,20]]},"references-count":28,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2015,12]]}},"alternative-id":["4257"],"URL":"https:\/\/doi.org\/10.1007\/s11704-015-4257-0","relation":{},"ISSN":["2095-2228","2095-2236"],"issn-type":[{"value":"2095-2228","type":"print"},{"value":"2095-2236","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,10,20]]}}}