{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T14:41:46Z","timestamp":1740148906829,"version":"3.37.3"},"reference-count":42,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2022,5,27]],"date-time":"2022-05-27T00:00:00Z","timestamp":1653609600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2022,5,27]],"date-time":"2022-05-27T00:00:00Z","timestamp":1653609600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Evol. Intel."],"published-print":{"date-parts":[[2023,8]]},"DOI":"10.1007\/s12065-022-00730-1","type":"journal-article","created":{"date-parts":[[2022,5,27]],"date-time":"2022-05-27T04:02:31Z","timestamp":1653624151000},"page":"1195-1216","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Applying machine learning to enhance the cache performance using reuse distance"],"prefix":"10.1007","volume":"16","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-9316-6840","authenticated-orcid":false,"given":"Jobin","family":"Jose","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Ramasubramanian","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2022,5,27]]},"reference":[{"key":"730_CR1","doi-asserted-by":"crossref","unstructured":"Jim\u00e9nez DA, Lin C (2001) Dynamic branch prediction with perceptrons. In: Proceedings of HPCA seventh international symposium on high-performance computer architecture, pp 197\u2013206","DOI":"10.1109\/HPCA.2001.903263"},{"key":"730_CR2","doi-asserted-by":"publisher","unstructured":"Jimenez DA, Teran E (2017) Multi perspective reuse prediction. In: Proceedings of the 50th Annual IEEE\/ACM international symposium on microarchitecture (MICRO-50), pp 436 \u2013448. https:\/\/doi.org\/10.1145\/3123939.3123942","DOI":"10.1145\/3123939.3123942"},{"key":"730_CR3","doi-asserted-by":"publisher","unstructured":"Teran E, Wang Z, Jimenez DA (2016) Perceptron learning for reuse prediction. In: 49thAnnual IEEE\/ACM international symposium on microarchitecture (MICRO). https:\/\/doi.org\/10.1109\/micro.2016.7783705","DOI":"10.1109\/micro.2016.7783705"},{"issue":"4","key":"730_CR4","doi-asserted-by":"publisher","first-page":"46","DOI":"10.4018\/jaras.2010100104","volume":"1","author":"JK Rai","year":"2010","unstructured":"Rai JK, Negi A, Wankar R, Nayak KD (2010) A ML based meta-scheduler for multi-core processors. Int J Adapt Resil Auton Syst 1(4):46\u201359. https:\/\/doi.org\/10.4018\/jaras.2010100104","journal-title":"Int J Adapt Resil Auton Syst"},{"key":"730_CR5","doi-asserted-by":"crossref","unstructured":"Pekhimenko G, Huberty T, Cai R, Mutlu O, Gibbons PB, Kozuch MA, Mowry TC (2015) Exploiting compressed block size as an indicator of future reuse. In: 2015 IEEE 21st international symposium on high performance computer architecture (HPCA), pp 51\u201363","DOI":"10.1109\/HPCA.2015.7056021"},{"key":"730_CR6","doi-asserted-by":"crossref","unstructured":"Wu C-J, Jaleel A , Hasenplaugh W, Martonosi M, Simon J, Steely C, Emer J (2011) SHiP Signature-based hit predictor for high performance caching. In: Proceedings of the 44th annual IEEE\/ ACM international symposium on microarchitecture (MICRO- 44) New York, NY, USA, pp 430\u2013441","DOI":"10.1145\/2155620.2155671"},{"key":"730_CR7","unstructured":"Peled L, Weiser U, Etsion Y (2018) A neural network memory prefetcher using semantic locality"},{"key":"730_CR8","doi-asserted-by":"crossref","unstructured":"Keramidas G, Petoumenos P, Kaxiras S (2007) Cache replacement based on reuse- distance prediction. In: 25th international conference on computer design, pp 245\u2013250","DOI":"10.1109\/ICCD.2007.4601909"},{"key":"730_CR9","unstructured":"Ajorpaz SM, Garza E, Jindal S, Jim\u00e9nez DA (2018) Exploring predictive replacement policies for instruction cache and branch target buffer. In: ACM\/ IEEE 45th annual international symposium on computer architecture (ISCA), pp 519\u2013532"},{"key":"730_CR10","doi-asserted-by":"crossref","unstructured":"Lai AC, Falsafi B (2000) Selective, accurate, and timely self-invalidation using last-touch prediction. In: International symposium on computer architecture, pp 139\u2013148","DOI":"10.1145\/342001.339669"},{"issue":"2","key":"730_CR11","doi-asserted-by":"publisher","first-page":"144","DOI":"10.1145\/384285.379259","volume":"29","author":"AC Lai","year":"2001","unstructured":"Lai AC, Falsafi Fide CB (2001) Dead-block prediction and dead-block correlating prefetchers. SIGARCH Comput Archit News 29(2):144\u2013154","journal-title":"SIGARCH Comput Archit News"},{"key":"730_CR12","doi-asserted-by":"crossref","unstructured":"Somogyi S, Wenisch TF, Hardavellas, N, Kim J, Ailamaki A , Falsafi B (2004) Memory coherence activity prediction in commercial workloads. In: Proceedings of the 3rd workshop on memory performance issues(WMPI \u201904), New York, NY, USA, pp 37\u201345","DOI":"10.1145\/1054943.1054949"},{"issue":"2","key":"730_CR13","doi-asserted-by":"publisher","first-page":"209","DOI":"10.1145\/545214.545239","volume":"30","author":"Z Hu","year":"2002","unstructured":"Hu Z, Kaxira S, Martonosi M (2002) Timekeeping in the memory system: predicting and optimizing memory behavior. SIGARCH Computer Archit News 30(2):209\u2013220","journal-title":"SIGARCH Computer Archit News"},{"issue":"1","key":"730_CR14","doi-asserted-by":"publisher","first-page":"55","DOI":"10.1145\/1061267.1061271","volume":"2","author":"A Abella","year":"2005","unstructured":"Abella A, Gonzalez X, Vera M, O\u2019Boy FP (2005) Iatac: a smart predictor to turn-off l2 cache lines. ACM Trans Archit Code Optim 2(1):55\u201377","journal-title":"ACM Trans Archit Code Optim"},{"key":"730_CR15","doi-asserted-by":"crossref","unstructured":"Liu H, Ferdman M, Huh ,Burger D (2008) Cache bursts: a new approach for eliminating dead blocks and increasing cache efficiency. In: Proceedings of the IEEE\/ ACM international symposium on microarchitecture, Los Alamitos, CA, USA, pp 222\u2013233","DOI":"10.1109\/MICRO.2008.4771793"},{"key":"730_CR16","doi-asserted-by":"crossref","unstructured":"Khan SM, Tian Y, Jimenez DA ( 2010) Sampling dead block prediction for last-level caches. In: 43rd Annual IEEE\/ACM international symposium on microarchitecture, pp 175\u2013186","DOI":"10.1109\/MICRO.2010.24"},{"issue":"15","key":"730_CR17","first-page":"2843","volume":"119","author":"C Sweety Prachi","year":"2018","unstructured":"Sweety Prachi C (2018) Branch prediction techniques used in pipeline processors: a review. Int J Pure Appl Math 119(15):2843\u20132851","journal-title":"Int J Pure Appl Math"},{"key":"730_CR18","volume-title":"Principles of neurodynamic: perceptrons and the theory of brain mechanisms","author":"F Rosenblatt","year":"1962","unstructured":"Rosenblatt F (1962) Principles of neurodynamic: perceptrons and the theory of brain mechanisms. Spartan, London"},{"key":"730_CR19","doi-asserted-by":"crossref","unstructured":"Shi Z, Huang X, Jain A, Lin C (2019) Applying deep learning to the cache replacement problem. In: Proceedings of the 52nd annual IEEE\/ACM international symposium on microarchitecture, pp 413\u2013425","DOI":"10.1145\/3352460.3358319"},{"key":"730_CR20","first-page":"1178","volume":"2","author":"E Gawehn","year":"2016","unstructured":"Gawehn E, Hiss JA, Schneider G (2016) Deep learning in drug discovery. Mol Inf 2:1178","journal-title":"Mol Inf"},{"issue":"16","key":"730_CR21","doi-asserted-by":"publisher","first-page":"11258","DOI":"10.1002\/jcc.24764","volume":"38","author":"GB Goh","year":"2017","unstructured":"Goh GB, Hodas NO, Vishnu A (2017) Deep learning for computational chemistry. J Comput Chem 38(16):11258","journal-title":"J Comput Chem"},{"key":"730_CR22","unstructured":"Vietri G, Rodriguez LV, Martinez WA, Lyons S, Liu J, Rangaswami R, Narasimhan G (2018) Driving cache replacement with ml-based lecar. In: 10th USENIX workshop on hot topics in storage and filesystems"},{"key":"730_CR23","unstructured":"Hashemi M, Swersky K, Smith JA, Ayers G, Litz H, Chang J, Kozyrakis CE, Ranganathan P (2018) Learning memory AAccess patterns. In: Proceedings of the 35th international conference on ML, PMLR 80, pp 1919\u20131928"},{"key":"730_CR24","unstructured":"Wang H, Hao H, Alizadeh MI, Mao H (2019) Learning caching policies with subsampling. In: Procedings of the 33rd conference on neural information processing systems (NeurIPS 2019), Vancouver, Canada"},{"key":"730_CR25","unstructured":"Drault LB (2017) Evaluation of cache inclusion policies in cache management"},{"key":"730_CR26","doi-asserted-by":"crossref","unstructured":"Herodotou H (2019) AutoCache: employing ML to automate caching in distributed file systems. In: 2019 IEEE 35th international conference on data engineering workshops (ICDEW), pp 133\u2013139","DOI":"10.1109\/ICDEW.2019.00-21"},{"key":"730_CR27","unstructured":"The ChampSim simulator (2017) https:\/\/github.com\/ChampSim\/ChampSim"},{"key":"730_CR28","doi-asserted-by":"crossref","unstructured":"Nethercote N, Seward J (2007) Valgrind: a framework for heavyweight dynamic binary instrumentation. In: Proceedings of the 28th ACM SIGPLAN conference on programming language design and implementation (PLDI \u201907), San Diego, California, USA, pp 89\u2013100","DOI":"10.1145\/1250734.1250746"},{"key":"730_CR29","unstructured":"Aarshay J (2016) Complete guide to parameter tuning in XGBoost with codes in Python"},{"key":"730_CR30","unstructured":"Vishal M, Venkat AS (2019) XGBoost algorithm: Long May She Reign"},{"key":"730_CR31","first-page":"2825","volume":"12","author":"F Pedregosa","year":"2011","unstructured":"Pedregosa F, Varoquaux G, Gramfort A, Michel V, Thirion B, Grisel O, Blondel M, Prettenhofer P, Weiss R, Dubourg V, Vanderplas J, Passor A, Cournapeau D, Brucher M, Perrot M, Duchesnay E (2011) Scikit-learn: ML in Python. J ML Res 12:2825\u20132830","journal-title":"J ML Res"},{"key":"730_CR32","unstructured":"Nagesh SC (2019) Introduction to artificial neural networks (ANN)"},{"key":"730_CR33","unstructured":"Jeff H (2018) TPOT automated ML in python"},{"key":"730_CR34","unstructured":"Song S, Wu Q (2017) Experiments with SPEC CPU 2017: similarity, balance, phase behavior and SimPoints, Department of Electrical and Computer Engineering,The University of Texas at Austin, TR-180515-01"},{"key":"730_CR35","doi-asserted-by":"publisher","unstructured":"Limaye A, Adegbija T (2018) A workload characterization of the SPEC CPU2017 benchmark suite. In: Proceedings of IEEE international symposium on performance analysis of systems and software (ISPASS). Belfast, pp 149\u2013158. https:\/\/doi.org\/10.1109\/ISPASS.2018.00028","DOI":"10.1109\/ISPASS.2018.00028"},{"key":"730_CR36","doi-asserted-by":"publisher","unstructured":"Son DO, Kim GB, Kim JM, Kim CH (2018) Cache reuse aware replacement policy for improving GPU cache performance. In: Kim K, Kim H, Baek N (eds) IT convergence and security 2017. Lecture Notes in Electrical Engineering, vol 450, Springer. https:\/\/doi.org\/10.1007\/978-981-10-6454-818","DOI":"10.1007\/978-981-10-6454-818"},{"key":"730_CR37","doi-asserted-by":"crossref","unstructured":"Freund Y, Schapire R (1995) A decision-theoretic generalization of on-line learning and an application to boosting","DOI":"10.1007\/3-540-59119-2_166"},{"key":"730_CR38","unstructured":"Glorot Xavier, Bengio Y (2010) Understanding the difficulty of training deep feedforward neural networks. In: International conference on artificial intelligence and statistics"},{"key":"730_CR39","unstructured":"Zhang H (2004) The optimality of Naive Bayes. In: Proceedings of FLAIRS"},{"issue":"3","key":"730_CR40","first-page":"199","volume":"14","author":"AJ Smola","year":"2004","unstructured":"Smola AJ, Sch\u00f6lkopf B (2004) A tutorial on support vector regression statistics. Comput Arch 14(3):199\u2013222","journal-title":"Comput Arch"},{"issue":"4","key":"730_CR41","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1186736.1186737","volume":"4","author":"JL Henning","year":"2006","unstructured":"Henning JL (2006) SPEC CPU2006 benchmark descriptions. SIGARCH Comput Archit News 4(4):1\u201317","journal-title":"SIGARCH Comput Archit News"},{"key":"730_CR42","doi-asserted-by":"crossref","unstructured":"Olanrewaju RF, Baba A, Khan BUI, Yaacob M, Azman AW, Mir MS (2016) A study on performance evaluation of conventional cache replacement algorithms: a review. In: 2016 fourth IEEE international conference on parallel, distributed and grid computing (PDGC), pp 550\u2013556","DOI":"10.1109\/PDGC.2016.7913185"}],"container-title":["Evolutionary Intelligence"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s12065-022-00730-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s12065-022-00730-1\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s12065-022-00730-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,7,11]],"date-time":"2023-07-11T06:12:41Z","timestamp":1689055961000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s12065-022-00730-1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5,27]]},"references-count":42,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2023,8]]}},"alternative-id":["730"],"URL":"https:\/\/doi.org\/10.1007\/s12065-022-00730-1","relation":{},"ISSN":["1864-5909","1864-5917"],"issn-type":[{"type":"print","value":"1864-5909"},{"type":"electronic","value":"1864-5917"}],"subject":[],"published":{"date-parts":[[2022,5,27]]},"assertion":[{"value":"30 December 2020","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"16 January 2022","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"21 April 2022","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"27 May 2022","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}