{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,8]],"date-time":"2026-07-08T16:20:59Z","timestamp":1783527659806,"version":"3.55.0"},"reference-count":41,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[2023,4,29]],"date-time":"2023-04-29T00:00:00Z","timestamp":1682726400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2023,4,29]],"date-time":"2023-04-29T00:00:00Z","timestamp":1682726400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Int J Syst Assur Eng Manag"],"published-print":{"date-parts":[[2023,6]]},"DOI":"10.1007\/s13198-023-01889-1","type":"journal-article","created":{"date-parts":[[2023,4,29]],"date-time":"2023-04-29T13:02:20Z","timestamp":1682773340000},"page":"894-902","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":7,"title":["Design and performance analysis of low power and energy-efficient vedic multipliers"],"prefix":"10.1007","volume":"14","author":[{"given":"Sadulla","family":"Shaik","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Satish","family":"Kanapala","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9070-919X","authenticated-orcid":false,"given":"Vallabhuni","family":"Vijay","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chandra Shaker","family":"Pittala","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2023,4,29]]},"reference":[{"key":"1889_CR1","unstructured":"Anandaram H, et al. (2023) AL\/ML for network management and orchestration at the edge of future networks. The Patent Office Journal No. 01\/2023, India. Application No. No. 202241077460 A."},{"key":"1889_CR2","unstructured":"Balaji P, et al. (2023) Analysis and detection of depression severity scores based on Eeg signal using machine learning approach. The Patent Office Journal No. 02\/2023, India. Application No. No. 202341001221 A."},{"key":"1889_CR3","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2022.104520","volume":"90","author":"GU Bhargava","year":"2022","unstructured":"Bhargava GU et al (2022) FPGA implementation of hybrid recursive reversable box filter-based fast adaptive bilateral filter for image denoising. Microprocess Microsyst 90:104520","journal-title":"Microprocess Microsyst"},{"key":"1889_CR4","doi-asserted-by":"publisher","unstructured":"Chaitanya K, et al. (2022) Double-threshold energy detection: noisy environment applied cognitive radio. Int J Syst Assur Eng Manag 1\u20135. https:\/\/doi.org\/10.1007\/s13198-022-01764-5","DOI":"10.1007\/s13198-022-01764-5"},{"key":"1889_CR5","doi-asserted-by":"crossref","unstructured":"China Venkateshwarlu S, et al. (2022) Optimized Design of Power Efficient FIR Filter Using Modified Booth Multiplier. In: 4th International Conference on Recent Trends in Computer Science and Technology (ICRTCST-2021), Jamshedpur, India, February 11\u201312, pp. 1\u20135.","DOI":"10.1109\/ICRTCST54752.2022.9781933"},{"issue":"5","key":"1889_CR6","first-page":"3230","volume":"3","author":"VSK Chunduri","year":"2013","unstructured":"Chunduri VSK, Sree Lakshmi G, Prasad MJC (2013) Design and implementation of multiplier using KCM and vedic mathematics by using reversible adder. Int J Mod Eng Res (IJMER) 3(5):3230\u20133141","journal-title":"Int J Mod Eng Res (IJMER)"},{"issue":"1","key":"1889_CR7","first-page":"1","volume":"3","author":"Ch Harish Kumar","year":"2013","unstructured":"Harish Kumar Ch (2013) Implementation and analysis of power, area, and delay of array, Urdhva, Nikhilam Vedic multipliers. Int J Sci Res Publ 3(1):1\u20135","journal-title":"Int J Sci Res Publ"},{"key":"1889_CR8","doi-asserted-by":"crossref","unstructured":"Khadir M, et al. (2022) QCA Based Optimized Arithmetic Models. In: 4th International Conference on Recent Trends in Computer Science and Technology (ICRTCST-2021), Jamshedpur, India, February 11\u201312: 1\u20135.","DOI":"10.1109\/ICRTCST54752.2022.9781825"},{"key":"1889_CR9","unstructured":"Meenakshi S, et al. (2023) Block Chain for IOT Security And Privacy. The Patent Office Journal No. 01\/2023, India. Application No. No. 202241077458 A."},{"key":"1889_CR10","doi-asserted-by":"publisher","unstructured":"Mohammed ZH, et al. (2023) Blockchain-enabled bioacoustics signal authentication for cloud-based electronic medical records. Measurement: Sensors, 100706. https:\/\/doi.org\/10.1016\/j.measen.2023.100706","DOI":"10.1016\/j.measen.2023.100706"},{"key":"1889_CR11","doi-asserted-by":"crossref","unstructured":"Mukherjee B, et al. (2015) Design of a Low Power 4\u00d74 Multiplier based on Five Transistor (5T) Half Adder, Eight Transistor (8T) Full Adder and Two Transistor(2T) AND Gate. In: International Conference on Computer, Communication, Control and Information Technology (C3IT), pp.1\u20135","DOI":"10.1109\/C3IT.2015.7060143"},{"key":"1889_CR12","unstructured":"Nallusamy DRT, et al. (2022) The detection of Varied EEG pattern Signal For Chronic Migraine Patients Using Machine Learning Approach. The Patent Office Journal No. 47\/2022, India. Application No. 202241065256 A."},{"key":"1889_CR13","doi-asserted-by":"crossref","unstructured":"Naveen G, et al. (2022) Design of high-performance full adder using 20nm CNTFET technology. In: 4th International Conference on Recent Trends in Computer Science and Technology (ICRTCST-2021), Jamshedpur, India, February 11\u201312, pp. 1\u20135.","DOI":"10.1109\/ICRTCST54752.2022.9782042"},{"issue":"1","key":"1889_CR14","first-page":"1","volume":"3","author":"CS Pittala","year":"2021","unstructured":"Pittala CS et al (2021) Novel architecture for logic test using single cycle access structure. J VLSI Circuits Syst 3(1):1\u20136","journal-title":"J VLSI Circuits Syst"},{"key":"1889_CR15","doi-asserted-by":"publisher","DOI":"10.1007\/s12633-022-02016-8","author":"CS Pittala","year":"2022","unstructured":"Pittala CS et al (2022a) 1-Bit FinFET carry cells for low voltage high-speed digital signal processing applications. SILICON. https:\/\/doi.org\/10.1007\/s12633-022-02016-8","journal-title":"SILICON"},{"issue":"5","key":"1889_CR16","doi-asserted-by":"publisher","first-page":"2551","DOI":"10.1007\/s13198-022-01664-8","volume":"13","author":"CS Pittala","year":"2022","unstructured":"Pittala CS et al (2022b) Numerical analysis of various plasmonic MIM\/MDM slot waveguide structures. Int J Syst Assur Eng Manag 13(5):2551\u20132558","journal-title":"Int J Syst Assur Eng Manag"},{"issue":"12","key":"1889_CR17","first-page":"5877","volume":"2","author":"BS Pmananda","year":"2013","unstructured":"Pmananda BS et al (2013) Design and Implementation of 8-bit Vedic multiplier. Int J Adv Res Electr Electron Instrum Eng 2(12):5877\u20135882","journal-title":"Int J Adv Res Electr Electron Instrum Eng"},{"key":"1889_CR18","unstructured":"Potluri P, et al. (2022) Integrated Spectral And Prosody Conversion With Vocoder Of Voice Synthesizer For Human Like Voice Using Deep Learning Techniques. The Patent Office Journal No. 52\/2022, India. Application No. 202241073323 A."},{"key":"1889_CR19","doi-asserted-by":"crossref","unstructured":"Ramachandran D, et al. (2022) A low latency and High throughput multipath technique to overcome black hole attack in Mobile Adhoc Network (MTBD). Security and Communication Networks","DOI":"10.1155\/2022\/8067447"},{"issue":"5","key":"1889_CR20","doi-asserted-by":"publisher","first-page":"1503","DOI":"10.18280\/ts.380526","volume":"38","author":"BMS Rani","year":"2021","unstructured":"Rani BMS et al (2021) Road identification through efficient edge segmentation based on morphological operations. Traitement Du Signal 38(5):1503\u20131508","journal-title":"Traitement Du Signal"},{"key":"1889_CR21","doi-asserted-by":"publisher","unstructured":"Rani BMS, et al. (2021) Disease prediction based retinal segmentation using bi-directional ConvLSTMU-Net. J Ambient Intell Humaniz Comput 1\u201310. https:\/\/doi.org\/10.1007\/s12652-021-03017-y","DOI":"10.1007\/s12652-021-03017-y"},{"key":"1889_CR22","doi-asserted-by":"publisher","unstructured":"Renjith PN, et al. (2023) Smart filtering for user discovery and availing balance storage space continuity with faster big data service. Measurement: Sensors 100707. https:\/\/doi.org\/10.1016\/j.measen.2023.100707","DOI":"10.1016\/j.measen.2023.100707"},{"issue":"2","key":"1889_CR23","first-page":"22","volume":"4","author":"M Saritha","year":"2022","unstructured":"Saritha M et al (2022a) Adaptive and recursive vedic karatsuba multiplier using non linear carry select adder. J VLSI Circuits Syst 4(2):22\u201329","journal-title":"J VLSI Circuits Syst"},{"issue":"5","key":"1889_CR24","doi-asserted-by":"publisher","first-page":"2743","DOI":"10.1007\/s13198-022-01747-6","volume":"13","author":"M Saritha","year":"2022","unstructured":"Saritha M et al (2022b) A VLSI design of clock gated technique based ADC lock-in amplifier. Int J Syst Assur Eng Manag 13(5):2743\u20132750. https:\/\/doi.org\/10.1007\/s13198-022-01747-6","journal-title":"Int J Syst Assur Eng Manag"},{"key":"1889_CR25","doi-asserted-by":"crossref","unstructured":"Saritha M, et al. (2021) Pipelined Distributive Arithmetic-based FIR Filter Using Carry Save and Ripple Carry Adder. Second IEEE International Conference on Communication, Computing and Industry 4.0 (C2I4\u20132021), Bengaluru, Karnataka, India, December 16\u201317: 1\u20136.","DOI":"10.1109\/C2I454156.2021.9689396"},{"key":"1889_CR26","doi-asserted-by":"publisher","unstructured":"Selvam L, Garg S, et al. (2023) Collaborative autonomous system based wireless security in signal processing using deep learning techniques. Optik, 272: 170313. https:\/\/doi.org\/10.1016\/j.ijleo.2022.170313","DOI":"10.1016\/j.ijleo.2022.170313"},{"issue":"5","key":"1889_CR27","doi-asserted-by":"publisher","first-page":"456","DOI":"10.1080\/02564602.2017.1327826","volume":"35","author":"S Shaik","year":"2018","unstructured":"Shaik S, Sri Rama Krishna K, Vaddi R (2018) Nano-Scale transistors with circuit interaction for designing energy-efficient and reliable adder cells at low V DD. IETE Tech Rev 35(5):456\u2013466","journal-title":"IETE Tech Rev"},{"key":"1889_CR28","doi-asserted-by":"crossref","unstructured":"Shaik S, Krishna KS, Vaddi R (2015) Tunnel transistors with circuit co-design in designing reliable logic gates for energy efficient computing. In: IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (Prime Asia), pp. 83\u201388","DOI":"10.1109\/PrimeAsia.2015.7450475"},{"key":"1889_CR29","doi-asserted-by":"crossref","unstructured":"Shaik S, et al. (2016) Circuit and Architectural Co-design for Reliable Adder Cells with Steep Slope Tunnel Transistors for Energy Efficient Computing. In: IEEE 29th International Conference on VLSI Design and 15th Embedded Systems (VLSID) 306\u2013311","DOI":"10.1109\/VLSID.2016.100"},{"key":"1889_CR30","doi-asserted-by":"publisher","unstructured":"Sharma S, Sharda V (2018) Design and analysis of 8-bit Vedic multiplier in 90nm technology using GDI technique. Int J Eng Technol 7(3): 759. https:\/\/doi.org\/10.14419\/ijet.v7i3.12.16496","DOI":"10.14419\/ijet.v7i3.12.16496"},{"key":"1889_CR31","unstructured":"Sirisha G, et al. (2023) AI\/ML support for ultra-low latency applications at the edge of the network. The Patent Office Journal No. 02\/2023, India. Application No. No. 202341001497 A."},{"key":"1889_CR32","doi-asserted-by":"crossref","unstructured":"Siva Nagaraju V, et al. (2021) Design and Implementation of Low power FinFET based Compressor. 2021 3rd International Conference on Signal Processing and Communication (ICPSC), Coimbatore, India, 13\u201314 May 2021, pp. 532\u2013536.","DOI":"10.1109\/ICSPC51351.2021.9451693"},{"key":"1889_CR33","doi-asserted-by":"crossref","unstructured":"Subramanyam K, Shaik S, Vaddi R. (2014) Tunnel FET based low voltage static vs dynamic logic families for energy efficiency. In: 18th International Symposium on VLSI Design and Test, pp. 1\u20132. IEEE","DOI":"10.1109\/ISVDAT.2014.6881042"},{"issue":"3","key":"1889_CR34","doi-asserted-by":"publisher","first-page":"1093","DOI":"10.1007\/s13198-021-01397-0","volume":"13","author":"S Swathi","year":"2022","unstructured":"Swathi S et al (2022) A hierarchical image matting model for blood vessel segmentation in retinal images. Int J Syst Assur Eng Manag 13(3):1093\u20131101","journal-title":"Int J Syst Assur Eng Manag"},{"key":"1889_CR35","doi-asserted-by":"crossref","unstructured":"Swathi S, et al. (2021) Implementation of An Energy-Efficient Binary Square Rooter Using Reversible Logic By Applying The Non-Restoring Algorithm. Second IEEE International Conference on Communication, Computing and Industry 4.0 (C2I4\u20132021), Bengaluru, Karnataka, India, December 16\u201317, pp. 1\u20136.","DOI":"10.1109\/C2I454156.2021.9689438"},{"key":"1889_CR36","doi-asserted-by":"crossref","unstructured":"Tripathy S, et al. (2015) Low power multiplier architectures using Vedic mathematics in 45nm technology for high speed computing. In: 2015 International Conference on Communication, Information & Computing Technology (ICCICT), pp. 1\u20136. IEEE","DOI":"10.1109\/ICCICT.2015.7045662"},{"key":"1889_CR37","unstructured":"Vallabhuni R, et al. (2023) Block Chain Based Centralized Cloud Application In: Smart Cities. The Patent Office Journal No. 05\/2023, India. Application No. No. 202341003902 A."},{"key":"1889_CR38","unstructured":"Vanithamani S, et al. (2022) Banana leaf disease detection using CNN \u2013 OPEN CV-DEEP learning approach. The Patent Office Journal No. 52\/2022, India. Application No. 202241073393 A."},{"issue":"6","key":"1889_CR39","doi-asserted-by":"publisher","first-page":"1173","DOI":"10.1007\/s13198-021-01372-9","volume":"12","author":"V Vijay","year":"2021","unstructured":"Vijay V et al (2021) ECG performance validation using operational transconductance amplifier with bias current. Int J Syst Assur Eng Manag 12(6):1173\u20131179","journal-title":"Int J Syst Assur Eng Manag"},{"issue":"1","key":"1889_CR40","first-page":"12","volume":"4","author":"V Vijay","year":"2022","unstructured":"Vijay V et al (2022) Implementation of fundamental modules using quantum dot cellular automata. J VLSI Circuits Syst 4(1):12\u201319","journal-title":"J VLSI Circuits Syst"},{"key":"1889_CR41","unstructured":"Yashwanth D, Sandeepkakde, Rushikesh Deshmukh (2013) Design and Implementation of 8-bit VMusing CMOS logic. International Conference on Machine Intelligence and Research Advancement 340\u2013344"}],"container-title":["International Journal of System Assurance Engineering and Management"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s13198-023-01889-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s13198-023-01889-1\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s13198-023-01889-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,18]],"date-time":"2023-05-18T08:43:29Z","timestamp":1684399409000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s13198-023-01889-1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4,29]]},"references-count":41,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2023,6]]}},"alternative-id":["1889"],"URL":"https:\/\/doi.org\/10.1007\/s13198-023-01889-1","relation":{},"ISSN":["0975-6809","0976-4348"],"issn-type":[{"value":"0975-6809","type":"print"},{"value":"0976-4348","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,4,29]]},"assertion":[{"value":"23 November 2021","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"3 May 2022","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"22 February 2023","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"29 April 2023","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"The authors have no conflicts of interest to declare relevant to this article's content.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Conflict of interest"}},{"value":"The research not involving any human participants and\/or animals.","order":3,"name":"Ethics","group":{"name":"EthicsHeading","label":"Human and animal rights"}}]}}