{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T13:49:59Z","timestamp":1762004999050},"reference-count":41,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2018,3,26]],"date-time":"2018-03-26T00:00:00Z","timestamp":1522022400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Hardw Syst Secur"],"published-print":{"date-parts":[[2018,6]]},"DOI":"10.1007\/s41635-018-0035-4","type":"journal-article","created":{"date-parts":[[2018,3,26]],"date-time":"2018-03-26T16:28:29Z","timestamp":1522081709000},"page":"162-178","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":7,"title":["The Conflicted Usage of RLUTs for Security-Critical Applications on FPGA"],"prefix":"10.1007","volume":"2","author":[{"given":"Debapriya Basu","family":"Roy","sequence":"first","affiliation":[]},{"given":"Shivam","family":"Bhasin","sequence":"additional","affiliation":[]},{"given":"Jean-Luc","family":"Danger","sequence":"additional","affiliation":[]},{"given":"Sylvain","family":"Guilley","sequence":"additional","affiliation":[]},{"given":"Wei","family":"He","sequence":"additional","affiliation":[]},{"given":"Debdeep","family":"Mukhopadhyay","sequence":"additional","affiliation":[]},{"given":"Zakaria","family":"Najm","sequence":"additional","affiliation":[]},{"given":"Xuan Thuy","family":"Ngo","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2018,3,26]]},"reference":[{"issue":"8","key":"35_CR1","doi-asserted-by":"publisher","first-page":"1248","DOI":"10.1109\/JPROC.2014.2331672","volume":"102","author":"S Trimberger","year":"2014","unstructured":"Trimberger S, Moore J (2014) FPGA security: Motivations, features, and applications. Proc IEEE 102 (8):1248\u20131265","journal-title":"Proc IEEE"},{"issue":"8","key":"35_CR2","doi-asserted-by":"publisher","first-page":"1248","DOI":"10.1109\/JPROC.2014.2331672","volume":"102","author":"SM Trimberger","year":"2014","unstructured":"Trimberger S M, Moore J J (2014) FPGA security: Motivations, features, and applications. Proc IEEE 102(8):1248\u20131265","journal-title":"Proc IEEE"},{"key":"35_CR3","doi-asserted-by":"crossref","unstructured":"G\u00fcneysu T, Moradi A (2011) Generic side-channel countermeasures for reconfigurable devices. In: Preneel B, Takagi T (eds) CHES, ser. LNCS, vol 6917. Springer, pp 33\u201348","DOI":"10.1007\/978-3-642-23951-9_3"},{"key":"35_CR4","doi-asserted-by":"crossref","unstructured":"Bhasin S, He W, Guilley S, Danger J-L (2013) Exploiting FPGA block memories for protected cryptographic implementations. In: ReCoSoC. IEEE, pp 1\u20138","DOI":"10.1109\/ReCoSoC.2013.6581529"},{"key":"35_CR5","doi-asserted-by":"crossref","unstructured":"G\u00fcneysu T, Paar C (2008) Ultra high performance ECC over NIST primes on commercial FPGAs.. In: CHES, pp 62\u201378","DOI":"10.1007\/978-3-540-85053-3_5"},{"key":"35_CR6","doi-asserted-by":"crossref","unstructured":"Roy DB, Mukhopadhyay D, Izumi M, Takahashi J (2014) Tile before multiplication: An efficient strategy to optimize DSP multiplier for accelerating prime field ECC for NIST curves.. In: The 51st annual design automation conference 2014, DAC \u201914. ACM, San Francisco, CA, pp 1\u20136. [Online]. http:\/\/doi.acm.org\/10.1145\/2593069.2593234","DOI":"10.1145\/2593069.2593234"},{"key":"35_CR7","unstructured":"G\u00fcneysu T Getting post-quantum crypto algorithms ready for deployment"},{"key":"35_CR8","doi-asserted-by":"crossref","unstructured":"He W, Otero A, de la Torre E, Riesgo T (2012) Automatic generation of identical routing pairs for FPGA implemented DPL logic.. In: ReConFig. IEEE, pp 1\u20136","DOI":"10.1109\/ReConFig.2012.6416733"},{"key":"35_CR9","doi-asserted-by":"publisher","unstructured":"Kumm M, M\u00f6ller K, Zipf P (2013) Reconfigurable FIR filter using distributed arithmetic on FPGAs. In: 2013 IEEE international symposium on circuits and systems (ISCAS2013). IEEE, Beijing, China, pp 2058\u20132061. https:\/\/doi.org\/10.1109\/ISCAS.2013.6572277","DOI":"10.1109\/ISCAS.2013.6572277"},{"key":"35_CR10","doi-asserted-by":"crossref","unstructured":"Sasdrich P, Moradi A, Mischke O, Gu\u0307neysu T (2015) Achieving side-channel protection with dynamic logic reconfiguration on modern FPGAs.. In: IEEE international symposium on hardware oriented security and trust, HOST 2015. Washington, DC, pp 130\u2013136","DOI":"10.1109\/HST.2015.7140251"},{"key":"35_CR11","doi-asserted-by":"crossref","unstructured":"Kutzner S, Poschmann A, Sto\u0307ttinger M (2013) TROJANUS: an ultra-lightweight side-channel leakage generator for fpgas.. In: 2013 international conference on field-programmable technology, FPT 2013. Kyoto, Japan, pp 160\u2013167","DOI":"10.1109\/FPT.2013.6718347"},{"key":"35_CR12","first-page":"450","volume-title":"PRESENT: an ultra-lightweight block cipher","author":"A Bogdanov","year":"2007","unstructured":"Bogdanov A, Knudsen L R, Leander G, Paar C, Poschmann A, Robshaw M J B, Seurin Y, Vikkelsoe C (2007) PRESENT: an ultra-lightweight block cipher. Springer, Berlin Heidelberg, Berlin, pp 450\u2013466"},{"key":"35_CR13","doi-asserted-by":"crossref","unstructured":"Madlener F, Sotttinger M, Huss S (2009) Novel hardening techniques against differential power analysis for multiplication in G F(2 n ). In: International conference on field-programmable technology, 2009. FPT 2009, pp 328\u2013334","DOI":"10.1109\/FPT.2009.5377676"},{"key":"35_CR14","unstructured":"Xilinx Xilinx Partial Reconfiguration User Guide (UG702). http:\/\/www.xilinx.com\/support\/documentation\/sw_manuals\/xilinx14_1\/ug702.pdf"},{"key":"35_CR15","first-page":"16","volume-title":"Correlation power analysis with a leakage model, vol 3156","author":"\u00c9 Brier","year":"2004","unstructured":"Brier \u00c9, Clavier C, Olivier F (2004) Correlation power analysis with a leakage model, vol 3156. Springer, Cambridge, pp 16\u201329"},{"key":"35_CR16","doi-asserted-by":"crossref","unstructured":"Ali S, Chakraborty R S, Mukhopadhyay D, Bhunia S (2011) Multi-level attacks: an emerging security concern for cryptographic hardware. In: Design, automation and test in Europe, DATE 2011. Grenoble, France, pp 1176\u20131179","DOI":"10.1109\/DATE.2011.5763307"},{"key":"35_CR17","doi-asserted-by":"crossref","unstructured":"Chakraborty R S, Narasimhan S, Bhunia S (2009) Hardware trojan: threats and emerging solutions. In: IEEE international high level design validation and test workshop, HLDVT 2009. San Francisco, CA, pp 166\u2013171","DOI":"10.1109\/HLDVT.2009.5340158"},{"key":"35_CR18","doi-asserted-by":"crossref","unstructured":"Tehranipoor M, Forte D (2014) Tutorial T4: All you need to know about hardware Trojans and Counterfeit ICs. In: 2014 27th international conference on VLSI design and 2014 13th international conference on embedded systems. Mumbai, India, pp 9\u201310","DOI":"10.1109\/VLSID.2014.119"},{"key":"35_CR19","unstructured":"Chen Z, Guo X, Nagesh R, Reddy A, Gora M, Maiti A Hardware trojan designs on basys FPGA board"},{"key":"35_CR20","doi-asserted-by":"crossref","unstructured":"Johnson AP, Saha S, Chakraborty RS, Mukhopadhyay D, G\u00f6ren S (2014) Fault attack on AES via hardware trojan insertion by dynamic partial reconfiguration of FPGA over ethernet. In: Proceedings of the 9th workshop on embedded systems security, ser. WESS \u201914. ACM, New York, NY, pp 1:1\u20131:8. http:\/\/doi.acm.org\/10.1145\/2668322.2668323","DOI":"10.1145\/2668322.2668323"},{"key":"35_CR21","doi-asserted-by":"crossref","unstructured":"Shende R, Ambawade D D (2016) A side channel based power analysis technique for hardware trojan detection using statistical learning approach. In: 2016 thirteenth international conference on wireless and optical communications networks (WOCN), pp 1\u20134","DOI":"10.1109\/WOCN.2016.7759894"},{"key":"35_CR22","doi-asserted-by":"crossref","unstructured":"Bhasin S, Danger J-L, Guilley S, Ngo XT, Sauvage L (2013) Hardware trojan horses in cryptographic IP cores. In: Fischer W, Schmidt J-M (eds) FDTC. IEEE, pp 15\u201329","DOI":"10.1109\/FDTC.2013.15"},{"key":"35_CR23","unstructured":"Note J-B, Rannaud E (2008) From the Bitstream to the Netlist. In: Proceedings of the 16th international ACM\/SIGDA symposium on field programmable gate arrays, ser. FPGA \u201908. ACM, New York, NY, pp 264\u2013264. http:\/\/doi.acm.org\/10.1145\/1344671.1344729"},{"key":"35_CR24","unstructured":"Benchmarks https:\/\/www.trust-hub.org\/resources\/benchmarks , accessed: 2015-01-30"},{"key":"35_CR25","doi-asserted-by":"crossref","unstructured":"Homma N, Hayashi Y, Miura N, Fujimoto D, Tanaka D, Nagata M, Aoki T (2014) EM attack is non-invasive? - Design methodology and validity verification of EM attack sensor. In: Proceedings of the 16th international workshop on cryptographic hardware and embedded systems - CHES 2014. Busan, South Korea, pp 1\u201316","DOI":"10.1007\/978-3-662-44709-3_1"},{"key":"35_CR26","doi-asserted-by":"crossref","unstructured":"Ng X T, Naj Z, Bhasin S, Roy D B, Danger J-L, Guilley S (2015) Integrated sensor: a backdoor for hardware trojan insertions?. In: 2015 Euromicro conference on digital system design (DSD). IEEE, pp 415\u2013422","DOI":"10.1109\/DSD.2015.119"},{"key":"35_CR27","unstructured":"Xilinx, Virtex-5 fpga system monitor. http:\/\/www-inst.eecs.berkeley.edu\/cs150\/fa13\/resources\/ug192.pdf"},{"key":"35_CR28","doi-asserted-by":"crossref","unstructured":"Piret G, Quisquater J-J (2003) A Differential fault attack technique against spn structures, with application to the AES and Khazad. In: CHES, ser. LNCS, vol. 2779. Springer, Cologne, Germany, pp 77\u201388","DOI":"10.1007\/978-3-540-45238-6_7"},{"key":"35_CR29","doi-asserted-by":"crossref","unstructured":"Tunstall M, Mukhopadhyay D, Ali S (2011) Differential fault analysis of the advanced encryption standard using a single fault. In: Ardagna CA, Zhou J (eds) WISTP, ser. Lecture notes in computer science, vol 6633. Springer, pp 224\u2013233","DOI":"10.1007\/978-3-642-21040-2_15"},{"issue":"2","key":"35_CR30","doi-asserted-by":"publisher","first-page":"73","DOI":"10.1007\/s13389-012-0046-y","volume":"3","author":"S Ali","year":"2013","unstructured":"Ali S, Mukhopadhyay D, Tunstall M (2013) Differential fault analysis of AES: towards reaching its limits. J Cryptogr Eng 3(2):73\u201397","journal-title":"J Cryptogr Eng"},{"issue":"2","key":"35_CR31","doi-asserted-by":"publisher","first-page":"37","DOI":"10.1109\/LES.2014.2314961","volume":"6","author":"A Aysu","year":"2014","unstructured":"Aysu A, Gulcan E, Schaumont P (2014) Simon says: Break area records of block ciphers on fpgas. IEEE Embed Syst Lett 6(2):37\u201340","journal-title":"IEEE Embed Syst Lett"},{"key":"35_CR32","doi-asserted-by":"publisher","unstructured":"Poschmann A, Ling S, Wang H (2010) 256 bit standardized crypto for 650 GE - GOST revisited. In: Mangard S, Standaert FS (eds) Cryptographic hardware and embedded systems, CHES 2010, ser. Lecture notes in computer science, vol 6225. Springer, Berlin Heidelberg, pp 219\u2013233. https:\/\/doi.org\/10.1007\/978-3-642-15031-9_15","DOI":"10.1007\/978-3-642-15031-9_15"},{"key":"35_CR33","doi-asserted-by":"publisher","unstructured":"Hajra S, Rebeiro C, Bhasin S, Bajaj G, Sharma S, Guilley S, Mukhopadhyay D (2014) DRECON: DPA resistant encryption by construction. In: Pointcheval D, Vergnaud D (eds) AFRICACRYPT, ser. Lecture notes in computer science, vol 8469. Springer, pp 420\u2013439. https:\/\/doi.org\/10.1007\/978-3-319-06734-6","DOI":"10.1007\/978-3-319-06734-6"},{"key":"35_CR34","unstructured":"Sasdrich P, Mischke O, Moradi A, G\u00fcneysu T (2015) Side-channel protection by randomizing look-up tables on reconfigurable hardware - pitfalls of memory primitives. Cryptology ePrint Archive, Report 2015\/198. http:\/\/eprint.iacr.org\/2015\/198"},{"key":"35_CR35","doi-asserted-by":"crossref","unstructured":"Bogdanov A, Knudsen LR, Leander G, Paar C, Poschmann A, Robshaw MJB, Seurin Y, Vikkelsoe C (2007) PRESENT: an ultra-lightweight block cipher. In: CHES, ser. LNCS, vol 4727. Springer, Vienna, Austria, pp 450\u2013466","DOI":"10.1007\/978-3-540-74735-2_31"},{"key":"35_CR36","unstructured":"Virtex-5 family overview (ds100). https:\/\/www.xilinx.com\/support\/documentation\/data_sheets\/ds100.pdf . Accessed 1 Jan 2018"},{"key":"35_CR37","unstructured":"Bhasin S, Danger J-L, Guilley S, Najm Z (2014) NICV: normalized inter-class variance for detection of side-channel leakage. In: International symposium on electromagnetic compatibility (EMC \u201914 \/ Tokyo). IEEE, Session OS09: EM Information Leakage. Hitotsubashi Hall (National Center of Sciences), Chiyoda, Tokyo, Japan"},{"key":"35_CR38","unstructured":"Goodwill G, Jun B, Jaffe J, Rohatgi P (2011) A testing methodology for side-channel resistance validation. NIST Non-Invasive Attack Testing Workshop. http:\/\/csrc.nist.gov\/news_events\/non-invasive-attack-testing-workshop\/papers\/08_Goodwill.pdf"},{"key":"35_CR39","unstructured":"security-monitor-ip-core-product-brief.pdf. https:\/\/www.xilinx.com\/support\/documentation\/product-briefs\/security-monitor-ip-core-product-brief.pdf . Accessed 24 Jan 2018"},{"issue":"5","key":"35_CR40","doi-asserted-by":"publisher","first-page":"34","DOI":"10.1109\/MSPEC.2008.4505310","volume":"45","author":"S Adee","year":"2008","unstructured":"Adee S (2008) The hunt for the kill switch. IEEE Spectr 45(5):34\u201339. https:\/\/doi.org\/10.1109\/MSPEC.2008.4505310","journal-title":"IEEE Spectr"},{"key":"35_CR41","unstructured":"Pedersen B, Reese D, Joyce J (2012) Method and apparatus for securing a programmable device using a kill switch uS Patent App. 13\/097,816. http:\/\/www.google.com\/patents\/US20120274351"}],"container-title":["Journal of Hardware and Systems Security"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s41635-018-0035-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s41635-018-0035-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s41635-018-0035-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,10,13]],"date-time":"2019-10-13T13:03:54Z","timestamp":1570971834000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s41635-018-0035-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3,26]]},"references-count":41,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2018,6]]}},"alternative-id":["35"],"URL":"https:\/\/doi.org\/10.1007\/s41635-018-0035-4","relation":{},"ISSN":["2509-3428","2509-3436"],"issn-type":[{"value":"2509-3428","type":"print"},{"value":"2509-3436","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,3,26]]},"assertion":[{"value":"17 August 2017","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"1 March 2018","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"26 March 2018","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}