{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,4]],"date-time":"2025-10-04T08:09:00Z","timestamp":1759565340329},"reference-count":30,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2021,11,2]],"date-time":"2021-11-02T00:00:00Z","timestamp":1635811200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,11,2]],"date-time":"2021-11-02T00:00:00Z","timestamp":1635811200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["SN COMPUT. SCI."],"published-print":{"date-parts":[[2022,1]]},"DOI":"10.1007\/s42979-021-00900-5","type":"journal-article","created":{"date-parts":[[2021,11,2]],"date-time":"2021-11-02T16:43:53Z","timestamp":1635871433000},"update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Optimization of Reversible Circuits Using Gate Pair Classification"],"prefix":"10.1007","volume":"3","author":[{"given":"P.","family":"Sai Phaneendra","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chetan","family":"Vudadha","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M. B.","family":"Srinivas","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2021,11,2]]},"reference":[{"key":"900_CR1","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511976667","volume-title":"Quantum computation and quantum information","author":"MA Nielsen","year":"2010","unstructured":"Nielsen MA, Chuang IL. Quantum computation and quantum information. Cambridge: Cambridge University Press; 2010."},{"issue":"7","key":"900_CR2","doi-asserted-by":"publisher","first-page":"542","DOI":"10.1364\/OL.12.000542","volume":"12","author":"R Cuykendall","year":"1987","unstructured":"Cuykendall R, Andersen DR. Reversible optical computing circuits. Opt Lett. 1987;12(7):542\u20134.","journal-title":"Opt Lett"},{"issue":"22","key":"900_CR3","first-page":"51885191","volume":"86","author":"I Ciapurin","year":"2001","unstructured":"Ciapurin I, Glebov L, Smirnov V. A scheme for efficient quantum computation with linear optics. Phys Rev Lett. 2001;86(22):51885191.","journal-title":"Phys Rev Lett"},{"issue":"2","key":"900_CR4","doi-asserted-by":"publisher","first-page":"020501","DOI":"10.1103\/PhysRevLett.104.020501","volume":"104","author":"W-B Gao","year":"2010","unstructured":"Gao W-B, et al. Experimental realization of a controlled-NOT gate with four-photon six-qubit cluster states. Phys Rev Lett. 2010;104(2):020501.","journal-title":"Phys Rev Lett"},{"issue":"3","key":"900_CR5","doi-asserted-by":"publisher","first-page":"183","DOI":"10.1147\/rd.53.0183","volume":"5","author":"R Landauer","year":"1961","unstructured":"Landauer R. Irreversibility and heat generation in the computing process. IBM J Res Dev. 1961;5(3):183\u201391. https:\/\/doi.org\/10.1147\/rd.53.0183.","journal-title":"IBM J Res Dev"},{"issue":"6","key":"900_CR6","doi-asserted-by":"publisher","first-page":"525","DOI":"10.1147\/rd.176.0525","volume":"17","author":"CH Bennett","year":"1973","unstructured":"Bennett CH. Logical reversibility of computation. IBM J Res Dev. 1973;17(6):525\u201332.","journal-title":"IBM J Res Dev"},{"key":"900_CR7","doi-asserted-by":"publisher","unstructured":"Wille R, Drechsler R, Osewold C, Garcia-Ortiz A. Automatic design of low-power encoders using reversible circuit synthesis. In: DATE \u201912, 1036\u20131041 (EDA Consortium, San Jose, CA, USA, 2012). https:\/\/doi.org\/10.5555\/2492708.2492966.","DOI":"10.5555\/2492708.2492966"},{"issue":"2","key":"900_CR8","doi-asserted-by":"publisher","first-page":"21","DOI":"10.1145\/2431211.2431220","volume":"45","author":"M Saeedi","year":"2013","unstructured":"Saeedi M, Markov IL. Synthesis and optimization of reversible circuits\u2014a survey. ACM Comput Surveys (CSUR). 2013;45(2):21.","journal-title":"ACM Comput Surveys (CSUR)"},{"key":"900_CR9","doi-asserted-by":"publisher","DOI":"10.1007\/978-90-481-9579-4","volume-title":"Towards a design flow for reversible logic","author":"R Wille","year":"2010","unstructured":"Wille R, Drechsler R. Towards a design flow for reversible logic. Berlin: Springer Science & Business Media; 2010."},{"key":"900_CR10","doi-asserted-by":"publisher","DOI":"10.1145\/1278349.1278355","author":"D Maslov","year":"2007","unstructured":"Maslov D, Dueck GW, Miller DM. Techniques for the synthesis of reversible Toffoli networks. ACM Trans Des Autom Electron Syst. 2007. https:\/\/doi.org\/10.1145\/1278349.1278355.","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"900_CR11","doi-asserted-by":"publisher","first-page":"849","DOI":"10.1109\/ASPDAC.2010.5419684","volume-title":"Rule-based optimization of reversible circuits","author":"M Arabzadeh","year":"2010","unstructured":"Arabzadeh M, Saeedi M, Zamani MS. Rule-based optimization of reversible circuits. In: 15th Asia and South Pacific Design Automation Conference (ASP-DAC), IEEE Press;2010. p. 849\u201354. https:\/\/doi.org\/10.1109\/ASPDAC.2010.5419684.\u00a0"},{"issue":"4","key":"900_CR12","doi-asserted-by":"publisher","first-page":"1208","DOI":"10.1109\/TC.2014.2315641","volume":"64","author":"K Datta","year":"2015","unstructured":"Datta K, Sengupta I, Rahaman H. A post-synthesis optimization technique for reversible circuits exploiting negative control lines. IEEE Trans Comput. 2015;64(4):1208\u201314.","journal-title":"IEEE Trans Comput"},{"key":"900_CR13","doi-asserted-by":"publisher","unstructured":"Datta, K. et al. Exploiting negative control lines in the optimization of reversible circuits. In: RC\u201913, 209\u2013220 (Springer-Verlag, Berlin, Heidelberg, 2013). https:\/\/doi.org\/10.1007\/978-3-642-38986-3.","DOI":"10.1007\/978-3-642-38986-3"},{"key":"900_CR14","doi-asserted-by":"publisher","unstructured":"Miller DM, Wille R, Drechsler R. Reducing reversible circuit cost by adding lines. In: 40th IEEE International Symposium on Multiple-Valued Logic (ISMVL), IEEE Press; 2010. p. 217\u201322. https:\/\/doi.org\/10.1109\/ISMVL.2010.48.","DOI":"10.1109\/ISMVL.2010.48"},{"key":"900_CR15","doi-asserted-by":"publisher","unstructured":"Wille R, Soeken M, Drechsler R. Reducing the number of lines in reversible circuits. In: Design Automation Conference, IEEE Press; 2010. p. 647\u201352. https:\/\/doi.org\/10.1145\/1837274.1837439.","DOI":"10.1145\/1837274.1837439"},{"key":"900_CR16","unstructured":"Rice J, Fazel K, Thornton M, Kent K. Toffoli gate cascade generation using ESOP minimization and QMDD-based swapping. In: Proceedings of the Reed-Muller Workshop (RM2009), 2009; p. 63\u201372."},{"key":"900_CR17","doi-asserted-by":"crossref","unstructured":"Bandyopadhyay C, Rahaman H, Drechsler R. Improved cube list based cube pairing approach for synthesis of ESOP based reversible logic. In: Gavrilova, Marina L. et al., editors. Lecture Notes in Computer Science, Vol. 8911. Springer Berlin Heidelberg; 2014, p. 129\u201346.","DOI":"10.1007\/978-3-662-45711-5_8"},{"key":"900_CR18","doi-asserted-by":"crossref","unstructured":"Datta K, Gokhale A, Sengupta I, Rahaman H. An ESOP-based reversible circuit synthesis flow using simulated annealing. In: R. Chaki et al., editors. Advances in Intelligent Systems and Computing, Vol. 305. Springer India; 2015, p. 131\u201344.","DOI":"10.1007\/978-81-322-1988-0_8"},{"issue":"3","key":"900_CR19","doi-asserted-by":"publisher","first-page":"385","DOI":"10.2298\/FUEE1103385N","volume":"24","author":"NM Nayeem","year":"2011","unstructured":"Nayeem NM, Rice JE. A shared-cube approach to ESOP-based synthesis of reversible logic. Facta Univ-Ser Electron Energet. 2011;24(3):385\u2013402.","journal-title":"Facta Univ-Ser Electron Energet"},{"key":"900_CR20","doi-asserted-by":"publisher","unstructured":"Soeken M, Roetteler M, Wiebe N, De Micheli G. Hierarchical reversible logic synthesis using LUTs. In: 54th ACM\/EDAC\/IEEE Design Automation Conference (DAC),IEEE Press; 2017. p. 1\u20136. https:\/\/doi.org\/10.1145\/3061639.3062261.","DOI":"10.1145\/3061639.3062261"},{"key":"900_CR21","doi-asserted-by":"publisher","unstructured":"Fazel K, Thornton M, Rice J. ESOP-based Toffoli gate cascade generation. In: IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. IEEE Press; 2007. p. 206\u20139. https:\/\/doi.org\/10.1109\/PACRIM.2007.4313212","DOI":"10.1109\/PACRIM.2007.4313212"},{"key":"900_CR22","doi-asserted-by":"publisher","unstructured":"Meuli G, Soeken M, Roetteler M, Wiebe N, De Micheli G. A best-fit mapping algorithm to facilitate ESOP-decomposition in Clifford+T quantum network synthesis. In: 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), IEEE Press; 2018. p. 664\u20139. https:\/\/doi.org\/10.1109\/ASPDAC.2018.8297398.","DOI":"10.1109\/ASPDAC.2018.8297398"},{"key":"900_CR23","first-page":"191","volume-title":"Evaluating ESOP optimization methods in quantum compilation flows","author":"G Meuli","year":"2019","unstructured":"Meuli G, Schmitt B, Ehlers R, Riener H, De Micheli G. Evaluating ESOP optimization methods in quantum compilation flows. Cham: Springer International Publishing; 2019. p. 191\u2013206."},{"key":"900_CR24","doi-asserted-by":"publisher","DOI":"10.21236\/ADA082021","volume-title":"Reversible computing","author":"T Toffoli","year":"1980","unstructured":"Toffoli T. Reversible computing. Berlin: Springer; 1980."},{"issue":"5","key":"900_CR25","doi-asserted-by":"publisher","first-page":"3457","DOI":"10.1103\/PhysRevA.52.3457","volume":"52","author":"A Barenco","year":"1995","unstructured":"Barenco A, et al. Elementary gates for quantum computation. Phys Rev A. 1995;52(5):3457.","journal-title":"Phys Rev A"},{"key":"900_CR26","doi-asserted-by":"publisher","unstructured":"Wille R, Grosse D, Teuber L, Dueck G, Drechsler R. RevLib: an online resource for reversible functions and reversible circuits. In: 38th International Symposium on Multiple Valued Logic (ISMVL), IEEE Press; 2008. p. 220\u20135. https:\/\/doi.org\/10.1109\/ISMVL.2008.43.","DOI":"10.1109\/ISMVL.2008.43"},{"issue":"6","key":"900_CR27","doi-asserted-by":"publisher","first-page":"807","DOI":"10.1109\/TCAD.2005.847911","volume":"24","author":"D Maslov","year":"2005","unstructured":"Maslov D, Dueck GW, Miller DM. Toffoli network synthesis with templates. IEEE Trans Comput Aided Des Integr Circ Syst. 2005;24(6):807\u201317. https:\/\/doi.org\/10.1109\/TCAD.2005.847911.","journal-title":"IEEE Trans Comput Aided Des Integr Circ Syst"},{"key":"900_CR28","doi-asserted-by":"publisher","first-page":"196","DOI":"10.1007\/978-3-642-38986-3_16","volume-title":"Reversible computation","author":"M Soeken","year":"2013","unstructured":"Soeken M, Thomsen MK, Dueck GW, Miller DM. White dots do matter: rewriting reversible logic circuits. In: Dueck GW, Miller DM, editors. Reversible computation. Berlin: Springer Berlin Heidelberg; 2013. p. 196\u2013208."},{"key":"900_CR29","doi-asserted-by":"publisher","unstructured":"Wille R, Soeken M, Otterstedt C, Drechsler R. Improving the mapping of reversible circuits to quantum circuits using multiple target lines. In: 18th Asia and South Pacific Design Automation Conference (ASP-DAC), IEEE Press; 2013. p. 145\u201350. https:\/\/doi.org\/10.1109\/ASPDAC.2013.6509587.","DOI":"10.1109\/ASPDAC.2013.6509587"},{"key":"900_CR30","doi-asserted-by":"crossref","unstructured":"Drechsler R, Finder A, Wille R. Improving ESOP-based synthesis of reversible logic using evolutionary algorithms. In: C. Di. Chio et al., editors. Lecture Notes in Computer Science,Vol. 6625. Springer Berlin Heidelberg; 2011, p. 151\u201361.","DOI":"10.1007\/978-3-642-20520-0_16"}],"container-title":["SN Computer Science"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s42979-021-00900-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s42979-021-00900-5\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s42979-021-00900-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,10]],"date-time":"2022-01-10T18:38:29Z","timestamp":1641839909000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s42979-021-00900-5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,11,2]]},"references-count":30,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2022,1]]}},"alternative-id":["900"],"URL":"https:\/\/doi.org\/10.1007\/s42979-021-00900-5","relation":{},"ISSN":["2662-995X","2661-8907"],"issn-type":[{"value":"2662-995X","type":"print"},{"value":"2661-8907","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,11,2]]},"assertion":[{"value":"29 July 2021","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"21 September 2021","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"2 November 2021","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"The authors declare that they have no conflict of interest.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Conflict of interest"}}],"article-number":"40"}}