{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,3]],"date-time":"2026-04-03T16:05:11Z","timestamp":1775232311287,"version":"3.50.1"},"reference-count":26,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[2026,2,5]],"date-time":"2026-02-05T00:00:00Z","timestamp":1770249600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0"},{"start":{"date-parts":[[2026,4,3]],"date-time":"2026-04-03T00:00:00Z","timestamp":1775174400000},"content-version":"vor","delay-in-days":57,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J. King Saud Univ. Comput. Inf. Sci."],"published-print":{"date-parts":[[2026,4]]},"DOI":"10.1007\/s44443-026-00513-z","type":"journal-article","created":{"date-parts":[[2026,2,5]],"date-time":"2026-02-05T13:14:54Z","timestamp":1770297294000},"update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["A fully hardware-managed scheduling architecture for AI accelerators"],"prefix":"10.1007","volume":"38","author":[{"given":"Libo","family":"Cheng","sequence":"first","affiliation":[]},{"given":"Liang","family":"Yang","sequence":"additional","affiliation":[]},{"given":"Jian","family":"Shao","sequence":"additional","affiliation":[]},{"given":"Xinyi","family":"Gu","sequence":"additional","affiliation":[]},{"given":"Rong","family":"Qian","sequence":"additional","affiliation":[]},{"given":"Xinwei","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Donghao","family":"Li","sequence":"additional","affiliation":[]},{"given":"Hongbin","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Xiaoqi","family":"Xia","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2026,2,5]]},"reference":[{"key":"513_CR1","doi-asserted-by":"crossref","unstructured":"Chen Y, Luo T, Liu S, Zhang S, He L, Wang J, Li L, Chen T, Xu Z, Sun N et al (2014) Dadiannao: A machine-learning supercomputer. In: 2014 47th Annual IEEE\/ACM international symposium on microarchitecture, pp 609\u2013622. IEEE","DOI":"10.1109\/MICRO.2014.58"},{"key":"513_CR2","unstructured":"Chen T, Moreau T, Jiang Z, Zheng L, Yan E, Shen H, Cowan M, Wang L, Hu Y, Ceze L et al (2018) $$\\{$$TVM$$\\}$$: An automated $$\\{$$End-to-End$$\\}$$ optimizing compiler for deep learning. In: 13th USENIX Symposium on operating systems design and implementation (OSDI 18), pp 578\u2013594"},{"issue":"2","key":"513_CR3","doi-asserted-by":"publisher","first-page":"292","DOI":"10.1109\/JETCAS.2019.2910232","volume":"9","author":"Y-H Chen","year":"2019","unstructured":"Chen Y-H, Yang T-J, Emer J, Sze V (2019) Eyeriss v2: A flexible accelerator for emerging deep neural networks on mobile devices. IEEE J Emerg Sel Topics Circ Syst 9(2):292\u2013308","journal-title":"IEEE J Emerg Sel Topics Circ Syst"},{"issue":"1","key":"513_CR4","doi-asserted-by":"publisher","first-page":"128","DOI":"10.1109\/JSSC.2023.3318301","volume":"59","author":"F Conti","year":"2023","unstructured":"Conti F, Paulin G, Garofalo A et al (2023) Marsellus: A heterogeneous risc-v ai-iot end-node soc with 2\u20138b dnn acceleration and 30%-boost adaptive body biasing. IEEE J Solid-State Circuits 59(1):128\u2013142","journal-title":"IEEE J Solid-State Circuits"},{"key":"513_CR5","doi-asserted-by":"crossref","unstructured":"Dixon D, Sattar H, Moros N, Kesireddy SR, Ahsan H, Lakkimsetti M, Fatima M, Doshi D, Sadhu K, Hassan MJ et al (2024) Unveiling the influence of ai predictive analytics on patient outcomes: a comprehensive narrative review. Cureus 16(5)","DOI":"10.7759\/cureus.59954"},{"key":"513_CR6","doi-asserted-by":"crossref","unstructured":"Gholami A, Yao Z, Kim S, Hooper C, Mahoney MW, Keutzer K (2024) Ai and memory wall. IEEE Micro","DOI":"10.1109\/MM.2024.3373763"},{"key":"513_CR7","unstructured":"Golin R, Chelini L, Siemieniuk A, Madhu K, Hasabnis N, Pabst H, Georganas E, Heinecke A (2024) Towards a high-performance ai compiler with upstream mlir. arXiv:2404.15204"},{"key":"513_CR8","doi-asserted-by":"crossref","unstructured":"Halawani Y, Kilani D, Hassan E, Tesfai H, Saleh H, Mohammad B (2021) Rram-based cam combined with time-domain circuits for hyperdimensional computing. Sci Rep 11(1):19848","DOI":"10.1038\/s41598-021-99000-w"},{"key":"513_CR9","doi-asserted-by":"crossref","unstructured":"Houshmand P, Sarda GM, Jain V et al (2022) Diana: An end-to-end hybrid digital and analog neural network soc for the edge. IEEE J Solid-State Circuits 58(1):203\u2013215","DOI":"10.1109\/JSSC.2022.3214064"},{"key":"513_CR10","doi-asserted-by":"crossref","unstructured":"Jouppi NP, Young C, Patil N, Patterson D, Agrawal G, Bajwa R, Bates S, Bhatia S, Boden N, Borchers A et al (2017) In-datacenter performance analysis of a tensor processing unit. In: Proceedings of the 44th annual international symposium on computer architecture, pp 1\u201312","DOI":"10.1145\/3079856.3080246"},{"key":"513_CR11","doi-asserted-by":"crossref","unstructured":"Li Z, Wijerathne D, Mitra T (2024) Coarse-grained reconfigurable array (cgra). Handbook Comput Architect 465\u2013505","DOI":"10.1007\/978-981-97-9314-3_50"},{"key":"513_CR12","doi-asserted-by":"crossref","unstructured":"Liu S, Du Z, Tao J, Han D, Luo T, Xie Y, Chen Y, Chen T (2016) Cambricon: An instruction set architecture for neural networks. ACM SIGARCH Comput Architect News 44(3):393\u2013405","DOI":"10.1145\/3007787.3001179"},{"key":"513_CR13","doi-asserted-by":"crossref","unstructured":"Lu J, Pan B, Chen J, Feng Y, Hu J, Peng Y, Chen W (2024a) Agentlens: Visual analysis for agent behaviors in llm-based autonomous systems. IEEE Trans Visualiz Comput Graph","DOI":"10.1109\/TVCG.2024.3394053"},{"key":"513_CR14","doi-asserted-by":"crossref","unstructured":"Lu Q, Zhu L, Xu X, Whittle J, Zowghi D, Jacquet A (2024b) Responsible ai pattern catalogue: A collection of best practices for ai governance and engineering. ACM Comput Surv 56(7):1\u201335","DOI":"10.1145\/3626234"},{"key":"513_CR15","doi-asserted-by":"crossref","unstructured":"Lyu X, Zhang W, Wang J (2021) A comprehensive review on the runtime of nvidia deep learning accelerator. In: Proceedings of the 5th international conference on algorithms, computing and systems, pp 88\u201393","DOI":"10.1145\/3490700.3490715"},{"key":"513_CR16","doi-asserted-by":"crossref","unstructured":"Malathi D, Gautham S, Dineshkumar M, Balakrishnan K (2024) Design of convolution neural network for crack detection. In: 2024 7th International conference on devices, circuits and systems (ICDCS), pp 60\u201366. IEEE","DOI":"10.1109\/ICDCS59278.2024.10560990"},{"key":"513_CR17","unstructured":"Nvdla hardware architectural specification (2017). http:\/\/nvdla.org\/hw\/v1\/hwarch.html"},{"key":"513_CR18","unstructured":"Nvdla software manual (2017). http:\/\/nvdla.org\/sw\/contents.html"},{"key":"513_CR19","unstructured":"Nvdla unit description (2017). http:\/\/nvdla.org\/hw\/v1\/ias\/unit_description.html"},{"issue":"1","key":"513_CR20","doi-asserted-by":"publisher","first-page":"127","DOI":"10.1109\/JSSC.2021.3114881","volume":"57","author":"D Rossi","year":"2021","unstructured":"Rossi D, Conti F, Eggiman M et al (2021) Vega: A ten-core soc for iot endnodes with dnn acceleration and cognitive wake-up from mram-based state-retentive sleep mode. IEEE J Solid-State Circuits 57(1):127\u2013139","journal-title":"IEEE J Solid-State Circuits"},{"key":"513_CR21","doi-asserted-by":"crossref","unstructured":"Tam E, Jiang S, Duan P, Meng S, Pang Y, Huang C, Han Y, Xie J, Cui Y, Yu J et al (2020) Breaking the memory wall for ai chip with a new dimension. In: 2020 5th South-East Europe design automation, computer engineering, computer networks and social media conference (SEEDA-CECNSM), pp 1\u20137. IEEE","DOI":"10.1109\/SEEDA-CECNSM49515.2020.9221795"},{"issue":"3","key":"513_CR22","doi-asserted-by":"publisher","first-page":"43","DOI":"10.1109\/MSSC.2019.2922889","volume":"11","author":"N Verma","year":"2019","unstructured":"Verma N, Jia H, Valavi H, Tang Y, Ozatay M, Chen L-Y, Zhang B, Deaville P (2019) In-memory computing: Advances and prospects. IEEE Solid-State Circuits Mag 11(3):43\u201355","journal-title":"IEEE Solid-State Circuits Mag"},{"key":"513_CR23","doi-asserted-by":"crossref","unstructured":"Veronesi A, Bertozzi D, Krstic M (2020) Assessing the configuration space of the open source nvdla deep learning accelerator on a mainstream mpsoc platform. In: IFIP\/IEEE International conference on very large scale integration-system on a chip, pp 87\u2013112. Springer","DOI":"10.1007\/978-3-030-81641-4_5"},{"key":"513_CR24","doi-asserted-by":"publisher","first-page":"102102","DOI":"10.1016\/j.vlsi.2023.102102","volume":"94","author":"X Wang","year":"2024","unstructured":"Wang X, Cheng J, Chang F, Zhu L, Chang H, Mei K (2024) A bandwidth enhancement method of vta based on paralleled memory access design. Integration 94:102102","journal-title":"Integration"},{"issue":"9","key":"513_CR25","doi-asserted-by":"publisher","first-page":"2303","DOI":"10.1109\/TPDS.2021.3066407","volume":"32","author":"F Zhang","year":"2021","unstructured":"Zhang F, Zhang C, Yang L, Zhang S, He B, Lu W, Du X (2021) Fine-grained multi-query stream processing on integrated architectures. IEEE Trans Parallel Distrib Syst 32(9):2303\u20132320","journal-title":"IEEE Trans Parallel Distrib Syst"},{"key":"513_CR26","doi-asserted-by":"crossref","unstructured":"Zhou Y, Moosavi-Dezfooli S-M, Cheung N-M, Frossard P (2018) Adaptive quantization for deep neural network. In: Proceedings of the AAAI conference on artificial intelligence, vol 32","DOI":"10.1609\/aaai.v32i1.11623"}],"container-title":["Journal of King Saud University Computer and Information Sciences"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s44443-026-00513-z","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s44443-026-00513-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s44443-026-00513-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,4,3]],"date-time":"2026-04-03T15:36:18Z","timestamp":1775230578000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s44443-026-00513-z"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,2,5]]},"references-count":26,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2026,4]]}},"alternative-id":["513"],"URL":"https:\/\/doi.org\/10.1007\/s44443-026-00513-z","relation":{},"ISSN":["1319-1578","2213-1248"],"issn-type":[{"value":"1319-1578","type":"print"},{"value":"2213-1248","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,2,5]]},"assertion":[{"value":"23 November 2025","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"22 January 2026","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"5 February 2026","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"The authors declare no competing interests.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Competing interests"}}],"article-number":"114"}}