{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,24]],"date-time":"2026-01-24T16:24:54Z","timestamp":1769271894930,"version":"3.49.0"},"publisher-location":"Cham","reference-count":25,"publisher":"Springer International Publishing","isbn-type":[{"value":"9783031250989","type":"print"},{"value":"9783031250996","type":"electronic"}],"license":[{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023]]},"DOI":"10.1007\/978-3-031-25099-6_4","type":"book-chapter","created":{"date-parts":[[2023,3,27]],"date-time":"2023-03-27T02:11:49Z","timestamp":1679883109000},"page":"67-109","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Process, Voltage and Temperature Corner Performance Estimator Using ANNs"],"prefix":"10.1007","author":[{"given":"Jo\u00e3o L. C. P.","family":"Domingues","sequence":"first","affiliation":[]},{"given":"Pedro J. C. D. C.","family":"Vaz","sequence":"additional","affiliation":[]},{"given":"Ant\u00f3nio P. L.","family":"Gusm\u00e3o","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1687-1447","authenticated-orcid":false,"given":"Nuno C. G.","family":"Horta","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9625-6435","authenticated-orcid":false,"given":"Nuno C. C.","family":"Louren\u00e7o","sequence":"additional","affiliation":[]},{"given":"Ricardo M. F.","family":"Martins","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2023,3,21]]},"reference":[{"key":"4_CR1","doi-asserted-by":"publisher","first-page":"113","DOI":"10.1016\/j.vlsi.2020.11.006","volume":"77","author":"E Afacan","year":"2021","unstructured":"Afacan E, Louren\u00e7o N, Martins R, D\u00fcndar G (2021) Review: machine learning techniques in analog\/RF integrated circuit design, synthesis, layout, and test. Integr VLSI 77:113\u2013130","journal-title":"Integr VLSI"},{"issue":"5","key":"4_CR2","first-page":"839","volume":"29","author":"A Suissa","year":"2010","unstructured":"Suissa A et al (2010) Empirical method based on neural networks for analog power modeling. IEEE TCAD 29(5):839\u2013844","journal-title":"IEEE TCAD"},{"issue":"2","key":"4_CR3","first-page":"198","volume":"22","author":"G Wolfe","year":"2003","unstructured":"Wolfe G, Vemuri R (2003) Extraction and use of neural network models in automated synthesis of operational amplifiers. IEEE TCAD 22(2):198\u2013212","journal-title":"IEEE TCAD"},{"issue":"3","key":"4_CR4","doi-asserted-by":"publisher","first-page":"240","DOI":"10.1109\/TEVC.2003.808914","volume":"7","author":"G Alpaydin","year":"2003","unstructured":"Alpaydin G, Balkir S, Dundar G (2003) An evolutionary approach to automatic synthesis of high-performance analog integrated circuits. IEEE Trans Evol Comput 7(3):240\u2013252. https:\/\/doi.org\/10.1109\/TEVC.2003.808914","journal-title":"IEEE Trans Evol Comput"},{"key":"4_CR5","doi-asserted-by":"crossref","unstructured":"Liu H, Singhee A, Rutenbar RA, Carley LR (2002) Remembrance of circuits past: macromodeling by data mining in large analog design spaces. In: proceedings 2002 design automation conference, pp 437\u2013442","DOI":"10.1145\/513918.514030"},{"key":"4_CR6","doi-asserted-by":"crossref","unstructured":"Louren\u00e7o N et al (2019) Using polynomial regression and artificial neural networks for reusable analog IC sizing. In: 16th international conference on synthesis, modeling, analysis and simulation methods and applications to circuit design, pp 13\u201316, July 2019","DOI":"10.1109\/SMACD.2019.8795282"},{"key":"4_CR7","doi-asserted-by":"crossref","unstructured":"Zhu K et al (2019) Genius route: a new analog routing paradigm using generative neural network guidance. In: proceedings of the ICCAD","DOI":"10.1109\/ICCAD45719.2019.8942164"},{"key":"4_CR8","doi-asserted-by":"crossref","unstructured":"Guerra D, Canelas A, P\u00f3voa R, Horta N, Louren\u00e7o N, Martins R (2019) Artificial neural networks as an alternative for automatic analog IC placement. In: international conference on SMACD, Lausanne, Switzerland, July 2019","DOI":"10.1109\/SMACD.2019.8795267"},{"key":"4_CR9","doi-asserted-by":"crossref","unstructured":"Gusm\u00e3o A, Passos F, P\u00f3voa R, Horta N, Louren\u00e7o N, Martins R (2020) Semi-supervised artificial neural networks towards analog IC placement recommender. In: IEEE international symposium on circuits and systems, Seville, Spain, Oct 2020","DOI":"10.1109\/ISCAS45731.2020.9181148"},{"key":"4_CR10","unstructured":"Gusm\u00e3o A, Horta N, Louren\u00e7o N, Martins R (2022) Scalable and order invariant analog integrated circuit placement with attention-based graph-to-sequence deep models. In: expert systems with applications. Elsevier, Amsterdam"},{"key":"4_CR11","doi-asserted-by":"crossref","unstructured":"Gusm\u00e3o A, P\u00f3voa R, Horta N, Louren\u00e7o N, Martins R (2022) DeepPlacer: a custom integrated OpAmp placement tool using deep models. In: applied soft computing, vol 115. Elsevier, Amsterdam, 108188","DOI":"10.1016\/j.asoc.2021.108188"},{"key":"4_CR12","doi-asserted-by":"crossref","unstructured":"Gusm\u00e3o A, Horta N, Louren\u00e7o N, Martins R (2021) Late breaking results: attention in Graph2Seq neural networks towards push-button analog IC placement. In: ACM\/IEEE design automation conference (DAC), San Francisco, USA, Dec 2021","DOI":"10.1109\/DAC18074.2021.9586177"},{"issue":"11","key":"4_CR13","first-page":"2022","volume":"63","author":"M Andraud","year":"2016","unstructured":"Andraud M, Stratigopoulos H, Simeu E (2016) One-shot non-intrusive calibration against process variations for analog\/RF circuits. IEEE TCAS-I Reg Pap 63(11):2022\u20132035","journal-title":"IEEE TCAS-I Reg Pap"},{"key":"4_CR14","doi-asserted-by":"crossref","unstructured":"\u0130slamo\u011flu G, \u00c7akici TO, Afacan E, D\u00fcndar G (2019) Artificial neural network assisted analog IC sizing tool. In: 16th international conference on synthesis, modeling, analysis and simulation methods and applications to circuit design, pp 9\u201312, July 2019","DOI":"10.1109\/SMACD.2019.8795293"},{"key":"4_CR15","doi-asserted-by":"crossref","unstructured":"\u00c7ak\u0131c\u0131 TO, \u0130slamo\u011flu G, G\u00fczelhan \u015eN, Afacan E, D\u00fcndar G (2020) Improving POF quality in multi objective optimization of analog ICs via deep learning. In: ECCTD, pp 1\u20134","DOI":"10.1109\/ECCTD49232.2020.9218272"},{"issue":"1","key":"4_CR16","doi-asserted-by":"publisher","first-page":"69","DOI":"10.1109\/TVLSI.2018.2872410","volume":"27","author":"R Martins","year":"2019","unstructured":"Martins R et al (2019) Many-objective sizing optimization of a class-C\/D VCO for ultralow-power IoT and ultralow phase-noise cellular applications. IEEE Trans VLSI Syst 27(1):69\u201382","journal-title":"IEEE Trans VLSI Syst"},{"key":"4_CR17","unstructured":"Tensorflow. Accessed: Out. 12, 2021. [Online]. Available: www.tensorflow.org"},{"key":"4_CR18","unstructured":"Keras. Accessed: Out. 12, 2021. [Online]. Available: https:\/\/github.com\/fchollet\/keras"},{"key":"4_CR19","unstructured":"Aurlien Gron (2017) Hands-on machine learning with scikit-learn and tensorflow: concepts, tools, and techniques to build intelligent systems (1st edn). O\u2019Reilly Media, Inc. ISBN 978-1491962299"},{"key":"4_CR20","unstructured":"Xu B, Wang N, Chen T, Li M (2015) Empirical evaluation of rectified activations in convolutional network. Cornell University. arXiv:1505.00853, Nov 2015"},{"key":"4_CR21","unstructured":"Clevert D, Unterthiner T, Hochreiter S (2015) Fast and accurate deep network learning by exponential linear units (ELUs). Cornell University. arXiv:1511.07289, Nov 2015"},{"key":"4_CR22","unstructured":"Early stopping with PyTorch to restrain your model from overfitting. Accessed: Out. 12, 2021. [Online]. Available: https:\/\/medium.com\/analytics-vidhya\/early-stopping-with-pytorch-to-restrain-your-model-from-overfitting-dce6de4081c5"},{"key":"4_CR23","first-page":"1929","volume":"15","author":"N Srivastava","year":"2014","unstructured":"Srivastava N, Hinton G, Krizhevsky A, Sutskever I, Salakhutdinov R (2014) Dropout: a simple way to prevent neural networks from overfitting. J Mach Learn Res 15:1929\u20131958","journal-title":"J Mach Learn Res"},{"key":"4_CR24","doi-asserted-by":"publisher","first-page":"351","DOI":"10.1016\/j.vlsi.2018.02.005","volume":"63","author":"F Passos","year":"2018","unstructured":"Passos F et al (2018) Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integr VLSI 63:351\u2013361","journal-title":"Integr VLSI"},{"key":"4_CR25","doi-asserted-by":"crossref","unstructured":"Martins R, Louren\u00e7o N, Horta N, Zhong S, Yin J, Mak P-I, Martins RP (2020) Design of a 4.2\u20135.1\u00a0GHz ultralow-power complementary class-B\/C hybrid-mode VCO in 65\u00a0nm CMOS fully supported by EDA tools. IEEE Trans Circ Syst I Reg Pap (IEEE TCAS-I) 67(11):3965\u20133977","DOI":"10.1109\/TCSI.2020.3009857"}],"container-title":["SpringerBriefs in Applied Sciences and Technology","Speeding-Up Radio-Frequency Integrated Circuit Sizing with Neural Networks"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-031-25099-6_4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,3,27]],"date-time":"2023-03-27T02:38:40Z","timestamp":1679884720000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-031-25099-6_4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023]]},"ISBN":["9783031250989","9783031250996"],"references-count":25,"URL":"https:\/\/doi.org\/10.1007\/978-3-031-25099-6_4","relation":{},"ISSN":["2191-530X","2191-5318"],"issn-type":[{"value":"2191-530X","type":"print"},{"value":"2191-5318","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023]]},"assertion":[{"value":"21 March 2023","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}