{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,6,14]],"date-time":"2024-06-14T23:12:47Z","timestamp":1718406767758},"reference-count":13,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2015,3,21]],"date-time":"2015-03-21T00:00:00Z","timestamp":1426896000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Sign Process Syst"],"published-print":{"date-parts":[[2015,10]]},"DOI":"10.1007\/s11265-015-0977-5","type":"journal-article","created":{"date-parts":[[2015,3,20]],"date-time":"2015-03-20T01:01:08Z","timestamp":1426813268000},"page":"129-133","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["Comments on \u201cMinimizing Buffer Requirements Under Rate-Optimal Schedule in Regular Dataflow Networks\u201d"],"prefix":"10.1007","volume":"81","author":[{"given":"Jos\u00e9-In\u00e1cio","family":"Rocha","sequence":"first","affiliation":[]},{"given":"Oct\u00e1vio P\u00e1scoa","family":"Dias","sequence":"additional","affiliation":[]},{"given":"Lu\u00eds","family":"Gomes","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2015,3,21]]},"reference":[{"key":"977_CR1","unstructured":"SESA - Signal\/Net system analyzer, Humboldt - Universita zu Berlin, http:\/\/www.vyatkin.org\/tools\/modelchekers.html . [On-line; accessed June-2014]."},{"key":"977_CR2","unstructured":"TINA-TIme Petri Net Analyzer, Laboratoire d\u2019Analyse et d\u2019Architecture des Syst\u00e8mes. http:\/\/homepages.laas.fr\/bernard\/tina\/ . [On-line; accessed June-2014]."},{"key":"977_CR3","volume-title":"Petri nets for systems engineering. A guide to modeling, verification, and applications","author":"C Giraud","year":"2003","unstructured":"Giraud, C., & Valk, R. (2003). Petri nets for systems engineering. A guide to modeling, verification, and applications. Berlin: Springer."},{"key":"977_CR4","doi-asserted-by":"crossref","unstructured":"Dennis, J. (1974). First version of a data flow procedure language. In Robinet, B. (Ed.) Programming symposium, Lecture Notes in Computer Science, (Vol. 19. pp. 362\u2013376).","DOI":"10.1007\/3-540-06859-7_145"},{"key":"977_CR5","doi-asserted-by":"crossref","unstructured":"Desel, J., & Reisig, W. (1998). Place\/transition petri nets. In Reisig, W., & Rozenberg, G. (Eds.) Lectures on petri nets I: basic models, lecture notes in computer science, (Vol. 1491. pp. 122\u2013173). Berlin: Springer.","DOI":"10.1007\/3-540-65306-6_15"},{"key":"977_CR6","doi-asserted-by":"crossref","unstructured":"Govindarajan, R., Gao, G.R., & Desai, P. (1994). Minimizing memory requirements in rate-optimal schedules. In Application specific array processors, 1994. International Conference on Proceedings (pp. 75\u201386).","DOI":"10.1109\/ASAP.1994.331814"},{"key":"977_CR7","doi-asserted-by":"crossref","unstructured":"Govindarajan, R., Gao, G.R., & Desai, P. (2002). Minimizing buffer requirements under rate-optimal schedule in regular dataflow networks. The Journal of VLSI Signal Processing, 31(3), 207\u2013229.","DOI":"10.1023\/A:1015452903532"},{"issue":"9","key":"977_CR8","doi-asserted-by":"crossref","first-page":"1235","DOI":"10.1109\/PROC.1987.13876","volume":"75","author":"EA Lee","year":"1987","unstructured":"Lee, E.A., & Messerschmitt, D.G. (1987). Synchronous data flow. Proceedings of the IEEE, 75(9), 1235\u20131245.","journal-title":"Proceedings of the IEEE"},{"issue":"4","key":"977_CR9","doi-asserted-by":"crossref","first-page":"541","DOI":"10.1109\/5.24143","volume":"77","author":"T Murata","year":"1989","unstructured":"Murata, T. (1989). Petri nets: properties, analysis and applications. Proceedings of the IEEE, 77(4), 541\u2013580.","journal-title":"Proceedings of the IEEE"},{"key":"977_CR10","doi-asserted-by":"crossref","unstructured":"Rocha, J.I., Gomes, L., & Dias, O. (2011). Dataflow model property verification using Petri net translation techniques. In Industrial informatics (INDIN), 2011 9th International Conference on IEEE (pp. 783\u2013788).","DOI":"10.1109\/INDIN.2011.6034993"},{"key":"977_CR11","doi-asserted-by":"crossref","unstructured":"Rocha, JI, Gomes, L, & Dias, O (2011). Petri net verification techniques on synchronous dataflow models. In IECON 2011 - 37th Annual Conference on IEEE Industrial Electronics Society (pp. 3792\u20133797).","DOI":"10.1109\/IECON.2011.6119927"},{"key":"977_CR12","doi-asserted-by":"crossref","unstructured":"Rocha, J.I., Gomes, L., & Dias, O. (2012). Analysing storage resources on synchronous dataflows using Petri net verification techniques. In IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society, (pp. 4676\u20134681).","DOI":"10.1109\/IECON.2012.6389492"},{"key":"977_CR13","doi-asserted-by":"crossref","unstructured":"Rocha, J.I., P\u00e1scoa Dias, O., & Gomes, L. (2013). Exploiting dataflows and Petri nets mappings. In Industrial Informatics (INDIN), 2013 11th International Conference on IEEE, (pp. 590\u2013595).","DOI":"10.1109\/INDIN.2013.6622950"}],"container-title":["Journal of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-015-0977-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11265-015-0977-5\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11265-015-0977-5","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T08:22:27Z","timestamp":1559377347000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11265-015-0977-5"}},"subtitle":["Comments on Paper from R. Govindarajan, Guang R. Gao and Palash Desai Published in Journal of VLSI Signal Processing, Volume n. 31, pp 207\u2013229, 2002"],"short-title":[],"issued":{"date-parts":[[2015,3,21]]},"references-count":13,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2015,10]]}},"alternative-id":["977"],"URL":"https:\/\/doi.org\/10.1007\/s11265-015-0977-5","relation":{},"ISSN":["1939-8018","1939-8115"],"issn-type":[{"value":"1939-8018","type":"print"},{"value":"1939-8115","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,3,21]]}}}