{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T16:48:53Z","timestamp":1648918133261},"reference-count":8,"publisher":"Elsevier BV","issue":"6","license":[{"start":{"date-parts":[[1992,6,1]],"date-time":"1992-06-01T00:00:00Z","timestamp":707356800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Computer-Aided Design"],"published-print":{"date-parts":[[1992,6]]},"DOI":"10.1016\/0010-4485(92)90046-d","type":"journal-article","created":{"date-parts":[[2003,3,14]],"date-time":"2003-03-14T14:47:17Z","timestamp":1047653237000},"page":"291-300","source":"Crossref","is-referenced-by-count":0,"title":["Reliable sizing of power networks in VLSI circuits"],"prefix":"10.1016","volume":"24","author":[{"given":"S.","family":"Chowdhury","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.S.","family":"Barkatullah","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/0010-4485(92)90046-D_BIB1","series-title":"Proc. Int. Conf. Circuits & Computers","first-page":"785","article-title":"The analysis and design of power distribution nets on LSI chips","author":"Branin","year":"1980"},{"key":"10.1016\/0010-4485(92)90046-D_BIB2","doi-asserted-by":"crossref","DOI":"10.1109\/JSSC.1986.1052491","article-title":"Power distribution techniques for VLSI circuits","author":"Song","year":"1986","journal-title":"J. Solid State Circuits"},{"key":"10.1016\/0010-4485(92)90046-D_BIB3","doi-asserted-by":"crossref","first-page":"787","DOI":"10.1109\/43.3949","article-title":"Optimum design of IC power\/ground nets subject to reliability constraints","author":"Chowdhury","year":"1988","journal-title":"IEEE Trans. Comput.-Aided Des."},{"key":"10.1016\/0010-4485(92)90046-D_BIB4","series-title":"Electrical Networks \u2014 Theory and Analysis","author":"Choma","year":"1985"},{"key":"10.1016\/0010-4485(92)90046-D_BIB5","doi-asserted-by":"crossref","first-page":"1441","DOI":"10.1109\/TCS.1987.1086084","article-title":"Minimal area design of power\/ground nets having graph topologies","author":"Chowdhury","year":"1987","journal-title":"IEEE Trans. Circuits & Syst."},{"key":"10.1016\/0010-4485(92)90046-D_BIB6","series-title":"Introduction to VLSI Systems","author":"Mead","year":"1980"},{"key":"10.1016\/0010-4485(92)90046-D_BIB7","first-page":"1587","article-title":"Electromigration failure modes in aluminium metallization for semiconductor devices","volume":"Vol 57","author":"Black","year":"1969"},{"key":"10.1016\/0010-4485(92)90046-D_BIB8","series-title":"Nonlinear Programming: Sequential Unconstrained Minimization Techniques","author":"Fiacco","year":"1968"}],"container-title":["Computer-Aided Design"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:001044859290046D?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:001044859290046D?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,3,26]],"date-time":"2019-03-26T20:23:29Z","timestamp":1553631809000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/001044859290046D"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1992,6]]},"references-count":8,"journal-issue":{"issue":"6","published-print":{"date-parts":[[1992,6]]}},"alternative-id":["001044859290046D"],"URL":"https:\/\/doi.org\/10.1016\/0010-4485(92)90046-d","relation":{},"ISSN":["0010-4485"],"issn-type":[{"value":"0010-4485","type":"print"}],"subject":[],"published":{"date-parts":[[1992,6]]}}}