{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,4]],"date-time":"2025-05-04T01:49:56Z","timestamp":1746323396814},"reference-count":15,"publisher":"Elsevier BV","issue":"3","license":[{"start":{"date-parts":[[1996,3,1]],"date-time":"1996-03-01T00:00:00Z","timestamp":825638400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Computer Communications"],"published-print":{"date-parts":[[1996,3]]},"DOI":"10.1016\/0140-3664(96)01055-9","type":"journal-article","created":{"date-parts":[[2002,7,25]],"date-time":"2002-07-25T14:53:54Z","timestamp":1027608834000},"page":"245-256","source":"Crossref","is-referenced-by-count":10,"title":["New implementation of multi-priority pushout for shared memory ATM switches"],"prefix":"10.1016","volume":"19","author":[{"given":"Abhijit K.","family":"Choudhury","sequence":"first","affiliation":[]},{"given":"Ellen L.","family":"Hahne","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/0140-3664(96)01055-9_BIB1","article-title":"CCITT Recommendation I.121","year":"1989"},{"key":"10.1016\/0140-3664(96)01055-9_BIB2","series-title":"Proc. IEEE GLOBECOM","first-page":"1871","article-title":"Implementing asynchronous transfer mode concepts: main results of the Prelude experiment","author":"Gonet","year":"1987"},{"key":"10.1016\/0140-3664(96)01055-9_BIB3","doi-asserted-by":"crossref","first-page":"1587","DOI":"10.1109\/49.12886","article-title":"Queueing in high-performance packet switching","volume":"6","author":"Hluchyj","year":"1988","journal-title":"IEEE J. Select. Areas Commun."},{"key":"10.1016\/0140-3664(96)01055-9_BIB4","series-title":"Proc. IEEE ICC","first-page":"711","article-title":"32 \u00d7 32 shared buffer type ATM switch VLSIs for B-ISDN","author":"Kozaki","year":"1991"},{"key":"10.1016\/0140-3664(96)01055-9_BIB5","series-title":"Proc. ITC Special Seminar","article-title":"A space priority queueing mechanism for multiplexing ATM channels","author":"H\u00e9buterne","year":"1990"},{"key":"10.1016\/0140-3664(96)01055-9_BIB6","doi-asserted-by":"crossref","first-page":"418","DOI":"10.1109\/49.76641","article-title":"Priority management in ATM switching nodes","volume":"9","author":"Kr\u00f6ner","year":"1991","journal-title":"IEEE J. Select. Areas Commun."},{"key":"10.1016\/0140-3664(96)01055-9_BIB7","doi-asserted-by":"crossref","first-page":"1524","DOI":"10.1109\/49.108688","article-title":"Priority queueing strategies and buffer allocation protocols for traffic control at an ATM integrated broadband switching system","volume":"9","author":"Lin","year":"1991","journal-title":"IEEE J. Select. Areas Commun."},{"key":"10.1016\/0140-3664(96)01055-9_BIB8","series-title":"Proc. IEEE GLOBECOM","first-page":"924","article-title":"An optimal buffer management policy for high-performance packet switching","author":"Wei","year":"1991"},{"key":"10.1016\/0140-3664(96)01055-9_BIB9","first-page":"24","article-title":"Optimal buffer sharing","volume":"vol. 1","author":"Georgiadis","year":"1995"},{"key":"10.1016\/0140-3664(96)01055-9_BIB10","first-page":"1375","article-title":"Space priority management in a shared memory ATM switch","volume":"vol. 3","author":"Choudhury","year":"1993"},{"key":"10.1016\/0140-3664(96)01055-9_BIB11","doi-asserted-by":"crossref","first-page":"491","DOI":"10.3233\/JHS-1994-3409","article-title":"A simulation study of space priorities in a shared memory ATM switch","volume":"3","author":"Choudhury","year":"1994","journal-title":"Journal of High Speed Networks"},{"key":"10.1016\/0140-3664(96)01055-9_BIB12","doi-asserted-by":"crossref","first-page":"1110","DOI":"10.1109\/49.103556","article-title":"A novel architecture for queue management in the ATM network","volume":"9","author":"Chao","year":"1991","journal-title":"IEEE J. Select. Areas Commun."},{"key":"10.1016\/0140-3664(96)01055-9_BIB13","doi-asserted-by":"crossref","first-page":"1634","DOI":"10.1109\/4.165345","article-title":"A VLSI sequencer chip for ATM traffic shaper and queue manager","volume":"27","author":"Chao","year":"1992","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/0140-3664(96)01055-9_BIB14","first-page":"308","article-title":"An ATM queue manager with multiple delay and loss priorities","volume":"vol. 1","author":"Chao","year":"1992"},{"key":"10.1016\/0140-3664(96)01055-9_BIB15","first-page":"1401","article-title":"A multi-queue flexible buffer manager architecture","volume":"vol. 3","author":"Velamuri","year":"1993"}],"container-title":["Computer Communications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0140366496010559?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0140366496010559?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2020,1,9]],"date-time":"2020-01-09T20:54:39Z","timestamp":1578603279000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0140366496010559"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1996,3]]},"references-count":15,"journal-issue":{"issue":"3","published-print":{"date-parts":[[1996,3]]}},"alternative-id":["0140366496010559"],"URL":"https:\/\/doi.org\/10.1016\/0140-3664(96)01055-9","relation":{},"ISSN":["0140-3664"],"issn-type":[{"value":"0140-3664","type":"print"}],"subject":[],"published":{"date-parts":[[1996,3]]}}}