{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,30]],"date-time":"2022-03-30T20:02:18Z","timestamp":1648670538131},"reference-count":15,"publisher":"Elsevier BV","issue":"8","license":[{"start":{"date-parts":[[1992,1,1]],"date-time":"1992-01-01T00:00:00Z","timestamp":694224000000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessors and Microsystems"],"published-print":{"date-parts":[[1992,1]]},"DOI":"10.1016\/0141-9331(92)90026-p","type":"journal-article","created":{"date-parts":[[2003,3,15]],"date-time":"2003-03-15T01:33:26Z","timestamp":1047692006000},"page":"395-402","source":"Crossref","is-referenced-by-count":0,"title":["An image tracing approach using CMOS variable threshold logic"],"prefix":"10.1016","volume":"16","author":[{"given":"Hajime","family":"Takakubo","sequence":"first","affiliation":[]},{"given":"Katsufusa","family":"Shono","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/0141-9331(92)90026-P_bib1","series-title":"Proc. 7th Int. Pattern Recognition Conf.","first-page":"1310","article-title":"Topology based analysis of schematic diagrams","author":"Groen","year":"1984"},{"issue":"No 3","key":"10.1016\/0141-9331(92)90026-P_bib2","doi-asserted-by":"crossref","first-page":"331","DOI":"10.1109\/34.3898","article-title":"An automatic circuit diagram reader with loop-structure-based symbol recognition","volume":"Vol 10","author":"Okazaki","year":"1988","journal-title":"IEEE Trans. Patt. Anal. Mach. Intell."},{"key":"10.1016\/0141-9331(92)90026-P_bib3","series-title":"Proc. 10th Int. Pattern Recognition Conf.","first-page":"578","article-title":"The recognition method for roughly hand-drawn logical diagrams based on hybrid utilization of multi-layered knowledge","author":"Kato","year":"1990"},{"key":"10.1016\/0141-9331(92)90026-P_bib4","series-title":"Proc. of IFIP International Conf. on VLSI 89","first-page":"349","article-title":"Bit-serial pre-processing for recognition of hand-written drawing image using CMOS neural module","author":"Takakubo","year":"1989"},{"key":"10.1016\/0141-9331(92)90026-P_bib5","series-title":"Proc. IEICE","first-page":"19","article-title":"Recognition system of logic circuit with VTL image processor","author":"Takakubo","year":"1987"},{"key":"10.1016\/0141-9331(92)90026-P_bib6","series-title":"Proc. 10th Int. Pattern Recognition Conf.","first-page":"443","article-title":"Complementary algorithm for recognition of totally unconstrained handwritten numerals","author":"Nadal","year":"1990"},{"key":"10.1016\/0141-9331(92)90026-P_bib7","series-title":"Proc. 10th Int. Pattern Recognition Conf.","first-page":"837","article-title":"Dot image matching using local affine transformation","author":"Wakahara","year":"1990"},{"issue":"No 3","key":"10.1016\/0141-9331(92)90026-P_bib8","doi-asserted-by":"crossref","first-page":"355","DOI":"10.1109\/72.97912","article-title":"Handwritten alpha-numeric character recognition by the Neocognitron","volume":"Vol 2","author":"Fukushima","year":"1991","journal-title":"IEEE Trans. Neur. Netw."},{"key":"10.1016\/0141-9331(92)90026-P_bib9","unstructured":"Takakubo, H and Shono, K \u2018Combination analog and digital circuit using CMOS variable threshold logic\u2019 IEEE J. Sol. State Circ. to be submitted"},{"issue":"No 6","key":"10.1016\/0141-9331(92)90026-P_bib10","first-page":"1336","article-title":"Photomask pattern data processing system of bit map method","volume":"Vol J68-D","author":"Koide","year":"1985","journal-title":"Trans. IEICE, Japan"},{"issue":"No 8","key":"10.1016\/0141-9331(92)90026-P_bib11","first-page":"956","article-title":"Bit-map CAD system of IC design employing BIT-1 language","volume":"Vol J69-C","author":"Koide","year":"1986","journal-title":"Trans. IEICE, Japan"},{"key":"10.1016\/0141-9331(92)90026-P_bib12","first-page":"2603","article-title":"A CMOS cell compiler for a bit-mapping CAD system","volume":"Vol F74","author":"Pham","year":"1991","journal-title":"Trans. IEICE, Japan"},{"issue":"No 3","key":"10.1016\/0141-9331(92)90026-P_bib13","doi-asserted-by":"crossref","first-page":"630","DOI":"10.1109\/4.300","article-title":"A class of multiprocessors for real-time image and multidimensional signal processing","volume":"Vol 23","author":"Denayer","year":"1988","journal-title":"IEEE J. Sol. State Circ."},{"issue":"No 6","key":"10.1016\/0141-9331(92)90026-P_bib14","doi-asserted-by":"crossref","first-page":"1476","DOI":"10.1109\/4.62183","article-title":"An image signal multiprocessor on a single chip","volume":"Vol 25","author":"Maruyama","year":"1990","journal-title":"IEEE J. Sol. State Circ."},{"issue":"No 4","key":"10.1016\/0141-9331(92)90026-P_bib15","first-page":"227","article-title":"A bitmap memory bank of region access","volume":"Vol J74-C-11","author":"Takakubo","year":"1991","journal-title":"Trans. IEICE, Japan"}],"container-title":["Microprocessors and Microsystems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:014193319290026P?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:014193319290026P?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,3,25]],"date-time":"2019-03-25T04:27:32Z","timestamp":1553488052000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/014193319290026P"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1992,1]]},"references-count":15,"journal-issue":{"issue":"8","published-print":{"date-parts":[[1992,1]]}},"alternative-id":["014193319290026P"],"URL":"https:\/\/doi.org\/10.1016\/0141-9331(92)90026-p","relation":{},"ISSN":["0141-9331"],"issn-type":[{"value":"0141-9331","type":"print"}],"subject":[],"published":{"date-parts":[[1992,1]]}}}