{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,2,9]],"date-time":"2023-02-09T16:51:28Z","timestamp":1675961488054},"reference-count":18,"publisher":"Elsevier BV","issue":"3","license":[{"start":{"date-parts":[[1996,5,1]],"date-time":"1996-05-01T00:00:00Z","timestamp":830908800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessors and Microsystems"],"published-print":{"date-parts":[[1996,5]]},"DOI":"10.1016\/0141-9331(95)01072-6","type":"journal-article","created":{"date-parts":[[2002,7,25]],"date-time":"2002-07-25T18:50:06Z","timestamp":1027623006000},"page":"149-157","source":"Crossref","is-referenced-by-count":3,"title":["A system-level communication synthesis approach for hardware\/software systems"],"prefix":"10.1016","volume":"20","author":[{"given":"Tarek Ben","family":"Ismail","sequence":"first","affiliation":[]},{"given":"Jean-Marc","family":"Daveau","sequence":"additional","affiliation":[]},{"given":"Kevin","family":"O'Brien","sequence":"additional","affiliation":[]},{"given":"Ahmed Amine","family":"Jerraya","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/0141-9331(95)01072-6_BIB1","doi-asserted-by":"crossref","first-page":"44","DOI":"10.1109\/2.347999","article-title":"Synthesis steps and design models for codesign","volume":"28","author":"Ben Ismail","year":"1995","journal-title":"IEEE Comput."},{"key":"10.1016\/0141-9331(95)01072-6_BIB2","doi-asserted-by":"crossref","first-page":"65","DOI":"10.1016\/0169-7552(87)90091-2","article-title":"CCITT SDL: An overview of the language and its applications","volume":"13","author":"Saracco","year":"1987","journal-title":"Comput. Netw. ISDN Syst."},{"key":"10.1016\/0141-9331(95)01072-6_BIB3","series-title":"Proc. Euro-DAC with Euro-VHDL","first-page":"60","article-title":"A prototyping environment for control-oriented HW\/SW systems using state-charts, activity-charts and FPGA's","author":"Buchenrieder","year":"1994"},{"key":"10.1016\/0141-9331(95)01072-6_BIB4","doi-asserted-by":"crossref","first-page":"403","DOI":"10.1109\/32.54292","article-title":"Statement: A working environment for the development of complex reactive systems","volume":"16","author":"Harel","year":"1990","journal-title":"IEEE Trans. Softw. Eng."},{"key":"10.1016\/0141-9331(95)01072-6_BIB5","doi-asserted-by":"crossref","first-page":"666","DOI":"10.1145\/359576.359585","article-title":"Communicating sequential processes","volume":"21","author":"Hoare","year":"1978","journal-title":"Comm. ACM."},{"key":"10.1016\/0141-9331(95)01072-6_BIB6","series-title":"Proc. VHDL Forum for CAD in Europe","first-page":"95","article-title":"Communication mechanisms for VHDL specification and design starting at system level","author":"Bauer","year":"1993"},{"issue":"9","key":"10.1016\/0141-9331(95)01072-6_BIB7","first-page":"1039","article-title":"High-level Modeling and Synthesis of Communicating Processes using VHDL","volume":"E76-D","author":"Wolf","year":"1993","journal-title":"IEICE Trans. Information & Systems"},{"key":"10.1016\/0141-9331(95)01072-6_BIB8","doi-asserted-by":"crossref","first-page":"48","DOI":"10.1109\/2.248880","article-title":"Program implementation schemes for hardware-software systems","volume":"27","author":"Gupta","year":"1994","journal-title":"IEEE Des. Test Comput."},{"key":"10.1016\/0141-9331(95)01072-6_BIB9","series-title":"Proc. CHDL'91","first-page":"145","article-title":"SpecCharts: A language for system-level synthesis","author":"Vahid","year":"1991"},{"key":"10.1016\/0141-9331(95)01072-6_BIB10","series-title":"Proc. EDAC'94","first-page":"395","article-title":"Synthesis of system-level bus interfaces","author":"Narayan","year":"1994"},{"key":"10.1016\/0141-9331(95)01072-6_BIB11","series-title":"Computer Aided Software\/Hardware Engineering","first-page":"147","article-title":"Solar: an intermediate format for system-level modeling and synthesis","author":"Jerraya","year":"1994"},{"key":"10.1016\/0141-9331(95)01072-6_BIB12","series-title":"Proc. 27th DAC","first-page":"14","article-title":"An intermediate presentation for behavioral synthesis","author":"Dutt","year":"1990"},{"key":"10.1016\/0141-9331(95)01072-6_BIB13","first-page":"97","article-title":"A service-based method for the synthesis of communication protocols","volume":"12","author":"Salah","year":"1990","journal-title":"Int. J. Mini Microcomput."},{"key":"10.1016\/0141-9331(95)01072-6_BIB14","series-title":"Proc. EDAC'94","first-page":"469","article-title":"A development environment for the cosynthesis of embedded software\/hardware systems","author":"Edwards","year":"1994"},{"key":"10.1016\/0141-9331(95)01072-6_BIB15","doi-asserted-by":"crossref","first-page":"64","DOI":"10.1109\/54.245964","article-title":"Hardware-software cosynthesis for microcontrollers","volume":"10","author":"Ernst","year":"1993","journal-title":"IEEE Design Test Comput."},{"key":"10.1016\/0141-9331(95)01072-6_BIB16","series-title":"The Synthesis Approach to Digital System Design","year":"1992"},{"key":"10.1016\/0141-9331(95)01072-6_BIB17","first-page":"56","article-title":"Specification and design of embedded hardware-software systems","author":"Gajski","year":"1995","journal-title":"IEEE Des. Test Comput."},{"key":"10.1016\/0141-9331(95)01072-6_BIB18","series-title":"Concurrent Programming: Principles and Practice","first-page":"484","year":"1991"}],"container-title":["Microprocessors and Microsystems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0141933195010726?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0141933195010726?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,4,18]],"date-time":"2019-04-18T15:52:00Z","timestamp":1555602720000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0141933195010726"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1996,5]]},"references-count":18,"journal-issue":{"issue":"3","published-print":{"date-parts":[[1996,5]]}},"alternative-id":["0141933195010726"],"URL":"https:\/\/doi.org\/10.1016\/0141-9331(95)01072-6","relation":{},"ISSN":["0141-9331"],"issn-type":[{"value":"0141-9331","type":"print"}],"subject":[],"published":{"date-parts":[[1996,5]]}}}