{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,31]],"date-time":"2022-03-31T02:42:33Z","timestamp":1648694553265},"reference-count":23,"publisher":"Elsevier BV","issue":"3-4","license":[{"start":{"date-parts":[[1983,10,1]],"date-time":"1983-10-01T00:00:00Z","timestamp":433814400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1983,10]]},"DOI":"10.1016\/0165-6074(83)90097-2","type":"journal-article","created":{"date-parts":[[2003,8,8]],"date-time":"2003-08-08T00:56:11Z","timestamp":1060304171000},"page":"199-205","source":"Crossref","is-referenced-by-count":2,"title":["The MODHEL microcomputer for RISCS study"],"prefix":"10.1016","volume":"12","author":[{"given":"Helnye","family":"Azaria","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daniel","family":"Tabak","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(83)90097-2_BIB1","series-title":"Advances in Computer Architecture","author":"Myers","year":"1982"},{"issue":"No. 9","key":"10.1016\/0165-6074(83)90097-2_BIB2","doi-asserted-by":"crossref","first-page":"553","DOI":"10.1145\/358746.358747","article-title":"Computer Architecture: Some Old Ideas that haven't quite Made it yet","volume":"Vol. 24","author":"Denning","year":"1980","journal-title":"Comm. of ACM"},{"issue":"No. 2","key":"10.1016\/0165-6074(83)90097-2_BIB3","doi-asserted-by":"crossref","first-page":"8","DOI":"10.1109\/MM.1982.290936","article-title":"A Unique Microprocessor Instruction Set","volume":"Vol. 2","author":"Fairclough","year":"1982","journal-title":"IEEE Micro"},{"issue":"No. 12","key":"10.1016\/0165-6074(83)90097-2_BIB4","doi-asserted-by":"crossref","first-page":"30","DOI":"10.1109\/MSPEC.1981.6369700","article-title":"More Hardware Means Less Software","volume":"Vol. 18","author":"Bernhard","year":"1981","journal-title":"IEEE Spectrum"},{"key":"10.1016\/0165-6074(83)90097-2_BIB5","first-page":"97","article-title":"Retrospective on High-Level Language Computer Architecture","volume":"Vol. 13","author":"Ditzel","year":"1980","journal-title":"Computer"},{"issue":"No. 4","key":"10.1016\/0165-6074(83)90097-2_BIB6","doi-asserted-by":"crossref","first-page":"9","DOI":"10.1109\/MM.1982.291014","article-title":"Assessing RISC's in High-Level Language Support","volume":"Vol. 2","author":"Patterson","year":"1982","journal-title":"IEEE Micro"},{"issue":"No. 6","key":"10.1016\/0165-6074(83)90097-2_BIB7","doi-asserted-by":"crossref","first-page":"25","DOI":"10.1145\/641914.641917","article-title":"The Case for the Reduced Instruction Set","volume":"Vol. 8","author":"Patterson","year":"1980","journal-title":"Computer Architecture News"},{"issue":"No. 9","key":"10.1016\/0165-6074(83)90097-2_BIB8","doi-asserted-by":"crossref","first-page":"8","DOI":"10.1109\/MC.1982.1654133","article-title":"A VLSI RISC","volume":"Vol. 15","author":"Patterson","year":"1982","journal-title":"Computer"},{"key":"10.1016\/0165-6074(83)90097-2_BIB9","series-title":"Proc. 8th Ann. Symp. on Computer Architecture","first-page":"443","article-title":"RISCI: A Reduced Instruction Set VLSI Computer","author":"Patterson","year":"1981"},{"key":"10.1016\/0165-6074(83)90097-2_BIB10","first-page":"8","article-title":"D.A. Patterson, \u201cA RISCy Approach to Computer Design\u201d, Proc. COMPCON, Spring 82, San Francisco, pp. 8\u201314.","author":"Patterson"},{"issue":"No. 4","key":"10.1016\/0165-6074(83)90097-2_BIB11","first-page":"14","article-title":"A RISCy Approach to VLSI","volume":"Vol. 2","author":"Fitzpatrick","year":"1981","journal-title":"VLSI Design"},{"issue":"No. 2","key":"10.1016\/0165-6074(83)90097-2_BIB12","doi-asserted-by":"crossref","first-page":"44","DOI":"10.1109\/TC.1980.1675534","article-title":"Design Considerations for Single-Chip Computers of the Future","volume":"Vol. C-29","author":"Patterson","year":"1980","journal-title":"IEEE Transactions on Computers"},{"key":"10.1016\/0165-6074(83)90097-2_BIB13","series-title":"Microprocessing and Microprogramming, EUROMICRO 76","first-page":"7","article-title":"The Architecture of a Simple, Effective, Control Processor","author":"Lipovski","year":"1976"},{"key":"10.1016\/0165-6074(83)90097-2_BIB14","series-title":"Proc. 2nd Rocky Mountain Symp. on Micro Computers","first-page":"63","article-title":"On Conditional Moves in Control Processors","author":"Lipovski","year":"1978"},{"issue":"No. 2","key":"10.1016\/0165-6074(83)90097-2_BIB15","doi-asserted-by":"crossref","first-page":"180","DOI":"10.1109\/TC.1980.1675541","article-title":"MOVE Architecture in Digital Controllers","volume":"Vol. C-29","author":"Tabak","year":"1980","journal-title":"IEEE Trans. on Computers"},{"issue":"No. 6","key":"10.1016\/0165-6074(83)90097-2_BIB16","doi-asserted-by":"crossref","first-page":"373","DOI":"10.1016\/0303-1268(80)90082-6","article-title":"Bit-Sliced Realization of a CMOVE Architecture Microcomputer","volume":"Vol. 6","author":"Azaria","year":"1980","journal-title":"Euromicro J."},{"key":"10.1016\/0165-6074(83)90097-2_BIB17","article-title":"Design Considerations of a Single-Instruction Microcomputer \u2014 A Case Study","volume":"Vol. 11","author":"Azaria","year":"1983","journal-title":"Euromicro J."},{"key":"10.1016\/0165-6074(83)90097-2_BIB18","series-title":"Melecon 83","article-title":"Quantitative Performance Evaluation of CMOVE Microprocessor Architecture","author":"Azaria","year":"1983"},{"key":"10.1016\/0165-6074(83)90097-2_BIB19","series-title":"Implementing Functions, Euromicro 81","first-page":"17","article-title":"ACMOVE Distributed Processing System","author":"Azaria","year":"1981"},{"key":"10.1016\/0165-6074(83)90097-2_BIB20","series-title":"Reliability in Electrical and Electronic Components and Systems, Eurocon 82","first-page":"613","article-title":"Failure Tolerance of a Distributed Processing System","author":"Azaria","year":"1982"},{"key":"10.1016\/0165-6074(83)90097-2_BIB21","series-title":"Computer Structures: Principles and Examples","author":"Siewiorek","year":"1982"},{"key":"10.1016\/0165-6074(83)90097-2_BIB22","article-title":"Simulation and Performance Evaluation of the RISC Architecture","author":"Tamir","year":"1981"},{"key":"10.1016\/0165-6074(83)90097-2_BIB23","series-title":"Proc. COMPCON","first-page":"2","article-title":"The MIPS Machine","author":"Hennessy","year":"1982"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607483900972?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607483900972?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,3,14]],"date-time":"2019-03-14T22:50:42Z","timestamp":1552603842000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0165607483900972"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1983,10]]},"references-count":23,"journal-issue":{"issue":"3-4","published-print":{"date-parts":[[1983,10]]}},"alternative-id":["0165607483900972"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(83)90097-2","relation":{},"ISSN":["0165-6074"],"issn-type":[{"value":"0165-6074","type":"print"}],"subject":[],"published":{"date-parts":[[1983,10]]}}}