{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T17:38:58Z","timestamp":1743010738757},"reference-count":7,"publisher":"Elsevier BV","issue":"1-5","license":[{"start":{"date-parts":[[1989,8,1]],"date-time":"1989-08-01T00:00:00Z","timestamp":617932800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1989,8]]},"DOI":"10.1016\/0165-6074(89)90023-9","type":"journal-article","created":{"date-parts":[[2003,9,3]],"date-time":"2003-09-03T17:14:48Z","timestamp":1062609288000},"page":"69-75","source":"Crossref","is-referenced-by-count":2,"title":["Partitioning of digital designs: a knowledge based approach and concepts for its parallelization"],"prefix":"10.1016","volume":"27","author":[{"given":"Martin","family":"Hulin","sequence":"first","affiliation":[]},{"given":"Jochen","family":"Heistermann","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(89)90023-9_BIB1","first-page":"107","article-title":"An Expert System for Mapping Computer Architectures into Simicustom Integrated Circuits","volume":"18","author":"Hulin","year":"1986"},{"key":"10.1016\/0165-6074(89)90023-9_BIB2","unstructured":"Schmitter, E. D.: Praktische Einf\u00fchrung in LISP. Hofacker, Holzkirchen Singapur Los Angeles"},{"key":"10.1016\/0165-6074(89)90023-9_BIB3","unstructured":"Garey, M. R., Johnson, D. S.: Computers and Intractability. A Guide to the Theory of NP-Completeness. W. H. Freeman and Compony, New York"},{"key":"10.1016\/0165-6074(89)90023-9_BIB4","series-title":"Proc. 14th. Design Automation Conference","first-page":"284","article-title":"A Class of Min-Cut Placement Algorithms","author":"Breuer","year":"1977"},{"key":"10.1016\/0165-6074(89)90023-9_BIB5","unstructured":"Gupta, N.: Knowledge-Based Interactive Design Partitioning Environment. Technical Report RTL-87-TR-095. Siemens Research and Technology Laboratories. Princeton, New Jersey"},{"key":"10.1016\/0165-6074(89)90023-9_BIB6","first-page":"3","article-title":"Partionierung digitaler Schaltungen auf vorgegebene physikalische Einheiten","author":"Heistermann","year":"1988","journal-title":"Informatik Forschung und Entwicklung"},{"key":"10.1016\/0165-6074(89)90023-9_BIB7","unstructured":"Mouleswaaran, C.: CHIPEX: An Automatic Partitioning System for Digital Designs. Technical Report RTL-87-TR-148. Siemens Research and Technology Laboratories, Princeton, New Jersey"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607489900239?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607489900239?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,2,25]],"date-time":"2019-02-25T09:58:26Z","timestamp":1551088706000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0165607489900239"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1989,8]]},"references-count":7,"journal-issue":{"issue":"1-5","published-print":{"date-parts":[[1989,8]]}},"alternative-id":["0165607489900239"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(89)90023-9","relation":{},"ISSN":["0165-6074"],"issn-type":[{"value":"0165-6074","type":"print"}],"subject":[],"published":{"date-parts":[[1989,8]]}}}