{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T04:32:32Z","timestamp":1648528352279},"reference-count":22,"publisher":"Elsevier BV","issue":"1-5","license":[{"start":{"date-parts":[[1989,8,1]],"date-time":"1989-08-01T00:00:00Z","timestamp":617932800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1989,8]]},"DOI":"10.1016\/0165-6074(89)90060-4","type":"journal-article","created":{"date-parts":[[2003,9,3]],"date-time":"2003-09-03T17:14:48Z","timestamp":1062609288000},"page":"279-286","source":"Crossref","is-referenced-by-count":0,"title":["Description and verification of more-dimensional regular and non-homogeneous structures using a functional hardware description language"],"prefix":"10.1016","volume":"27","author":[{"given":"W.","family":"Ploegaerts","sequence":"first","affiliation":[]},{"given":"D.","family":"Verkest","sequence":"additional","affiliation":[]},{"given":"L.","family":"Claesen","sequence":"additional","affiliation":[]},{"given":"H.","family":"De Man","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(89)90060-4_BIB1","first-page":"73","article-title":"CATHEDRAL-II: A Silicon Compiler for Digital Signal Processing","author":"De Man","year":"1986","journal-title":"IEEE Design & Test of Computers"},{"key":"10.1016\/0165-6074(89)90060-4_BIB2","article-title":"Electrical, Timing and Behavioral Verification in the Meet-in-the-Middle MOSVLSI Design Environment of CATHEDRAL II","volume":"ICCD-87","author":"Claesen","year":"1987"},{"key":"10.1016\/0165-6074(89)90060-4_BIB3","article-title":"\u03bcFP - An Algebraic VLSI Design Language","author":"Sheeran","year":"1983","journal-title":"Oxford University Computing Laboratory, Technical Monograph PRG-39"},{"key":"10.1016\/0165-6074(89)90060-4_BIB4","doi-asserted-by":"crossref","DOI":"10.1007\/3-540-18540-2","article-title":"Semantics of Digital Circuits","volume":"285","author":"Kloos","year":"1987","journal-title":"Lecture Notes in Computer Science"},{"key":"10.1016\/0165-6074(89)90060-4_BIB5","series-title":"Proceedings IEEE Compeuro conference 88","first-page":"9","article-title":"Generalized Combinators in Functional Languages and Their Applications","author":"De Man","year":"1988"},{"key":"10.1016\/0165-6074(89)90060-4_BIB6","series-title":"Proceedings IEEE Compeuro conference 88","first-page":"90","article-title":"Guided Synthesis and Formal Verification Techniques for Parameterized Hardware Modules","author":"Claesen","year":"1988"},{"key":"10.1016\/0165-6074(89)90060-4_BIB7","series-title":"The fusion of Hardware Design and Verification","article-title":"Formal Techniques for Proving Correctness of Parametrized Hardware using Correctness Preserving Transformations","author":"Verkest","year":"1988"},{"key":"10.1016\/0165-6074(89)90060-4_BIB8","series-title":"Engineering thesis","article-title":"Computer aided synthesis of parameterized VLSI hardware modules","author":"Johannes","year":"1987"},{"key":"10.1016\/0165-6074(89)90060-4_BIB9","first-page":"247","article-title":"Formal Verification of hardware correctness: an introduction","volume":"CHDL-87","author":"Camurati","year":"1987"},{"key":"10.1016\/0165-6074(89)90060-4_BIB10","series-title":"A Computational Logic","author":"Boyer","year":"1979"},{"key":"10.1016\/0165-6074(89)90060-4_BIB11","first-page":"153","article-title":"Why higher-order logic is good formalism fo specifying and verifying hardware","author":"Gordon","year":"1985"},{"issue":"n\u00b0 1","key":"10.1016\/0165-6074(89)90060-4_BIB12","doi-asserted-by":"crossref","first-page":"118","DOI":"10.1145\/42192.45067","article-title":"System Semantics: Principles, Applications and Implementation","volume":"Vol. 10","author":"Boute","year":"1988","journal-title":"ACM Transactions on Prog. Lang. and Sys."},{"key":"10.1016\/0165-6074(89)90060-4_BIB13","unstructured":"R.T.Boute, \u2018Representation and denotational sematics of digital systems\u2019, to be published in iEEE Trans. on Comp."},{"key":"10.1016\/0165-6074(89)90060-4_BIB14","article-title":"HILARICS: User's Manual","author":"Vanden Meersch","year":"1986"},{"key":"10.1016\/0165-6074(89)90060-4_BIB15","doi-asserted-by":"crossref","unstructured":"R. Oolman, M. Seutter, \u2018GLASS A language for Analog and Digital Circuit Description and its Environment\u2019, this volume","DOI":"10.1016\/0165-6074(89)90058-6"},{"key":"10.1016\/0165-6074(89)90060-4_BIB16","unstructured":"R.T.Boute, L.Clasesen et al., \u2018Application of System Semantics to VLSI for the Transformational Design of a Parametrized Booth Multiplier Module\u2019, this volume."},{"key":"10.1016\/0165-6074(89)90060-4_BIB17","series-title":"Mathematics and Computer Science. Proc. CWI, Symp.","article-title":"Algorithms: Towards programming as a mathematical activity","volume":"Vol. 1","author":"Meertens","year":"1986"},{"key":"10.1016\/0165-6074(89)90060-4_BIB18","doi-asserted-by":"crossref","first-page":"8","DOI":"10.1145\/359576.359579","article-title":"Can programming be liberated from the van Neuman Style? A functional style and its Algebra of Programs","volume":"21","author":"Backus","year":"1978","journal-title":"Comm. of the ACM"},{"key":"10.1016\/0165-6074(89)90060-4_BIB19","unstructured":"J.De Man, J. Vanslembrouck, \u2018Transformational Design of Digital Circuits\u2019. this volume."},{"key":"10.1016\/0165-6074(89)90060-4_BIB20","unstructured":"R.T.Boute, \u2018Syntactic and Semantic Aspects of Formal Circuit Description\u2019, this volume."},{"key":"10.1016\/0165-6074(89)90060-4_BIB21","article-title":"A Functional Approach to the Description and Verification of the Accumulator-Multiplier Module","author":"Ploegaerts","year":"1989","journal-title":"Internal Report Imec"},{"key":"10.1016\/0165-6074(89)90060-4_BIB22","doi-asserted-by":"crossref","first-page":"1014","DOI":"10.1109\/T-C.1975.224114","article-title":"A Proof of the Modified Booth alogrithm for Multiplication","author":"Rubensfield","year":"1975","journal-title":"IEEE Trans. on Computers"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607489900604?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607489900604?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,2,25]],"date-time":"2019-02-25T09:57:53Z","timestamp":1551088673000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0165607489900604"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1989,8]]},"references-count":22,"journal-issue":{"issue":"1-5","published-print":{"date-parts":[[1989,8]]}},"alternative-id":["0165607489900604"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(89)90060-4","relation":{},"ISSN":["0165-6074"],"issn-type":[{"value":"0165-6074","type":"print"}],"subject":[],"published":{"date-parts":[[1989,8]]}}}