{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,9,4]],"date-time":"2023-09-04T19:56:14Z","timestamp":1693857374788},"reference-count":23,"publisher":"Elsevier BV","issue":"1-5","license":[{"start":{"date-parts":[[1990,8,1]],"date-time":"1990-08-01T00:00:00Z","timestamp":649468800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1990,8]]},"DOI":"10.1016\/0165-6074(90)90226-y","type":"journal-article","created":{"date-parts":[[2003,9,3]],"date-time":"2003-09-03T17:14:48Z","timestamp":1062609288000},"page":"109-116","source":"Crossref","is-referenced-by-count":2,"title":["The interactive space-time scheduler"],"prefix":"10.1016","volume":"30","author":[{"given":"Bj\u00f6rn","family":"Lisper","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(90)90226-Y_BIB1","doi-asserted-by":"crossref","first-page":"15","DOI":"10.1109\/MC.1982.1653938","article-title":"Data flow languages","volume":"15","author":"Ackerman","year":"1982","journal-title":"Computer"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB2","article-title":"Computer aided hardware design by space-time mappings","author":"Avatare","year":"1989"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB3","doi-asserted-by":"crossref","first-page":"201","DOI":"10.1016\/0743-7315(89)90018-X","article-title":"The SDEF programming system","volume":"7","author":"Engstrom","year":"1989","journal-title":"J. Parallel Distrib. Comput."},{"issue":"1\u20135","key":"10.1016\/0165-6074(90)90226-Y_BIB4","first-page":"305","article-title":"A general framework for extraction of VLSI pipeline structures","volume":"28","author":"Fjellborg","year":"1990","journal-title":"The Euromicro Journal"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB5","series-title":"Systolic Arrays","first-page":"25","article-title":"Synthesizing systolic arrays using DIASTOL","author":"Gachet","year":"1987"},{"issue":"11","key":"10.1016\/0165-6074(90)90226-Y_BIB6","doi-asserted-by":"crossref","first-page":"1015","DOI":"10.1109\/T-C.1970.222826","article-title":"A pipeline fast fourier transform","volume":"C-19","author":"Groginsky","year":"1970","journal-title":"IEEE Trans. Comput."},{"key":"10.1016\/0165-6074(90)90226-Y_BIB7","doi-asserted-by":"crossref","first-page":"595","DOI":"10.1007\/BF00282618","article-title":"The derivation of systolic implementations of programs","volume":"24","author":"Huang","year":"1987","journal-title":"Acta Inform."},{"key":"10.1016\/0165-6074(90)90226-Y_BIB8","series-title":"Proc. Second Caltech Conf. on VLSI","first-page":"378","article-title":"Towards a formal treatment of VLSI arrays","author":"Johnsson","year":"1981"},{"issue":"3","key":"10.1016\/0165-6074(90)90226-Y_BIB9","doi-asserted-by":"crossref","first-page":"563","DOI":"10.1145\/321406.321418","article-title":"The organization of computations for uniform recurrence equations","volume":"14","author":"Karp","year":"1967","journal-title":"J. Assoc. Comput. Mach."},{"key":"10.1016\/0165-6074(90)90226-Y_BIB10","first-page":"247","article-title":"Optimal designs of linear flow systolic architectures","author":"Kothari","year":"1989"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB11","doi-asserted-by":"crossref","first-page":"37","DOI":"10.1109\/MC.1982.1653825","article-title":"Why systolic architectures?","volume":"15","author":"Kung","year":"1982","journal-title":"Computer"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB12","series-title":"Introduction to VLSI systems","author":"Kung","year":"1980"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB13","unstructured":"B. Lisper. Synthesis of time-optimal systolic arrays with cells with inner structure. To appear in J. Parallel Distrib. Comput."},{"key":"10.1016\/0165-6074(90)90226-Y_BIB14","doi-asserted-by":"crossref","first-page":"183","DOI":"10.1016\/0304-3975(88)90026-6","article-title":"Synthesis and equivalence of concurrent systems","volume":"58","author":"Lisper","year":"1988","journal-title":"Theoret. Comput. Sci."},{"key":"10.1016\/0165-6074(90)90226-Y_BIB15","author":"Lisper","year":"1989"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB16","article-title":"OREGAMI: Software tools for mapping parallel computations to parallel architectures","author":"Lo","year":"1989"},{"issue":"1","key":"10.1016\/0165-6074(90)90226-Y_BIB17","doi-asserted-by":"crossref","first-page":"33","DOI":"10.1109\/TCAD.1987.1270243","article-title":"ADVIS: A software package for the design of systolic arrays","volume":"CAD-6","author":"Moldovan","year":"1987","journal-title":"IEEE Trans. on Computer-Aided Design"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB18","first-page":"559","article-title":"A systematic method for mapping algorithms of arbitrarily large dimensions onto fixed size systolic arrays","volume":"vol. 2","author":"Nelis","year":"1987"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB19","article-title":"Automatic design of systolic chips","author":"Quinton","year":"1985"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB20","doi-asserted-by":"crossref","first-page":"384","DOI":"10.1016\/S0022-0000(75)80008-0","article-title":"NP-complete scheduling problems","volume":"10","author":"Ullman","year":"1975","journal-title":"J. Comput. System Sci."},{"key":"10.1016\/0165-6074(90)90226-Y_BIB21","series-title":"Proc. IMEC-IFIP Workshop on Formal Methods for Correct VLSI Design","first-page":"443","article-title":"PRESAGE: A tool for the parallelization of nested loop programs","author":"Van Dongen","year":"1989"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB22","series-title":"Proc. 26th Allerton Conf. on Communication, Control and Computing","first-page":"1104","article-title":"Optimization of computation time for systolic arrays","author":"Wong","year":"1988"},{"key":"10.1016\/0165-6074(90)90226-Y_BIB23","article-title":"Optimization of processor count for systolic arrays","author":"Wong","year":"1989"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:016560749090226Y?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:016560749090226Y?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,2,25]],"date-time":"2019-02-25T10:21:07Z","timestamp":1551090067000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/016560749090226Y"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1990,8]]},"references-count":23,"journal-issue":{"issue":"1-5","published-print":{"date-parts":[[1990,8]]}},"alternative-id":["016560749090226Y"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(90)90226-y","relation":{},"ISSN":["0165-6074"],"issn-type":[{"value":"0165-6074","type":"print"}],"subject":[],"published":{"date-parts":[[1990,8]]}}}