{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,2,11]],"date-time":"2023-02-11T15:27:52Z","timestamp":1676129272156},"reference-count":14,"publisher":"Elsevier BV","issue":"1-5","license":[{"start":{"date-parts":[[1990,8,1]],"date-time":"1990-08-01T00:00:00Z","timestamp":649468800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1990,8]]},"DOI":"10.1016\/0165-6074(90)90227-z","type":"journal-article","created":{"date-parts":[[2003,9,3]],"date-time":"2003-09-03T17:14:48Z","timestamp":1062609288000},"page":"117-124","source":"Crossref","is-referenced-by-count":3,"title":["Stepwise decomposition in controlpath synthesis"],"prefix":"10.1016","volume":"30","author":[{"given":"A.J.W.M","family":"ten Berg","sequence":"first","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(90)90227-Z_BIB1","series-title":"Design Systems for VLSI circuits","first-page":"197","article-title":"Algorithms for multi-level logic synthesis and optimization","author":"Brayton","year":"1987"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB2","article-title":"Algorithmische entwurfsverfahren fuer kombinierte pla\/rom-steuerwerke unter verwendung van zaehlern","author":"Amann","year":"1987"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB3","doi-asserted-by":"crossref","first-page":"269","DOI":"10.1109\/TCAD.1985.1270123","article-title":"Optimal State Assignment for Finite State Machines","volume":"vol. CAD-4","author":"DeMicheli","year":"1985","journal-title":"IEEE Trans. Comp. Aided Design"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB4","doi-asserted-by":"crossref","first-page":"163","DOI":"10.1016\/0165-6074(82)90096-5","article-title":"Efficiency and Performance Comparison of Different Design Methodologies for Control Parts of Microprocessors","volume":"10","author":"Obrebska","year":"1982","journal-title":"Microprocessing and Microprogramming"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB5","series-title":"Logic and Architecture Synthesis for Silicon Compilers","first-page":"255","article-title":"Design of an Application specific Microprocessor","author":"Leveugle","year":"1989"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB6","series-title":"Proceedings of the 11th Annual Microprogramming Workshop.","first-page":"8","article-title":"Microprogrammed Implementation of a Single Chip Microprocessor","author":"Stritter","year":"1978"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB7","series-title":"Digital System Implementation","author":"Blaauw","year":"1976"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB8","doi-asserted-by":"crossref","first-page":"33","DOI":"10.1016\/0165-6074(88)90331-6","article-title":"Processor Control Part Synthesis Using Effective Partitioning Algorithms","volume":"23","author":"Mahler","year":"1988","journal-title":"Microprocessing and Microprogramming"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB9","doi-asserted-by":"crossref","first-page":"15","DOI":"10.1016\/0165-6074(83)90112-6","article-title":"A Synthesis System for PLA-Based Programmable Hardware","volume":"12","author":"Grass","year":"1983","journal-title":"Microprocessing and Microprogramming"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB10","series-title":"Algebraic Structure Theory of Sequential Machines","author":"Hartmanis","year":"1966"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB11","series-title":"Proceedings of the second Symposium on Design Methodology","first-page":"67","article-title":"Floorplan driven Controlpath Synthesis","author":"Berg","year":"1990"},{"key":"10.1016\/0165-6074(90)90227-Z_BIB12","doi-asserted-by":"crossref","first-page":"465","DOI":"10.1016\/0165-6074(89)90093-8","article-title":"Synthesis of Control Units in a Design Environment for Chip Architecture","volume":"27","author":"Gessner","year":"1989","journal-title":"Microprocessing and Microprogramming"},{"issue":"no. 6","key":"10.1016\/0165-6074(90)90227-Z_BIB13","doi-asserted-by":"crossref","first-page":"557","DOI":"10.1109\/TC.1983.1676278","article-title":"Experiments in Automatic Microcode Generation","volume":"vol. c-32","author":"Sheraga","year":"1983","journal-title":"IEEE Trans. on Computers"},{"issue":"no. 7","key":"10.1016\/0165-6074(90)90227-Z_BIB14","doi-asserted-by":"crossref","first-page":"460","DOI":"10.1109\/TC.1981.1675826","article-title":"Some Experiments in Local Microcode Compaction for Horizontal Machines","volume":"vol. c-30","author":"Davidson","year":"1981","journal-title":"IEEE Trans. on Computers"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:016560749090227Z?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:016560749090227Z?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,2,25]],"date-time":"2019-02-25T10:21:06Z","timestamp":1551090066000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/016560749090227Z"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1990,8]]},"references-count":14,"journal-issue":{"issue":"1-5","published-print":{"date-parts":[[1990,8]]}},"alternative-id":["016560749090227Z"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(90)90227-z","relation":{},"ISSN":["0165-6074"],"issn-type":[{"value":"0165-6074","type":"print"}],"subject":[],"published":{"date-parts":[[1990,8]]}}}