{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,12,13]],"date-time":"2024-12-13T17:40:01Z","timestamp":1734111601517,"version":"3.30.2"},"reference-count":6,"publisher":"Elsevier BV","issue":"1-5","license":[{"start":{"date-parts":[[1993,1,1]],"date-time":"1993-01-01T00:00:00Z","timestamp":725846400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1993,1]]},"DOI":"10.1016\/0165-6074(93)90005-6","type":"journal-article","created":{"date-parts":[[2003,9,3]],"date-time":"2003-09-03T17:14:48Z","timestamp":1062609288000},"page":"11-14","source":"Crossref","is-referenced-by-count":1,"title":["Pr\u00e9forme\/aGAPE: a synergy between symbolic cell design and assembly"],"prefix":"10.1016","volume":"37","author":[{"given":"J.-F.","family":"Naviner","sequence":"first","affiliation":[]},{"given":"J.-C.","family":"Dufourd","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(93)90005-6_BIB1","unstructured":"DG BOYER \u201cSymbolic Layout Compaction Benchmarks \u2014 Introduction and Ground Rules\u201d Proc. ICCD 87, pp. 186\u2013191"},{"key":"10.1016\/0165-6074(93)90005-6_BIB2","unstructured":"\u201cSymbolic Layout Compaction Benchmarks \u2014 Results\u201d Proc. ICCD 87, pp. 209\u2013217"},{"key":"10.1016\/0165-6074(93)90005-6_BIB3","doi-asserted-by":"crossref","unstructured":"JC DUFOURD, JF NAVINER & F JUTAND \u201cPREFORM: a process independent symbolic layout system\u201d Proceedings ICCAD 90, pp. 248\u2013251","DOI":"10.1109\/ICCAD.1990.129893"},{"key":"10.1016\/0165-6074(93)90005-6_BIB4","unstructured":"JC DUFOURD, JF NAVINER & Y MATHIEU \u201caGAPE: a Graphical Assembly Prototype Editor\u201d Proc. WG 10.5 IFIP Workshop on Synthesis, Generation and Portability of Library Blocks for ASIC Design, pp. 82\u201387"},{"key":"10.1016\/0165-6074(93)90005-6_BIB5","unstructured":"JF NAVINER \u201cPr\u00e9forme: \u00e9tude et d\u00e9veloppement d'une m\u00e9thode de conception symbolique de cellules ind\u00e9pendantes de la technologie\u201d PHD thesis (in french) Telecom Paris"},{"key":"10.1016\/0165-6074(93)90005-6_BIB6","doi-asserted-by":"crossref","unstructured":"H SHIN & CY LO \u201cAn Efficient Two-Dimensional Compaction Algorithm\u201d Proc. DAC 89, pp. 290\u2013295","DOI":"10.1145\/74382.74431"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607493900056?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607493900056?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2024,12,13]],"date-time":"2024-12-13T17:10:31Z","timestamp":1734109831000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0165607493900056"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993,1]]},"references-count":6,"journal-issue":{"issue":"1-5","published-print":{"date-parts":[[1993,1]]}},"alternative-id":["0165607493900056"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(93)90005-6","relation":{},"ISSN":["0165-6074"],"issn-type":[{"type":"print","value":"0165-6074"}],"subject":[],"published":{"date-parts":[[1993,1]]}}}