{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T13:27:42Z","timestamp":1649078862474},"reference-count":29,"publisher":"Elsevier BV","issue":"1-5","license":[{"start":{"date-parts":[[1993,9,1]],"date-time":"1993-09-01T00:00:00Z","timestamp":746841600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1993,9]]},"DOI":"10.1016\/0165-6074(93)90116-3","type":"journal-article","created":{"date-parts":[[2003,9,3]],"date-time":"2003-09-03T17:14:48Z","timestamp":1062609288000},"page":"1-11","source":"Crossref","is-referenced-by-count":2,"title":["Petri Nets applied to the modelling and analysis of computer architecture problems"],"prefix":"10.1016","volume":"38","author":[{"given":"M","family":"Silva","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.M","family":"Colom","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(93)90116-3_BIB1","first-page":"541","article-title":"Petri nets: properties, analysis, and applications","volume":"77","author":"Murata","year":"1980"},{"key":"10.1016\/0165-6074(93)90116-3_BIB2","series-title":"Practice of Petri Nets in Manufacturing","article-title":"Introducing Petri Nets","author":"Silva","year":"1993"},{"key":"10.1016\/0165-6074(93)90116-3_BIB3","series-title":"High-level Petri Nets. Theory and Application","year":"1991"},{"key":"10.1016\/0165-6074(93)90116-3_BIB4","series-title":"Advances in Petri Nets 1986 - Part I","first-page":"168","article-title":"Structure Theory of Petri Nets: The free choice hiatus","author":"Best","year":"1987"},{"key":"10.1016\/0165-6074(93)90116-3_BIB5","series-title":"Advances in Petri Nets 1988","first-page":"386","article-title":"On the computation of structural synchronic invariants in P\/T nets","author":"Silva","year":"1988"},{"key":"10.1016\/0165-6074(93)90116-3_BIB6","series-title":"Advances in Petri Nets 1990","first-page":"113","article-title":"On the analysis and synthesis of free choice systems","author":"Esparza","year":"1991"},{"key":"10.1016\/0165-6074(93)90116-3_BIB7","series-title":"Procs. of the International Workshop on Timed Petri Nets","year":"1985"},{"key":"10.1016\/0165-6074(93)90116-3_BIB8","series-title":"Procs. of the International Workshop on Petri Nets and Performance Models","year":"1987"},{"key":"10.1016\/0165-6074(93)90116-3_BIB9","series-title":"Procs. of the 3rd International Workshop on Petri Nets and Performance Models","year":"1989"},{"key":"10.1016\/0165-6074(93)90116-3_BIB10","series-title":"Procs. of the 4th International Workshop on Petri Nets and Performance Models","year":"1991"},{"key":"10.1016\/0165-6074(93)90116-3_BIB11","series-title":"Performance Models of Multiprocessor Systems","author":"Ajmone Marsan","year":"1986"},{"key":"10.1016\/0165-6074(93)90116-3_BIB12","article-title":"Equivalence, reversibility and symmetry properties in fork\/join queueing networks with blocking","author":"Dallery","year":"1990"},{"issue":"N. 12","key":"10.1016\/0165-6074(93)90116-3_BIB13","doi-asserted-by":"crossref","first-page":"1368","DOI":"10.1109\/9.106153","article-title":"Properties and performance bounds for closed free choice synchronized monoclass queueing networks","volume":"Vol. 36","author":"Campos","year":"1991","journal-title":"IEEE Transactions on Automatic Control"},{"key":"10.1016\/0165-6074(93)90116-3_BIB14","series-title":"Advances in Petri Nets 1992","first-page":"352","article-title":"Structural techniques and performance bounds of stochastic Petri net models","author":"Campos","year":"1992"},{"key":"10.1016\/0165-6074(93)90116-3_BIB15","doi-asserted-by":"crossref","first-page":"282","DOI":"10.1016\/0743-7315(92)90009-C","article-title":"Approximate throughput computation of stochastic marked graphs","volume":"15","author":"Jungnitz","year":"1992","journal-title":"Journal of Parallel and Distributed Computing"},{"key":"10.1016\/0165-6074(93)90116-3_BIB16","series-title":"Sparse Matrix Proceedings","first-page":"256","article-title":"Systolic arrays (for VLSI)","author":"Kung","year":"1978"},{"issue":"No. 1","key":"10.1016\/0165-6074(93)90116-3_BIB17","doi-asserted-by":"crossref","first-page":"37","DOI":"10.1109\/MC.1982.1653825","article-title":"Why Systolic Architectures","volume":"Vol. 15","author":"Kung","year":"1982","journal-title":"IEEE Computer"},{"key":"10.1016\/0165-6074(93)90116-3_BIB18","doi-asserted-by":"crossref","first-page":"18","DOI":"10.1109\/MC.1987.1663617","article-title":"Wavefront Array Processors: Concept and Implementation","author":"Kung","year":"1987","journal-title":"IEEE Computer"},{"issue":"No. 5","key":"10.1016\/0165-6074(93)90116-3_BIB19","doi-asserted-by":"crossref","first-page":"386","DOI":"10.1109\/81.139289","article-title":"Properties and performance bounds for timed marked graphs","volume":"Vol. 39","author":"Campos","year":"1992","journal-title":"IEEE Transactions on Circuits and Systems - I: Fundamental Theory and Applications"},{"key":"10.1016\/0165-6074(93)90116-3_BIB20","doi-asserted-by":"crossref","DOI":"10.1016\/0166-5316(93)90024-O","article-title":"Embedded product-form queueing networks and the improvement of performance bounds for Petri net systems","volume":"Vol. 18","author":"Campos","year":"1993","journal-title":"Performance Evaluation"},{"key":"10.1016\/0165-6074(93)90116-3_BIB21","series-title":"Cuadernos de Bioestad\u00edstica y sus Aplicaciones Inform\u00e1ticas (Actas de la XII Reuni\u00f3n S.E.I.O.E.I., Jaca 1980)","first-page":"728","article-title":"Aut\u00f3mata Programable Multicomputador. Valoraci\u00f3n de su capacidad de tratamiento","author":"Silva","year":"1984"},{"issue":"3","key":"10.1016\/0165-6074(93)90116-3_BIB22","doi-asserted-by":"crossref","first-page":"270","DOI":"10.1016\/0743-7315(92)90008-B","article-title":"Topology and Process Interaction in Concurrent Architectures: A GSPN Modeling Approach","volume":"15","author":"Caselli","year":"1992","journal-title":"Journal of Parallel and Distributed Computing"},{"issue":"3","key":"10.1016\/0165-6074(93)90116-3_BIB23","doi-asserted-by":"crossref","first-page":"171","DOI":"10.1016\/0743-7315(92)90002-5","article-title":"Understanding Parallel Programming Behaviour through Petri Net Models","volume":"15","author":"Balbo","year":"1992","journal-title":"Journal of Parallel and Distributed Computing"},{"key":"10.1016\/0165-6074(93)90116-3_BIB24","series-title":"Proc. of the 25th ACM\/IEEE Design Automation Conference","first-page":"548","article-title":"The use of Petri nets for modeling pipelined processors","author":"Razouk","year":"1988"},{"key":"10.1016\/0165-6074(93)90116-3_BIB25","series-title":"Advances in Petri Nets 89","first-page":"236","article-title":"Optimizing microprograms for recurrent loops on pipelined architectures using timed Petri Nets","author":"Hanen","year":"1988"},{"key":"10.1016\/0165-6074(93)90116-3_BIB26","series-title":"Procs. of the 4th International Workshop on Petri Nets and Performance Models","first-page":"2","article-title":"On the construction of abstract GSPNS: An exercise in Modeling","author":"Ajmone Marsan","year":"1991"},{"key":"10.1016\/0165-6074(93)90116-3_BIB27","series-title":"Advances in Petri Nets 1987","first-page":"1","article-title":"Specification and properties of a cache coherence protocol","author":"Girault","year":"1987"},{"issue":"No. 2","key":"10.1016\/0165-6074(93)90116-3_BIB28","doi-asserted-by":"crossref","first-page":"221","DOI":"10.1109\/71.127262","article-title":"An example of modeling and evaluation of a concurrent program using colored stochastic Petri nets: Lamport's fast mutual exclusion algorithm","volume":"Vol. 3","author":"Balbo","year":"1992","journal-title":"IEEE Transactions on Parallel and Distributed Systems"},{"key":"10.1016\/0165-6074(93)90116-3_BIB29","series-title":"High-level Petri Nets. Theory and Application","first-page":"224","article-title":"Validation of a VLSI chip using hierarchical coloured Petri nets","author":"Shapiro","year":"1991"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607493901163?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607493901163?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,2,25]],"date-time":"2019-02-25T10:25:49Z","timestamp":1551090349000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0165607493901163"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993,9]]},"references-count":29,"journal-issue":{"issue":"1-5","published-print":{"date-parts":[[1993,9]]}},"alternative-id":["0165607493901163"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(93)90116-3","relation":{},"ISSN":["0165-6074"],"issn-type":[{"value":"0165-6074","type":"print"}],"subject":[],"published":{"date-parts":[[1993,9]]}}}