{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T10:58:37Z","timestamp":1649069917038},"reference-count":28,"publisher":"Elsevier BV","issue":"1-5","license":[{"start":{"date-parts":[[1993,9,1]],"date-time":"1993-09-01T00:00:00Z","timestamp":746841600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1993,9]]},"DOI":"10.1016\/0165-6074(93)90128-8","type":"journal-article","created":{"date-parts":[[2003,9,3]],"date-time":"2003-09-03T17:14:48Z","timestamp":1062609288000},"page":"71-78","source":"Crossref","is-referenced-by-count":2,"title":["X-Nets: A visual formalism for system specification and analysis"],"prefix":"10.1016","volume":"38","author":[{"given":"S.","family":"Antoniazzi","sequence":"first","affiliation":[]},{"given":"A.","family":"Balboni","sequence":"additional","affiliation":[]},{"given":"W.","family":"Fornaciari","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(93)90128-8_BIB1","series-title":"Proc. of EDAC'93","article-title":"Uncommitted Design of Digital Functions for Embedded Applications: State of the Art and Perspectives","author":"Antoniazzi","year":"1993"},{"issue":"No. 2","key":"10.1016\/0165-6074(93)90128-8_BIB2","doi-asserted-by":"crossref","DOI":"10.1109\/TSE.1986.6312936","article-title":"The Transformation Schema: An Extension of the Data Flow Diagram to Represent Control and Timing","volume":"Vol. 12","author":"Ward","year":"1986","journal-title":"IEEE Trans. on Software Engineering"},{"key":"10.1016\/0165-6074(93)90128-8_BIB3","article-title":"Statecharts: a Visual Formalism for Complex Systems","volume":"8","author":"Harel","year":"1987"},{"issue":"No. 4","key":"10.1016\/0165-6074(93)90128-8_BIB4","doi-asserted-by":"crossref","DOI":"10.1109\/32.54292","article-title":"STATEMATE: A Working Environment for the Development of Complex Reactive Systems","volume":"Vol. 16","author":"Harel","year":"1990","journal-title":"IEEE Trans. on Software Engineering"},{"issue":"No. 7","key":"10.1016\/0165-6074(93)90128-8_BIB5","doi-asserted-by":"crossref","DOI":"10.1109\/43.31537","article-title":"Using Statecharts for Hardware Description and Synthesis","volume":"Vol. 8","author":"Drusinsky","year":"1989","journal-title":"IEEE Trans. on CAD"},{"issue":"No. 4","key":"10.1016\/0165-6074(93)90128-8_BIB6","doi-asserted-by":"crossref","DOI":"10.1109\/54.173326","article-title":"System Specification with the SpecCharts Language","volume":"Vol. 9","author":"Narayan","year":"1992","journal-title":"IEEE Design & Test"},{"key":"10.1016\/0165-6074(93)90128-8_BIB7","series-title":"Hardware Design using CASE Tools","author":"Glunz","year":"1992"},{"key":"10.1016\/0165-6074(93)90128-8_BIB8","doi-asserted-by":"crossref","unstructured":"Tiedemann W., An Approach to Multi-paradigm Controller Synthesis from Timing Diagram Specifications, Proc. of EURO-DAC '92.","DOI":"10.1109\/EURDAC.1992.246314"},{"key":"10.1016\/0165-6074(93)90128-8_BIB9","series-title":"Proc. of EURO-VHDL","article-title":"High-Level Modelling using Extended Timing Diagrams","author":"Moeschler","year":"1993"},{"key":"10.1016\/0165-6074(93)90128-8_BIB10","series-title":"LOTOS \u2014 A formal description technique based on the temporal ordering of observational behaviour","year":"1989"},{"issue":"No. 9","key":"10.1016\/0165-6074(93)90128-8_BIB11","doi-asserted-by":"crossref","DOI":"10.1109\/32.58782","article-title":"The Specification and Verified Decomposition of System Requirements Using CSP","volume":"Vol. 16","author":"Moore","year":"1990","journal-title":"IEEE Trans. on Software Engineering"},{"key":"10.1016\/0165-6074(93)90128-8_BIB12","article-title":"The Synchronous Approach to Reactive and Real-Time Systems","volume":"Vol. 79","author":"Benveniste","year":"1991"},{"key":"10.1016\/0165-6074(93)90128-8_BIB13","article-title":"A Language for Compositional Specification and Verification of Finite State Hardware Controllers","volume":"Vol. 79","author":"Clarke","year":"1991"},{"key":"10.1016\/0165-6074(93)90128-8_BIB14","unstructured":"Coen-Porisini A., Morzenti A., Sciuto D., Specification and Verification of Hardware Systems using the Temporal Logic Language TRIO, Proc. of CHDL'91."},{"key":"10.1016\/0165-6074(93)90128-8_BIB15","series-title":"Correct Hardware Design Methodologies","article-title":"Hardware Specification using the assertion language ASTRAL","author":"Buonanno","year":"1992"},{"issue":"No. 3","key":"10.1016\/0165-6074(93)90128-8_BIB16","doi-asserted-by":"crossref","DOI":"10.1109\/32.4651","article-title":"PROTEAN: A High-level Petri Net Tool for the Specification and Verification of Communication Protocols","volume":"Vol. 14","author":"Billington","year":"1988","journal-title":"IEEE Trans. on Software Engineering"},{"issue":"No. 5","key":"10.1016\/0165-6074(93)90128-8_BIB17","doi-asserted-by":"crossref","DOI":"10.1109\/32.52775","article-title":"A Protocol Modeling and Verification Approach Based on a Specification Language and Petri Nets","volume":"Vol. 16","author":"Suzuki","year":"1990","journal-title":"IEEE Trans. on Software Engineering"},{"issue":"No. 13","key":"10.1016\/0165-6074(93)90128-8_BIB18","article-title":"PROTOB: an Object-oriented CASE Tool for Modeling and Prototyping Distributed Systems","volume":"Vol. 21(8)","author":"Baldassari","year":"1991","journal-title":"Software \u2014 Practice and Experience"},{"key":"10.1016\/0165-6074(93)90128-8_BIB19","article-title":"Communicating Petri Nets","author":"Degli Antoni","year":"1991"},{"key":"10.1016\/0165-6074(93)90128-8_BIB20","article-title":"EVAL: A Petri Net Based Industrial Tool for System Modeling and Evaluation","author":"Lloret","year":"1992","journal-title":"Tech. Report. Advanced Course on VLSI Formal Verification"},{"key":"10.1016\/0165-6074(93)90128-8_BIB21","year":"1987"},{"issue":"No. 1","key":"10.1016\/0165-6074(93)90128-8_BIB22","doi-asserted-by":"crossref","DOI":"10.1109\/TSE.1985.231845","article-title":"Timing Constraints of Real-Time Systems: Constructs for Expressing Them, Methods of Validating Them","volume":"Vol. 11","author":"Dasarathy","year":"1985","journal-title":"IEEE Trans. on Software Engineering"},{"issue":"no. 2","key":"10.1016\/0165-6074(93)90128-8_BIB23","doi-asserted-by":"crossref","DOI":"10.1109\/32.67597","article-title":"A Unified High-Level Petri Net Formalism for Time-Critical Systems","volume":"Vol. 17","author":"Ghezzi","year":"1991","journal-title":"IEEE Trans. on Software Engineering"},{"key":"10.1016\/0165-6074(93)90128-8_BIB24","doi-asserted-by":"crossref","unstructured":"Buonanno G., Morasca S., Pezze' M., Portman K., Sciuto D., A New Timed Petri Net Model for Hardware Representation, Proc. of CHDL'91.","DOI":"10.1016\/B978-0-444-89208-9.50022-3"},{"issue":"No. 3","key":"10.1016\/0165-6074(93)90128-8_BIB25","doi-asserted-by":"crossref","DOI":"10.1109\/32.75415","article-title":"Modeling and Verification of Time Dependent Systems Using Time Petri Nets","volume":"Vol. 17","author":"Berthomieu","year":"1991","journal-title":"IEEE Trans. on Software Engineering"},{"issue":"No. 5","key":"10.1016\/0165-6074(93)90128-8_BIB26","doi-asserted-by":"crossref","DOI":"10.1109\/12.24271","article-title":"Temporal Petri Nets and Their Application to Modeling and Analysis of a Handshake Daisy Chain Arbiter","volume":"Vol. 38","author":"Suzuki","year":"1989","journal-title":"IEEE Trans. on Computers"},{"issue":"No. 11","key":"10.1016\/0165-6074(93)90128-8_BIB27","doi-asserted-by":"crossref","DOI":"10.1109\/32.60315","article-title":"Formal Analysis of the Alternating Bit Protocol by Temporal Petri Nets","volume":"Vol. 16","author":"Suzuki","year":"1990","journal-title":"IEEE Trans. on Software Engineering"},{"key":"10.1016\/0165-6074(93)90128-8_BIB28","doi-asserted-by":"crossref","DOI":"10.1016\/0165-6074(91)90332-N","article-title":"A Comparison of Temporal Petri Net Techniques in the Specification and Design of Hard Real-Time Systems","volume":"32","author":"Sagoo","year":"1991","journal-title":"Microprocessing and Microprogramming"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607493901288?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607493901288?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2020,3,25]],"date-time":"2020-03-25T09:51:22Z","timestamp":1585129882000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0165607493901288"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993,9]]},"references-count":28,"journal-issue":{"issue":"1-5","published-print":{"date-parts":[[1993,9]]}},"alternative-id":["0165607493901288"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(93)90128-8","relation":{},"ISSN":["0165-6074"],"issn-type":[{"value":"0165-6074","type":"print"}],"subject":[],"published":{"date-parts":[[1993,9]]}}}