{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T00:43:51Z","timestamp":1648860231479},"reference-count":32,"publisher":"Elsevier BV","issue":"7","license":[{"start":{"date-parts":[[1994,10,1]],"date-time":"1994-10-01T00:00:00Z","timestamp":780969600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessing and Microprogramming"],"published-print":{"date-parts":[[1994,10]]},"DOI":"10.1016\/0165-6074(94)90013-2","type":"journal-article","created":{"date-parts":[[2003,8,8]],"date-time":"2003-08-08T00:56:10Z","timestamp":1060304170000},"page":"499-520","source":"Crossref","is-referenced-by-count":0,"title":["Enhanced systolic array implementations of some graph problems"],"prefix":"10.1016","volume":"40","author":[{"given":"S.","family":"Sarkar","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.K.","family":"Majumdar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R.K.","family":"Sen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/0165-6074(94)90013-2_BIB1","series-title":"The Design and Analysis of Computer Algorithms","author":"Aho","year":"1974"},{"key":"10.1016\/0165-6074(94)90013-2_BIB2","series-title":"The Design and Analysis of Parallel Algorithms","author":"Akl","year":"1989"},{"issue":"3","key":"10.1016\/0165-6074(94)90013-2_BIB3","doi-asserted-by":"crossref","first-page":"649","DOI":"10.1145\/828.322449","article-title":"Graph problems on a mesh-connected processor array","volume":"31","author":"Atallah","year":"1984","journal-title":"J. ACM"},{"key":"10.1016\/0165-6074(94)90013-2_BIB4","article-title":"Synthesis of a new systolic architecture for algebraic path problem","author":"Benaini","year":"1989","journal-title":"IRISA research report"},{"key":"10.1016\/0165-6074(94)90013-2_BIB5","series-title":"Proc. Int. Conf. on Parallel Processing","first-page":"170","article-title":"Optimal parallel algorithms for the connected component problem","author":"Chin","year":"1981"},{"key":"10.1016\/0165-6074(94)90013-2_BIB6","doi-asserted-by":"crossref","first-page":"659","DOI":"10.1145\/358628.358650","article-title":"Efficient parallel algorithms for some graph problems","volume":"25","author":"Chin","year":"1982","journal-title":"Commun. ACM"},{"key":"10.1016\/0165-6074(94)90013-2_BIB7","series-title":"Graph Theory","author":"Deo","year":"1987"},{"key":"10.1016\/0165-6074(94)90013-2_BIB8","series-title":"Proc. Int. Conf. on Parallel Processing","first-page":"848","article-title":"Determining biconnectivity on a systolic array","author":"Doshi","year":"1987"},{"key":"10.1016\/0165-6074(94)90013-2_BIB9","series-title":"Proc. Caltech Conf. on VLSI","first-page":"509","article-title":"Direct VLSI implementation of combinatorial algorithms","author":"Guibas","year":"1979"},{"key":"10.1016\/0165-6074(94)90013-2_BIB10","doi-asserted-by":"crossref","first-page":"461","DOI":"10.1145\/359138.359141","article-title":"Computing connected components on parallel computers","volume":"22","author":"Hirschberg","year":"1979","journal-title":"Commun. ACM"},{"key":"10.1016\/0165-6074(94)90013-2_BIB11","series-title":"Proc. Int. Conf. on Systolic Arrays","first-page":"41","article-title":"Architecture of a programmable systolic array","author":"Hughey","year":"1988"},{"key":"10.1016\/0165-6074(94)90013-2_BIB12","first-page":"191","article-title":"High-throughout, reduced hardware systolic solution to prime factor discrete Fourier transform algorithm","volume":"137","author":"Jones","year":"1990"},{"key":"10.1016\/0165-6074(94)90013-2_BIB13","series-title":"Introduction to VLSI Systems","article-title":"Algorithms for VLSI processor arrays","author":"Kung","year":"1980"},{"issue":"1","key":"10.1016\/0165-6074(94)90013-2_BIB14","doi-asserted-by":"crossref","first-page":"37","DOI":"10.1109\/MC.1982.1653825","article-title":"Why systolic architectures?","volume":"15","author":"Kung","year":"1980","journal-title":"Computer"},{"issue":"5","key":"10.1016\/0165-6074(94)90013-2_BIB15","doi-asserted-by":"crossref","first-page":"603","DOI":"10.1109\/TC.1987.1676945","article-title":"Optimal systolic design for the transitive closure and the shortest path problem","volume":"36","author":"Kung","year":"1987","journal-title":"IEEE Trans. Comput."},{"key":"10.1016\/0165-6074(94)90013-2_BIB16","series-title":"VLSI Array Processor","author":"Kung","year":"1988"},{"key":"10.1016\/0165-6074(94)90013-2_BIB17","doi-asserted-by":"crossref","first-page":"25","DOI":"10.1016\/0167-8191(88)90095-6","article-title":"The instruction systolic array and its relation to other models of parallel computers","volume":"7","author":"Kunde","year":"1988","journal-title":"Parallel Comput."},{"key":"10.1016\/0165-6074(94)90013-2_BIB18","series-title":"A Systolic Array Optimizing Compiler","author":"Lam","year":"1989"},{"key":"10.1016\/0165-6074(94)90013-2_BIB19","doi-asserted-by":"crossref","first-page":"65","DOI":"10.1016\/0167-9260(86)90038-6","article-title":"The instruction systolic array - a parallel architecture for VLSI integration","volume":"4","author":"Lang","year":"1986","journal-title":"VLSI J."},{"key":"10.1016\/0165-6074(94)90013-2_BIB20","first-page":"460","article-title":"ISA and SISA: Two variants of a general-purpose systolic architecture","volume":"1","author":"Lang","year":"1987"},{"key":"10.1016\/0165-6074(94)90013-2_BIB21","series-title":"Proc. Int. Conf. on Systolic Arrays","first-page":"295","article-title":"Transitive closure on an instruction systolic array","author":"Lang","year":"1988"},{"key":"10.1016\/0165-6074(94)90013-2_BIB22","series-title":"Introduction to VLSI Systems","author":"Mead","year":"1980"},{"key":"10.1016\/0165-6074(94)90013-2_BIB23","series-title":"11th Annual Symp. on Computer Architecture","first-page":"208","article-title":"Automatic synthesis of systolic arrays from uniform recurrent equations","author":"Quinton","year":"1984"},{"key":"10.1016\/0165-6074(94)90013-2_BIB24","doi-asserted-by":"crossref","first-page":"230","DOI":"10.1137\/0207020","article-title":"Parallel computations in graph theory","volume":"7","author":"Reghbati","year":"1978","journal-title":"SIAM J. Comput."},{"key":"10.1016\/0165-6074(94)90013-2_BIB25","series-title":"Proc. IEEE Region 10 Conf. on Computer and Communication Systems","first-page":"289","article-title":"Fast Fourier transform using linear tagged systolic array","author":"Sarkar","year":"1978"},{"key":"10.1016\/0165-6074(94)90013-2_BIB26","first-page":"289","article-title":"Tagged systolic arrays","volume":"138","author":"Sarkar","year":"1991"},{"key":"10.1016\/0165-6074(94)90013-2_BIB27","doi-asserted-by":"crossref","first-page":"101","DOI":"10.1016\/0165-6074(91)90021-K","article-title":"An instruction systolic array implementation of the two-dimensional fast Fourier transform","volume":"33","author":"Sarkar","year":"1991","journal-title":"Microprocessing and Microprogramming"},{"key":"10.1016\/0165-6074(94)90013-2_BIB28","article-title":"Synthesis of enhanced systolic arrays","author":"Sarkar","year":"1991"},{"key":"10.1016\/0165-6074(94)90013-2_BIB29","series-title":"Proc. Int. Conf. on Parallel Processing","first-page":"917","article-title":"A general purpose VLSI array for efficient signal and image processing","author":"Sastry","year":"1987"},{"key":"10.1016\/0165-6074(94)90013-2_BIB30","series-title":"Proc. Int. Conf. on Systolic Arrays","first-page":"116","article-title":"A VLSI architecture for parallel computation of FFT","author":"Shin","year":"1989"},{"issue":"3","key":"10.1016\/0165-6074(94)90013-2_BIB31","doi-asserted-by":"crossref","first-page":"580","DOI":"10.1137\/0213036","article-title":"Efficient parallel algorithms for a class of graph theoretic problems","volume":"13","author":"Tsin","year":"1989","journal-title":"SIAM J. Comput."},{"key":"10.1016\/0165-6074(94)90013-2_BIB32","first-page":"466","article-title":"Systolic implementations for deconvolution, DFT and FFT","volume":"132","author":"Willey","year":"1985"}],"container-title":["Microprocessing and Microprogramming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607494900132?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0165607494900132?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,3,14]],"date-time":"2019-03-14T21:53:43Z","timestamp":1552600423000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0165607494900132"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994,10]]},"references-count":32,"journal-issue":{"issue":"7","published-print":{"date-parts":[[1994,10]]}},"alternative-id":["0165607494900132"],"URL":"https:\/\/doi.org\/10.1016\/0165-6074(94)90013-2","relation":{},"ISSN":["0165-6074"],"issn-type":[{"value":"0165-6074","type":"print"}],"subject":[],"published":{"date-parts":[[1994,10]]}}}