{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,3]],"date-time":"2022-04-03T19:20:25Z","timestamp":1649013625065},"reference-count":14,"publisher":"Elsevier BV","issue":"7","license":[{"start":{"date-parts":[[1993,7,1]],"date-time":"1993-07-01T00:00:00Z","timestamp":741484800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Parallel Computing"],"published-print":{"date-parts":[[1993,7]]},"DOI":"10.1016\/0167-8191(93)90062-p","type":"journal-article","created":{"date-parts":[[2003,9,3]],"date-time":"2003-09-03T17:52:02Z","timestamp":1062611522000},"page":"745-764","source":"Crossref","is-referenced-by-count":2,"title":["A systematic approach for designing concurrent error-detecting systolic arrays using redundancy"],"prefix":"10.1016","volume":"19","author":[{"given":"C.N","family":"Zhang","sequence":"first","affiliation":[]},{"given":"H.F","family":"Li","sequence":"additional","affiliation":[]},{"given":"R","family":"Jayakumar","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"issue":"1","key":"10.1016\/0167-8191(93)90062-P_BIB1","doi-asserted-by":"crossref","first-page":"21","DOI":"10.1109\/43.3127","article-title":"The design of concurrent error diagnosable systolic arrays for band matrix multiplications","volume":"7","author":"Chan","year":"1988","journal-title":"IEEE Trans. CAD Integr. Circuits Syst."},{"issue":"1","key":"10.1016\/0167-8191(93)90062-P_BIB2","doi-asserted-by":"crossref","first-page":"117","DOI":"10.1109\/43.3139","article-title":"Concurrent error correction in systolic architectures","volume":"7","author":"Cosentino","year":"1988","journal-title":"IEEE Trans. CAD Integr. Circuits Syst."},{"key":"10.1016\/0167-8191(93)90062-P_BIB3","doi-asserted-by":"crossref","first-page":"277","DOI":"10.1016\/0743-7315(85)90029-2","article-title":"Parallelism detection and algorithm transformation techniques useful for VLSI architectures design","author":"Fortes","year":"1985","journal-title":"J. Parallel Distributed Comput."},{"key":"10.1016\/0167-8191(93)90062-P_BIB4","series-title":"Proc. IEEE Internat. Conf. on Computer Design","first-page":"488","article-title":"Concurrent error detection in VLSI array structures","author":"Gulati","year":"1986"},{"issue":"6","key":"10.1016\/0167-8191(93)90062-P_BIB5","first-page":"218","article-title":"Algorithm-based fault tolerance for matrix operations","volume":"33","author":"Huang","year":"1984","journal-title":"IEEE Trans. Comput."},{"key":"10.1016\/0167-8191(93)90062-P_BIB6","first-page":"65","article-title":"Fault tolerance techniques for systolic arrays","author":"Jacob","year":"1987","journal-title":"IEEE Comput."},{"key":"10.1016\/0167-8191(93)90062-P_BIB7","series-title":"VLSI and Modern Signal Processing","first-page":"178","article-title":"Yield enhancement by fault-tolerant systolic arrays","author":"Kuhn","year":"1985"},{"key":"10.1016\/0167-8191(93)90062-P_BIB8","first-page":"251","article-title":"Latency of data-flow and concurrent error detection in systolic arrays","author":"Li","year":"1989","journal-title":"CCVLSI-89"},{"key":"10.1016\/0167-8191(93)90062-P_BIB9","doi-asserted-by":"crossref","first-page":"93","DOI":"10.1007\/BF02253685","article-title":"Space-time representations of computational structures","volume":"32","author":"Miranker","year":"1984","journal-title":"Computing"},{"key":"10.1016\/0167-8191(93)90062-P_BIB10","first-page":"113","article-title":"On the design of algorithms for VLSI systolic arrays","volume":"71","author":"Moldovan","year":"1983"},{"key":"10.1016\/0167-8191(93)90062-P_BIB11","doi-asserted-by":"crossref","first-page":"589","DOI":"10.1109\/TC.1982.1676055","article-title":"Concurrent error detection in ALU's by recomputing with shifted operands","volume":"C-31","author":"Patel","year":"1982","journal-title":"IEEE Trans. Comput."},{"key":"10.1016\/0167-8191(93)90062-P_BIB12","series-title":"Proc. 17th Internat. Symp. on Fault-Tolerant Computing","first-page":"136","article-title":"Concurrent error correction in unidirectional linear arithmetic arrays","author":"Wu","year":"1987"},{"key":"10.1016\/0167-8191(93)90062-P_BIB13","series-title":"ISMM\/IASTED 4th Internat. Conf. on Parallel and Distributed Computing and Systems","first-page":"267","article-title":"A general model for concurrent error detection in systolic arrays","author":"Zhang","year":"1991"},{"key":"10.1016\/0167-8191(93)90062-P_BIB14","series-title":"VLSI Array Processors","author":"Kung","year":"1988"}],"container-title":["Parallel Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:016781919390062P?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:016781919390062P?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,2,25]],"date-time":"2019-02-25T09:27:57Z","timestamp":1551086877000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/016781919390062P"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1993,7]]},"references-count":14,"journal-issue":{"issue":"7","published-print":{"date-parts":[[1993,7]]}},"alternative-id":["016781919390062P"],"URL":"https:\/\/doi.org\/10.1016\/0167-8191(93)90062-p","relation":{},"ISSN":["0167-8191"],"issn-type":[{"value":"0167-8191","type":"print"}],"subject":[],"published":{"date-parts":[[1993,7]]}}}