{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,31]],"date-time":"2026-01-31T02:37:44Z","timestamp":1769827064160,"version":"3.49.0"},"reference-count":20,"publisher":"Elsevier BV","issue":"4","license":[{"start":{"date-parts":[[1988,8,1]],"date-time":"1988-08-01T00:00:00Z","timestamp":586396800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"},{"start":{"date-parts":[[1988,8,1]],"date-time":"1988-08-01T00:00:00Z","timestamp":586396800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/legal\/tdmrep-license"}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Journal of Parallel and Distributed Computing"],"published-print":{"date-parts":[[1988,8]]},"DOI":"10.1016\/0743-7315(88)90002-0","type":"journal-article","created":{"date-parts":[[2004,2,23]],"date-time":"2004-02-23T15:14:09Z","timestamp":1077549249000},"page":"334-358","update-policy":"https:\/\/doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":106,"title":["Estimating interlock and improving balance for pipelined architectures"],"prefix":"10.1016","volume":"5","author":[{"given":"David","family":"Callahan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"John","family":"Cocke","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ken","family":"Kennedy","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/0743-7315(88)90002-0_BIB1","article-title":"Improving the performance of virtual memory computers","author":"Abu-Sufah","year":"1978"},{"key":"10.1016\/0743-7315(88)90002-0_BIB2","series-title":"Design and Optimization of Compilers","first-page":"1","article-title":"A catalogue of optimizing transformations","author":"Allen","year":"1972"},{"key":"10.1016\/0743-7315(88)90002-0_BIB3","series-title":"Proc. Fourteenth Annual Symposium on the Principles of Programming Languages","article-title":"Automatic decomposition of scientific programs for parallel processing","author":"Allen","year":"1987"},{"key":"10.1016\/0743-7315(88)90002-0_BIB4","article-title":"PFC: A program to convert Fortran to parallel form","author":"Allen","year":"1982"},{"key":"10.1016\/0743-7315(88)90002-0_BIB5","article-title":"Vector register allocation","author":"Allen","year":"1986"},{"key":"10.1016\/0743-7315(88)90002-0_BIB6","article-title":"Dependence analysis for subscripted variables and its application to program transformation","author":"Allen","year":"1983"},{"key":"10.1016\/0743-7315(88)90002-0_BIB7","series-title":"Proc. SIGPLAN '82 Symposium on Compiler Construction","article-title":"Register allocation & spilling via graph coloring","author":"Chaitain","year":"1982"},{"issue":"7","key":"10.1016\/0743-7315(88)90002-0_BIB8","doi-asserted-by":"crossref","first-page":"478","DOI":"10.1109\/TC.1981.1675827","article-title":"Trace scheduling: A technique for global microcode compaction","volume":"C-30","author":"Fisher","year":"1981","journal-title":"IEEE Trans. Comput."},{"key":"10.1016\/0743-7315(88)90002-0_BIB9","series-title":"Proc. SIGPLAN '86 Symposium on Compiler Construction","article-title":"Compilation for a high-performance systolic array","author":"Gross","year":"1986"},{"key":"10.1016\/0743-7315(88)90002-0_BIB10","series-title":"Proc. SIGPLAN '86 Symposium on Compiler Construction","article-title":"Efficient instruction scheduling for a pipelined architecture","author":"Gibbons","year":"1986"},{"issue":"3","key":"10.1016\/0743-7315(88)90002-0_BIB11","doi-asserted-by":"crossref","first-page":"422","DOI":"10.1145\/2166.357217","article-title":"Postpass code optimization of pipeline constraints","volume":"5","author":"Hennessy","year":"1983","journal-title":"ACM Trans. Programming Lang. Systems"},{"key":"10.1016\/0743-7315(88)90002-0_BIB12","article-title":"Automatic translation of Fortran programs to vector form","author":"Kennedy","year":"1980"},{"key":"10.1016\/0743-7315(88)90002-0_BIB13","volume":"Vol. 1","author":"Kuck","year":"1978"},{"key":"10.1016\/0743-7315(88)90002-0_BIB14","series-title":"Proc. International Conference on Supercomputing","article-title":"Loop quantization","author":"Nicolau","year":"1987"},{"issue":"12","key":"10.1016\/0743-7315(88)90002-0_BIB15","doi-asserted-by":"crossref","first-page":"1184","DOI":"10.1145\/7902.7904","article-title":"Advanced compiler optimizations for supercomputers","volume":"29","author":"Padua","year":"1986","journal-title":"Comm. ACM"},{"issue":"4","key":"10.1016\/0743-7315(88)90002-0_BIB16","doi-asserted-by":"crossref","DOI":"10.1145\/321607.321620","article-title":"The generation of optimal code for arithmetic expressions","volume":"17","author":"Sethi","year":"1970","journal-title":"J. Assoc. Comput. Mach."},{"issue":"2","key":"10.1016\/0743-7315(88)90002-0_BIB17","doi-asserted-by":"crossref","DOI":"10.1137\/0201010","article-title":"Depth first search and linear graph algorithms","volume":"1","author":"Tarjan","year":"1972","journal-title":"SIAM J. Comput."},{"key":"10.1016\/0743-7315(88)90002-0_BIB18","series-title":"Conference Record of the Eleventh ACM Symposium on the Principles of Programming Languages","first-page":"272","article-title":"A hierarchical basis for reordering transformations","author":"Warren","year":"1984"},{"key":"10.1016\/0743-7315(88)90002-0_BIB19","article-title":"Optimizing supercompilers for supercomputers","author":"Wolfe","year":"1982"},{"key":"10.1016\/0743-7315(88)90002-0_BIB20","series-title":"Proc. 1986 International Conference on Parallel Processing","article-title":"Advanced loop interchange","author":"Wolfe","year":"1986"}],"container-title":["Journal of Parallel and Distributed Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0743731588900020?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0743731588900020?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,9,10]],"date-time":"2025-09-10T14:29:36Z","timestamp":1757514576000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0743731588900020"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1988,8]]},"references-count":20,"journal-issue":{"issue":"4","published-print":{"date-parts":[[1988,8]]}},"alternative-id":["0743731588900020"],"URL":"https:\/\/doi.org\/10.1016\/0743-7315(88)90002-0","relation":{},"ISSN":["0743-7315"],"issn-type":[{"value":"0743-7315","type":"print"}],"subject":[],"published":{"date-parts":[[1988,8]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"Estimating interlock and improving balance for pipelined architectures","name":"articletitle","label":"Article Title"},{"value":"Journal of Parallel and Distributed Computing","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/0743-7315(88)90002-0","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"converted-article","name":"content_type","label":"Content Type"},{"value":"Copyright \u00a9 1988 Published by Elsevier Inc.","name":"copyright","label":"Copyright"}]}}