{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,16]],"date-time":"2026-06-16T04:54:00Z","timestamp":1781585640764,"version":"3.54.5"},"reference-count":30,"publisher":"Elsevier BV","license":[{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/legal\/tdmrep-license"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-017"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-012"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-004"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62104108"],"award-info":[{"award-number":["62104108"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Microelectronics Journal"],"published-print":{"date-parts":[[2026,8]]},"DOI":"10.1016\/j.mejo.2026.107200","type":"journal-article","created":{"date-parts":[[2026,4,11]],"date-time":"2026-04-11T08:35:42Z","timestamp":1775896542000},"page":"107200","update-policy":"https:\/\/doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":0,"special_numbering":"C","title":["A 10-bit 50-MS\/s SAR ADC employing PN-assisted LMS calibration and robust register logic achieving 78.4-dB SFDR"],"prefix":"10.1016","volume":"174","author":[{"given":"Xijun","family":"Yang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Siqi","family":"Men","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yuzhuan","family":"Shi","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jie","family":"Sun","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"78","reference":[{"issue":"2","key":"10.1016\/j.mejo.2026.107200_b1","doi-asserted-by":"crossref","first-page":"200","DOI":"10.1109\/TBCAS.2022.3147954","article-title":"A 14-b 20-MS\/s 78.8 dB-SNDR energy-efficient SAR ADC with background mismatch calibration and noise-reduction techniques for portable medical ultrasound systems","volume":"16","author":"Liang","year":"2022","journal-title":"IEEE Trans. Biomed. Circuits Syst."},{"key":"10.1016\/j.mejo.2026.107200_b2","doi-asserted-by":"crossref","unstructured":"X. Gui, X. Zheng, X. Xing, A 70 dB SNDR 20MHz-BW VCO-Based CT Sturdy MASH Delta-Sigma Modulator with Robust Quantization Error Extraction, in: 2024 IEEE International Symposium on Circuits and Systems, ISCAS, 2024, pp. 1\u20135.","DOI":"10.1109\/ISCAS58744.2024.10558509"},{"issue":"3","key":"10.1016\/j.mejo.2026.107200_b3","first-page":"425","article-title":"A wide dynamic range neural data acquisition system with high-precision delta sigma ADC and on-chip EC-PC spike processor","volume":"14","author":"Xu","year":"2020","journal-title":"IEEE Trans. Biomed. Circuits Syst."},{"key":"10.1016\/j.mejo.2026.107200_b4","doi-asserted-by":"crossref","unstructured":"Z. Xu, K. Xing, R.P. Martins, An ELDC-Free 2.78 mW 20MHz-BW 75.5dB-SNDR 4th- Order CTSDM Facilitated by 2nd-Order CT NS-SAR and AC-Coupled Negative-R, in: 2023 IEEE Custom Integrated Circuits Conference, CICC, 2023, pp. 1\u20132.","DOI":"10.1109\/CICC57935.2023.10121316"},{"key":"10.1016\/j.mejo.2026.107200_b5","article-title":"A 1kHz-BW 106db-SNDR DT zoom ADC","author":"Liang","year":"2026","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"key":"10.1016\/j.mejo.2026.107200_b6","article-title":"A 13 bit 4MS\/s SAR ADC with energy-efficient bidirectional delay generation","volume":"165","author":"Lee","year":"2025","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107200_b7","article-title":"A command-driven SAR adc with incremental and random converting technique","volume":"165","author":"Qin","year":"2025","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107200_b8","article-title":"A 16-bit 2 MSPS pipelined SAR ADC with digital background calibration in 0.18\u03bcm CMOS","volume":"173","author":"Xu","year":"2026","journal-title":"Microelectron. J."},{"issue":"6","key":"10.1016\/j.mejo.2026.107200_b9","doi-asserted-by":"crossref","first-page":"371","DOI":"10.1109\/JSSC.1975.1050629","article-title":"All-MOS charge redistribution analog-to-digital conversion techniues\u2014Part I","volume":"SC-10","author":"McCreary","year":"1975","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"7","key":"10.1016\/j.mejo.2026.107200_b10","first-page":"1","article-title":"A 12-bit 40-MS\/s pipelined SAR ADC for ultrasonic nondestructive testing applications","volume":"75","author":"Liang","year":"2026","journal-title":"IEEE Trans. Instrum. Meas."},{"key":"10.1016\/j.mejo.2026.107200_b11","doi-asserted-by":"crossref","unstructured":"Z. Zhang, F. Xiong, K. Wu, A Calibration Free 8-to-12 b, 1-to-20 MSPS Reconfigurable SAR ADC with Optimized Window-Switching Scheme, in: 2025 IEEE International Symposium on Circuits and Systems, ISCAS, 2025, pp. 1\u20135.","DOI":"10.1109\/ISCAS56072.2025.11043930"},{"issue":"4","key":"10.1016\/j.mejo.2026.107200_b12","first-page":"544","article-title":"An 8-to-12-bit resolution-reconfigurable SAR ADC with fast-window-switching technique","volume":"72","author":"Liang","year":"2025","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"issue":"6","key":"10.1016\/j.mejo.2026.107200_b13","first-page":"410","article-title":"A 10-b 50-MS\/s 820-\u03bcW SAR ADC with on-chip digital calibration","volume":"4","author":"Yoshioka","year":"2010","journal-title":"IEEE J. Solid-State Circuits."},{"issue":"10","key":"10.1016\/j.mejo.2026.107200_b14","doi-asserted-by":"crossref","first-page":"2222","DOI":"10.1109\/JSSC.2016.2582861","article-title":"A 12-bit 104 MS\/s SAR ADC in 28 nm CMOS for digitally-assisted wireless transmitters","volume":"51","author":"Tseng","year":"2016","journal-title":"IEEE J. Solid-State Circuit"},{"issue":"4","key":"10.1016\/j.mejo.2026.107200_b15","doi-asserted-by":"crossref","first-page":"1149","DOI":"10.1109\/JSSC.2017.2784761","article-title":"A 16-bit 16-MS\/s SAR ADC with on-chip calibration in 55-nm CMOS","volume":"53","author":"Shen","year":"2018","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"11","key":"10.1016\/j.mejo.2026.107200_b16","doi-asserted-by":"crossref","first-page":"2661","DOI":"10.1109\/JSSC.2011.2163556","article-title":"A 12-bit, 45-MS\/s, 3-mW redundant successive approximation-register analog-to-digital converter with digital calibration","volume":"46","author":"Liu","year":"2011","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"4","key":"10.1016\/j.mejo.2026.107200_b17","doi-asserted-by":"crossref","first-page":"937","DOI":"10.1109\/JSSC.2018.2883084","article-title":"A 12-bit 31.1-\u03bcW 1-MS\/s SAR ADC with on-chip input-signal-independent calibration achieving 100.4-dB SFDR using 256-fF sampling capacitance","volume":"54","author":"Shen","year":"2019","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2026.107200_b18","doi-asserted-by":"crossref","unstructured":"H. Li, M. Maddox, M.C.W. Coln, A Signal-Independent Background-Calibrating 20b 1MS\/s SAR ADC with 0.3 ppm INL, in: Proc. 2018 IEEE International Solid-State Circuits Conf., 2018.","DOI":"10.1109\/ISSCC.2018.8310274"},{"issue":"10","key":"10.1016\/j.mejo.2026.107200_b19","first-page":"2355","article-title":"All-digital background calibration of a successive approximation ADC using the \u201csplit ADC\u201d architecture","volume":"58","author":"McNeill","year":"2011","journal-title":"IEEE Trans. Circuits Syst. I: Regul. Pap."},{"key":"10.1016\/j.mejo.2026.107200_b20","doi-asserted-by":"crossref","unstructured":"J. Zhou, P. Wang, Z. Luo, All-Digital Background Calibration of a Pipelined SAR ADC Using the \u201cSplit ADC\u201d Architecture, in: 2023 IEEE International Symposium on Circuits and Systems, ISCAS, 2023, pp. 1\u20135.","DOI":"10.1109\/ISCAS46773.2023.10195888"},{"issue":"17","key":"10.1016\/j.mejo.2026.107200_b21","doi-asserted-by":"crossref","first-page":"7130","DOI":"10.1109\/JSEN.2018.2856103","article-title":"A 9.1ENOB 200MS\/s asynchronous SAR ADC with hybrid single-ended\/differential DAC in 55-nm CMOS for image sensing signals","volume":"18","author":"Liang","year":"2018","journal-title":"IEEE Sensors J."},{"issue":"6","key":"10.1016\/j.mejo.2026.107200_b22","doi-asserted-by":"crossref","first-page":"458","DOI":"10.1109\/82.502318","article-title":"Parallel implementation of linear feedback shift registers for low power applications","volume":"43","author":"Lowy","year":"1996","journal-title":"IEEE Trans. Circuits Syst. II Analog. Digit. Signal Process."},{"issue":"7","key":"10.1016\/j.mejo.2026.107200_b23","doi-asserted-by":"crossref","first-page":"1487","DOI":"10.1109\/TCSI.2006.877889","article-title":"Multiple-output low-power linear feedback shift register design","volume":"53","author":"Katti","year":"2006","journal-title":"IEEE Trans. Circuits Syst. I Reg. Pap."},{"issue":"3","key":"10.1016\/j.mejo.2026.107200_b24","doi-asserted-by":"crossref","first-page":"1159","DOI":"10.1109\/TVLSI.2016.2608921","article-title":"High-speed parallel LFSR architectures based on improved state-space transformations","volume":"25","author":"Hu","year":"2017","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"issue":"4","key":"10.1016\/j.mejo.2026.107200_b25","doi-asserted-by":"crossref","first-page":"1074","DOI":"10.1109\/TVLSI.2019.2961149","article-title":"Background calibration of bit weights in pipelined-SAR ADCs using paired comparators","volume":"28","author":"Sun","year":"2020","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"issue":"8","key":"10.1016\/j.mejo.2026.107200_b26","doi-asserted-by":"crossref","first-page":"1881","DOI":"10.1109\/JSSC.2011.2151450","article-title":"A 550-\u03bcW 10-b 40-MS\/s SAR ADC with multistep addition-only digital error correction","volume":"46","author":"Cho","year":"2011","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2026.107200_b27","doi-asserted-by":"crossref","unstructured":"F. Kuttner, A 1.2V 10b 20MSample\/s Non-Binary Successive Approximation ADC in 0.13\u03bcm CMOS, in: Proc. 2002 IEEE International Solid-State Circuits Conf. Digest of Tech. Papers, 2002.","DOI":"10.1109\/ISSCC.2002.992181"},{"key":"10.1016\/j.mejo.2026.107200_b28","doi-asserted-by":"crossref","unstructured":"C.-C. Liu, S.-J. Chang, C.-H. Huang, A 10b 100MS\/s 1.13 mW SAR ADC with Binary-Scaled Error Compensation, in: Proc. 2010 IEEE International Solid-State Circuits Conf., 2010.","DOI":"10.1109\/ISSCC.2010.5433970"},{"issue":"11","key":"10.1016\/j.mejo.2026.107200_b29","doi-asserted-by":"crossref","first-page":"2645","DOI":"10.1109\/JSSC.2015.2466475","article-title":"A 10 bit 320 MS\/s low-cost SAR ADC for IEEE 802.11ac applications in 20 nm CMOS","volume":"50","author":"Liu","year":"2015","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2026.107200_b30","doi-asserted-by":"crossref","unstructured":"Z. Lan, L. Dong, X. Jing, A 12-bit 100MS\/s SAR ADC with digital error correction and high-speed LMS-based background calibration, in: 2023 IEEE International Symposium on Circuits and Systems, ISCAS, 2021, pp. 1\u20135.","DOI":"10.1109\/ISCAS51556.2021.9401172"}],"container-title":["Microelectronics Journal"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1879239126001566?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1879239126001566?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2026,6,16]],"date-time":"2026-06-16T04:12:01Z","timestamp":1781583121000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S1879239126001566"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,8]]},"references-count":30,"alternative-id":["S1879239126001566"],"URL":"https:\/\/doi.org\/10.1016\/j.mejo.2026.107200","relation":{},"ISSN":["1879-2391"],"issn-type":[{"value":"1879-2391","type":"print"}],"subject":[],"published":{"date-parts":[[2026,8]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"A 10-bit 50-MS\/s SAR ADC employing PN-assisted LMS calibration and robust register logic achieving 78.4-dB SFDR","name":"articletitle","label":"Article Title"},{"value":"Microelectronics Journal","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.mejo.2026.107200","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"\u00a9 2026 Elsevier Ltd. All rights are reserved, including those for text and data mining, AI training, and similar technologies.","name":"copyright","label":"Copyright"}],"article-number":"107200"}}