{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,16]],"date-time":"2026-06-16T04:53:52Z","timestamp":1781585632228,"version":"3.54.5"},"reference-count":38,"publisher":"Elsevier BV","license":[{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/legal\/tdmrep-license"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-017"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-012"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,8,1]],"date-time":"2026-08-01T00:00:00Z","timestamp":1785542400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-004"}],"funder":[{"DOI":"10.13039\/501100017668","name":"Anhui Provincial Key Research and Development Plan","doi-asserted-by":"publisher","award":["202104g01020008"],"award-info":[{"award-number":["202104g01020008"]}],"id":[{"id":"10.13039\/501100017668","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Microelectronics Journal"],"published-print":{"date-parts":[[2026,8]]},"DOI":"10.1016\/j.mejo.2026.107210","type":"journal-article","created":{"date-parts":[[2026,4,15]],"date-time":"2026-04-15T07:30:49Z","timestamp":1776238249000},"page":"107210","update-policy":"https:\/\/doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":0,"special_numbering":"C","title":["End-to-end ADC digital calibration via multi-output compression-recovery network"],"prefix":"10.1016","volume":"174","author":[{"given":"Jiashen","family":"Li","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Honghui","family":"Deng","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Long","family":"Li","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Luotian","family":"Wu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Muqi","family":"Li","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiao","family":"Yang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4288-7933","authenticated-orcid":false,"given":"Yongsheng","family":"Yin","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"78","reference":[{"key":"10.1016\/j.mejo.2026.107210_b1","doi-asserted-by":"crossref","unstructured":"Martin Kinyua, Eric Soenen, A 72.6 dB SNDR 14b 100 MSPS Ring Amplifier Based Pipelined SAR ADC with Dynamic Deadzone Control in 16 nm CMOS, in: 2020 IEEE Custom Integrated Circuits Conference, CICC, 2020, pp. 1\u20134.","DOI":"10.1109\/CICC48029.2020.9075921"},{"issue":"10","key":"10.1016\/j.mejo.2026.107210_b2","doi-asserted-by":"crossref","first-page":"2709","DOI":"10.1109\/JSSC.2023.3290119","article-title":"A 14b 500 MS\/s single-channel pipelined-SAR ADC with reference ripple mitigation techniques and adaptively biased floating inverter amplifier","volume":"58","author":"Jiang","year":"2023","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2026.107210_b3","first-page":"1","article-title":"A 12-bit 40-MS\/s pipelined SAR ADC for ultrasonic nondestructive testing applications","volume":"75","author":"Liang","year":"2026","journal-title":"IEEE Trans. Instrum. Meas."},{"key":"10.1016\/j.mejo.2026.107210_b4","doi-asserted-by":"crossref","unstructured":"Jun Feng, Rares Bodnar, Filip Tavernier, A 200MS\/s, 77dB-DR Two-Stage SAR ADC with Asynchronous Pipelining and Reference Snubbers, in: 2025 IEEE European Solid-State Electronics Research Conference, ESSERC, 2025, pp. 693\u2013696.","DOI":"10.1109\/ESSERC66193.2025.11214048"},{"issue":"4","key":"10.1016\/j.mejo.2026.107210_b5","first-page":"373","article-title":"A 1-kHz BW 106-dB SNDR DT zoom ADC","volume":"73","author":"Liang","year":"2026","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"issue":"8","key":"10.1016\/j.mejo.2026.107210_b6","doi-asserted-by":"crossref","first-page":"2481","DOI":"10.1109\/JSSC.2024.3360944","article-title":"A 1.5-MHz BW 81.2-dB SNDR dual-residue pipeline ADC with a fully dynamic noise-shaping interpolating-SAR ADC","volume":"59","author":"Chung","year":"2024","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"12","key":"10.1016\/j.mejo.2026.107210_b7","doi-asserted-by":"crossref","first-page":"2857","DOI":"10.1109\/JSSC.2014.2361339","article-title":"A 14 bit 1 GS\/s RF sampling pipelined ADC with background calibration","volume":"49","author":"Ali","year":"2014","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"10","key":"10.1016\/j.mejo.2026.107210_b8","doi-asserted-by":"crossref","first-page":"2355","DOI":"10.1109\/TCSI.2011.2123590","article-title":"All-digital background calibration of a successive approximation ADC using the \u201cSplit ADC\u201d architecture","volume":"58","author":"McNeill","year":"2011","journal-title":"IEEE Trans. Circuits Syst. I. Regul. Pap."},{"issue":"2","key":"10.1016\/j.mejo.2026.107210_b9","doi-asserted-by":"crossref","first-page":"200","DOI":"10.1109\/TBCAS.2022.3147954","article-title":"A 14-b 20-MS\/s 78.8 dB-SNDR energy-efficient SAR ADC with background mismatch calibration and noise-reduction techniques for portable medical ultrasound systems","volume":"16","author":"Liang","year":"2022","journal-title":"IEEE Trans. Biomed. Circuits Syst."},{"issue":"3","key":"10.1016\/j.mejo.2026.107210_b10","doi-asserted-by":"crossref","first-page":"1683","DOI":"10.1109\/TCSI.2025.3608173","article-title":"Multi-term cosine-sum windows-assisted DFT-IDFT-based minimum-segment calibration for SAR ADCs","volume":"73","author":"Wang","year":"2026","journal-title":"IEEE Trans. Circuits Syst. I. Regul. Pap."},{"key":"10.1016\/j.mejo.2026.107210_b11","article-title":"A genetic algorithm-based capacitor mismatch calibration scheme for SAR ADCs","volume":"161","author":"Zhang","year":"2025","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107210_b12","article-title":"A 16-bit 2MSPS pipelined SAR ADC with digital background calibration in 0.18 um CMOS","volume":"173","author":"Xu","year":"2026","journal-title":"Microelectron. J."},{"issue":"2","key":"10.1016\/j.mejo.2026.107210_b13","doi-asserted-by":"crossref","first-page":"74","DOI":"10.1049\/el:20063387","article-title":"Digital background calibration for timing mismatch in time-interleaved ADCs","volume":"42","author":"Chen","year":"2006","journal-title":"Electron. Lett."},{"key":"10.1016\/j.mejo.2026.107210_b14","series-title":"2010 18th Iranian Conference on Electrical Engineering","first-page":"382","article-title":"An efficient postprocessor architecture for channel mismatch correction of time interleaved ADCs","author":"Abbaszadeh","year":"2010"},{"issue":"12","key":"10.1016\/j.mejo.2026.107210_b15","doi-asserted-by":"crossref","first-page":"4944","DOI":"10.1109\/TCSI.2022.3201016","article-title":"High-speed and time-interleaved ADCs using additive-neural-network-based calibration for nonlinear amplitude and phase distortion","volume":"69","author":"Zhai","year":"2022","journal-title":"IEEE Trans. Circuits Syst. I. Regul. Pap."},{"issue":"1","key":"10.1016\/j.mejo.2026.107210_b16","first-page":"48","article-title":"A novel NN-based fast-convergence background calibration for timing mismatch in TI ADCs","volume":"72","author":"Lu","year":"2025","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"issue":"7","key":"10.1016\/j.mejo.2026.107210_b17","doi-asserted-by":"crossref","first-page":"1184","DOI":"10.1109\/TVLSI.2024.3390220","article-title":"A new artificial neural network-based calibration mechanism for ADCs: A time-interleaved ADC case study","volume":"32","author":"Lu","year":"2024","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"issue":"8","key":"10.1016\/j.mejo.2026.107210_b18","first-page":"1008","article-title":"A neural network-enhanced digital background calibration algorithm for residue amplifier nonlinearity in pipelined ADCs","volume":"72","author":"Peng","year":"2025","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"issue":"7","key":"10.1016\/j.mejo.2026.107210_b19","first-page":"3283","article-title":"A novel calibration algorithm for ADCs based on inverse mapping by neural network","volume":"71","author":"Peng","year":"2024","journal-title":"IEEE Trans. Circuits Syst. II: Express Briefs"},{"issue":"11","key":"10.1016\/j.mejo.2026.107210_b20","doi-asserted-by":"crossref","first-page":"5067","DOI":"10.1109\/TCSI.2024.3429309","article-title":"Artificial neural network based calibration for a 12 b 250 MS\/s pipelined-SAR ADC with ring amplifier in 40-nm CMOS","volume":"71","author":"Liu","year":"2024","journal-title":"IEEE Trans. Circuits Syst. I. Regul. Pap."},{"key":"10.1016\/j.mejo.2026.107210_b21","doi-asserted-by":"crossref","DOI":"10.1016\/j.mejo.2025.106820","article-title":"A 16-bit 1MS\/s weight borrowing SAR ADC with back propagation neural network calibration","author":"Jiang","year":"2025","journal-title":"Microelectron. J."},{"issue":"6","key":"10.1016\/j.mejo.2026.107210_b22","article-title":"A pipelined ADC calibration technique based on time-delay neural network with ant colony optimization","volume":"22","author":"Li","year":"2025","journal-title":"IEICE Trans. Elex"},{"key":"10.1016\/j.mejo.2026.107210_b23","article-title":"Research on digital enhancement technique for pipeline ADC based on time-delay neural networks","volume":"171","author":"Li","year":"2026","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107210_b24","article-title":"A digital background calibration method for SAR ADC based on dual-layer feedforward neural network","volume":"159","author":"Li","year":"2025","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107210_b25","article-title":"Neural network-based digital calibration of high precision SAR ADC with multi-physics feature perception for generalization enhancement","volume":"171","author":"Li","year":"2026","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107210_b26","article-title":"A TI-ADC calibration method based on structured pruning neural network with multi-tone signal pre-training","volume":"172","author":"Li","year":"2026","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107210_b27","article-title":"Digital calibration of high-resolution ADCs using statistical-feature-enhanced neural networks","author":"Li","year":"2026","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107210_b28","article-title":"A neural network-based ADC calibration framework via quantization code reconstruction","author":"Li","year":"2025","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"10.1016\/j.mejo.2026.107210_b29","series-title":"2020 IEEE Asia Pacific Conference on Circuits and Systems","first-page":"205","article-title":"A calibration scheme for nonlinearity of the SAR-pipelined ADCs based on a shared neural network","author":"Chen","year":"2020"},{"key":"10.1016\/j.mejo.2026.107210_b30","series-title":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology","first-page":"1","article-title":"A split-based neural network calibrator for SAR-pipelined ADC on FPGA","author":"Chen","year":"2020"},{"issue":"4","key":"10.1016\/j.mejo.2026.107210_b31","doi-asserted-by":"crossref","first-page":"563","DOI":"10.1109\/TCCN.2017.2758370","article-title":"An introduction to deep learning for the physical layer","volume":"3","author":"O\u2019Shea","year":"2017","journal-title":"IEEE Trans. Cogn. Commun. Netw."},{"issue":"6088","key":"10.1016\/j.mejo.2026.107210_b32","doi-asserted-by":"crossref","first-page":"533","DOI":"10.1038\/323533a0","article-title":"Learning representations by back propagating errors","volume":"323","author":"Rumelhart","year":"1986","journal-title":"Nat."},{"issue":"8","key":"10.1016\/j.mejo.2026.107210_b33","doi-asserted-by":"crossref","first-page":"1798","DOI":"10.1109\/TPAMI.2013.50","article-title":"Representation learning: A review and new perspectives","volume":"35","author":"Bengio","year":"2013","journal-title":"IEEE Trans. Pattern Anal. Mach. Intell."},{"key":"10.1016\/j.mejo.2026.107210_b34","series-title":"The information bottleneck method","author":"Tishby","year":"2000"},{"key":"10.1016\/j.mejo.2026.107210_b35","series-title":"Deep variational information bottleneck","author":"Alemi","year":"2016"},{"key":"10.1016\/j.mejo.2026.107210_b36","series-title":"Neural Networks: Tricks of the Trade","first-page":"55","article-title":"Early stopping-but when?","author":"Prechelt","year":"2002"},{"key":"10.1016\/j.mejo.2026.107210_b37","article-title":"A novel background bandwidth calibration technique in a SHA-less dual-channel 14-bit 125 MS\/s pipeline ADC","volume":"165","author":"Zhang","year":"2025","journal-title":"Microelectron. J."},{"key":"10.1016\/j.mejo.2026.107210_b38","doi-asserted-by":"crossref","unstructured":"Hao Deng, Qingjun Fan, Runxi Zhang, Jinghong Chen, Machine-Learning Based Nonlinerity Correction for Coarse-Fine SAR-TDC Hybrid ADC, in: 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems, MWSCAS, 2020, pp. 265\u2013268.","DOI":"10.1109\/MWSCAS48704.2020.9184523"}],"container-title":["Microelectronics Journal"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1879239126001669?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1879239126001669?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2026,6,16]],"date-time":"2026-06-16T04:14:38Z","timestamp":1781583278000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S1879239126001669"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,8]]},"references-count":38,"alternative-id":["S1879239126001669"],"URL":"https:\/\/doi.org\/10.1016\/j.mejo.2026.107210","relation":{},"ISSN":["1879-2391"],"issn-type":[{"value":"1879-2391","type":"print"}],"subject":[],"published":{"date-parts":[[2026,8]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"End-to-end ADC digital calibration via multi-output compression-recovery network","name":"articletitle","label":"Article Title"},{"value":"Microelectronics Journal","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.mejo.2026.107210","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"\u00a9 2026 Elsevier Ltd. All rights are reserved, including those for text and data mining, AI training, and similar technologies.","name":"copyright","label":"Copyright"}],"article-number":"107210"}}